1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt721-sdca.c -- rt721 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2024 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/bitops.h>
10 #include <sound/core.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <sound/initval.h>
14 #include <sound/jack.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <sound/pcm.h>
19 #include <linux/pm_runtime.h>
20 #include <sound/pcm_params.h>
21 #include <linux/soundwire/sdw_registers.h>
22 #include <linux/slab.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/tlv.h>
25
26 #include "rt721-sdca.h"
27 #include "rt-sdw-common.h"
28
rt721_sdca_jack_detect_handler(struct work_struct * work)29 static void rt721_sdca_jack_detect_handler(struct work_struct *work)
30 {
31 struct rt721_sdca_priv *rt721 =
32 container_of(work, struct rt721_sdca_priv, jack_detect_work.work);
33 int btn_type = 0;
34
35 if (!rt721->hs_jack)
36 return;
37
38 if (!rt721->component->card || !rt721->component->card->instantiated)
39 return;
40
41 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */
42 if (rt721->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) {
43 rt721->jack_type = rt_sdca_headset_detect(rt721->regmap,
44 RT721_SDCA_ENT_GE49);
45 if (rt721->jack_type < 0)
46 return;
47 }
48
49 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */
50 if (rt721->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8)
51 btn_type = rt_sdca_button_detect(rt721->regmap,
52 RT721_SDCA_ENT_HID01, RT721_BUF_ADDR_HID1,
53 RT721_SDCA_HID_ID);
54
55 if (rt721->jack_type == 0)
56 btn_type = 0;
57
58 dev_dbg(&rt721->slave->dev,
59 "in %s, jack_type=%d\n", __func__, rt721->jack_type);
60 dev_dbg(&rt721->slave->dev,
61 "in %s, btn_type=0x%x\n", __func__, btn_type);
62 dev_dbg(&rt721->slave->dev,
63 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
64 rt721->scp_sdca_stat1, rt721->scp_sdca_stat2);
65
66 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type,
67 SND_JACK_HEADSET |
68 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
69 SND_JACK_BTN_2 | SND_JACK_BTN_3);
70
71 if (btn_type) {
72 /* button released */
73 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type,
74 SND_JACK_HEADSET |
75 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
76 SND_JACK_BTN_2 | SND_JACK_BTN_3);
77
78 mod_delayed_work(system_power_efficient_wq,
79 &rt721->jack_btn_check_work, msecs_to_jiffies(200));
80 }
81 }
82
rt721_sdca_btn_check_handler(struct work_struct * work)83 static void rt721_sdca_btn_check_handler(struct work_struct *work)
84 {
85 struct rt721_sdca_priv *rt721 =
86 container_of(work, struct rt721_sdca_priv, jack_btn_check_work.work);
87 int btn_type = 0, ret, idx;
88 unsigned int det_mode, offset, val;
89 unsigned char buf[3];
90
91 ret = regmap_read(rt721->regmap,
92 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49,
93 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode);
94 if (ret < 0)
95 goto io_error;
96
97 /* pin attached */
98 if (det_mode) {
99 /* read UMP message offset */
100 ret = regmap_read(rt721->regmap,
101 SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01,
102 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset);
103 if (ret < 0)
104 goto io_error;
105
106 for (idx = 0; idx < sizeof(buf); idx++) {
107 ret = regmap_read(rt721->regmap,
108 RT721_BUF_ADDR_HID1 + offset + idx, &val);
109 if (ret < 0)
110 goto io_error;
111 buf[idx] = val & 0xff;
112 }
113 /* Report ID for HID1 */
114 if (buf[0] == 0x11)
115 btn_type = rt_sdca_btn_type(&buf[1]);
116 } else
117 rt721->jack_type = 0;
118
119 dev_dbg(&rt721->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type);
120 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type,
121 SND_JACK_HEADSET |
122 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
123 SND_JACK_BTN_2 | SND_JACK_BTN_3);
124
125 if (btn_type) {
126 /* button released */
127 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type,
128 SND_JACK_HEADSET |
129 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
130 SND_JACK_BTN_2 | SND_JACK_BTN_3);
131
132 mod_delayed_work(system_power_efficient_wq,
133 &rt721->jack_btn_check_work, msecs_to_jiffies(200));
134 }
135
136 return;
137
138 io_error:
139 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
140 }
141
rt721_sdca_dmic_preset(struct rt721_sdca_priv * rt721)142 static void rt721_sdca_dmic_preset(struct rt721_sdca_priv *rt721)
143 {
144 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
145 RT721_MISC_POWER_CTL31, 0x8000);
146 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
147 RT721_VREF1_HV_CTRL1, 0xe000);
148 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
149 RT721_MISC_POWER_CTL31, 0x8007);
150 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
151 RT721_ENT_FLOAT_CTL9, 0x2a2a);
152 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
153 RT721_ENT_FLOAT_CTL10, 0x2a00);
154 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
155 RT721_ENT_FLOAT_CTL6, 0x2a2a);
156 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
157 RT721_ENT_FLOAT_CTL5, 0x2626);
158 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
159 RT721_ENT_FLOAT_CTL8, 0x1e00);
160 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
161 RT721_ENT_FLOAT_CTL7, 0x1515);
162 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
163 RT721_CH_FLOAT_CTL3, 0x0304);
164 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
165 RT721_CH_FLOAT_CTL4, 0x0304);
166 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
167 RT721_HDA_LEGACY_CTL1, 0x0000);
168 regmap_write(rt721->regmap,
169 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26,
170 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x01);
171 regmap_write(rt721->mbq_regmap, 0x5910009, 0x2e01);
172 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
173 RT721_RC_CALIB_CTRL0, 0x0b00);
174 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
175 RT721_RC_CALIB_CTRL0, 0x0b40);
176 regmap_write(rt721->regmap, 0x2f5c, 0x25);
177 }
178
rt721_sdca_amp_preset(struct rt721_sdca_priv * rt721)179 static void rt721_sdca_amp_preset(struct rt721_sdca_priv *rt721)
180 {
181 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
182 RT721_MISC_POWER_CTL31, 0x8000);
183 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
184 RT721_VREF1_HV_CTRL1, 0xe000);
185 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
186 RT721_MISC_POWER_CTL31, 0x8007);
187 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6420);
188 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6421);
189 regmap_write(rt721->mbq_regmap, 0x5810000, 0xe421);
190 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
191 RT721_CH_FLOAT_CTL6, 0x5561);
192 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_REG,
193 RT721_GPIO_PAD_CTRL5, 0x8003);
194 regmap_write(rt721->regmap,
195 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23,
196 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x04);
197 regmap_write(rt721->regmap,
198 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
199 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00);
200 regmap_write(rt721->regmap,
201 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
202 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00);
203 regmap_write(rt721->regmap,
204 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
205 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00);
206 regmap_write(rt721->regmap,
207 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
208 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00);
209 }
210
rt721_sdca_jack_preset(struct rt721_sdca_priv * rt721)211 static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721)
212 {
213 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
214 RT721_MISC_POWER_CTL31, 0x8000);
215 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
216 RT721_VREF1_HV_CTRL1, 0xe000);
217 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
218 RT721_MISC_POWER_CTL31, 0x8007);
219 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
220 RT721_GE_REL_CTRL1, 0x8011);
221 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
222 RT721_UMP_HID_CTRL3, 0xcf00);
223 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
224 RT721_UMP_HID_CTRL4, 0x000f);
225 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
226 RT721_UMP_HID_CTRL1, 0x1100);
227 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
228 RT721_UMP_HID_CTRL5, 0x0c12);
229 rt_sdca_index_write(rt721->mbq_regmap, RT721_JD_CTRL,
230 RT721_JD_1PIN_GAT_CTRL2, 0xc002);
231 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
232 RT721_RC_CALIB_CTRL0, 0x0b00);
233 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
234 RT721_RC_CALIB_CTRL0, 0x0b40);
235 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
236 RT721_UAJ_TOP_TCON14, 0x3333);
237 regmap_write(rt721->mbq_regmap, 0x5810035, 0x0036);
238 regmap_write(rt721->mbq_regmap, 0x5810030, 0xee00);
239 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL,
240 RT721_HP_AMP_2CH_CAL1, 0x0140);
241 regmap_write(rt721->mbq_regmap, 0x5810000, 0x0021);
242 regmap_write(rt721->mbq_regmap, 0x5810000, 0x8021);
243 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL,
244 RT721_HP_AMP_2CH_CAL18, 0x5522);
245 regmap_write(rt721->mbq_regmap, 0x5b10007, 0x2000);
246 regmap_write(rt721->mbq_regmap, 0x5B10017, 0x1b0f);
247 rt_sdca_index_write(rt721->mbq_regmap, RT721_CBJ_CTRL,
248 RT721_CBJ_A0_GAT_CTRL1, 0x2a02);
249 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL,
250 RT721_HP_AMP_2CH_CAL4, 0xa105);
251 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
252 RT721_UAJ_TOP_TCON14, 0x3b33);
253 regmap_write(rt721->mbq_regmap, 0x310400, 0x3023);
254 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
255 RT721_UAJ_TOP_TCON14, 0x3f33);
256 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
257 RT721_UAJ_TOP_TCON13, 0x6048);
258 regmap_write(rt721->mbq_regmap, 0x310401, 0x3000);
259 regmap_write(rt721->mbq_regmap, 0x310402, 0x1b00);
260 regmap_write(rt721->mbq_regmap, 0x310300, 0x000f);
261 regmap_write(rt721->mbq_regmap, 0x310301, 0x3000);
262 regmap_write(rt721->mbq_regmap, 0x310302, 0x1b00);
263 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
264 RT721_UAJ_TOP_TCON17, 0x0008);
265 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL,
266 RT721_DAC_2CH_CTRL3, 0x55ff);
267 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL,
268 RT721_DAC_2CH_CTRL4, 0xcc00);
269 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
270 RT721_MBIAS_LV_CTRL2, 0x6677);
271 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
272 RT721_VREF2_LV_CTRL1, 0x7600);
273 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
274 RT721_ENT_FLOAT_CTL2, 0x1234);
275 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
276 RT721_ENT_FLOAT_CTL3, 0x3512);
277 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
278 RT721_ENT_FLOAT_CTL1, 0x4040);
279 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
280 RT721_ENT_FLOAT_CTL4, 0x1201);
281 rt_sdca_index_write(rt721->mbq_regmap, RT721_BOOST_CTRL,
282 RT721_BST_4CH_TOP_GATING_CTRL1, 0x002a);
283 regmap_write(rt721->regmap, 0x2f58, 0x07);
284 }
285
rt721_sdca_jack_init(struct rt721_sdca_priv * rt721)286 static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721)
287 {
288 mutex_lock(&rt721->calibrate_mutex);
289 if (rt721->hs_jack) {
290 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1,
291 SDW_SCP_SDCA_INTMASK_SDCA_0);
292 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2,
293 SDW_SCP_SDCA_INTMASK_SDCA_8);
294 dev_dbg(&rt721->slave->dev, "in %s enable\n", __func__);
295 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
296 RT721_HDA_LEGACY_UAJ_CTL, 0x036E);
297 regmap_write(rt721->regmap,
298 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU03,
299 RT721_SDCA_CTL_SELECTED_MODE, 0), 0);
300 regmap_write(rt721->regmap,
301 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU0D,
302 RT721_SDCA_CTL_SELECTED_MODE, 0), 0);
303 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
304 RT721_XU_REL_CTRL, 0x0000);
305 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
306 RT721_GE_REL_CTRL1, 0x4000, 0x4000);
307 }
308 mutex_unlock(&rt721->calibrate_mutex);
309 }
310
rt721_sdca_set_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * hs_jack,void * data)311 static int rt721_sdca_set_jack_detect(struct snd_soc_component *component,
312 struct snd_soc_jack *hs_jack, void *data)
313 {
314 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
315 int ret;
316
317 rt721->hs_jack = hs_jack;
318
319 ret = pm_runtime_resume_and_get(component->dev);
320 if (ret < 0) {
321 if (ret != -EACCES) {
322 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret);
323 return ret;
324 }
325 /* pm_runtime not enabled yet */
326 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__);
327 return 0;
328 }
329
330 rt721_sdca_jack_init(rt721);
331
332 pm_runtime_put_autosuspend(component->dev);
333
334 return 0;
335 }
336
337 /* For SDCA control DAC/ADC Gain */
rt721_sdca_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)338 static int rt721_sdca_set_gain_put(struct snd_kcontrol *kcontrol,
339 struct snd_ctl_elem_value *ucontrol)
340 {
341 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
342 struct soc_mixer_control *mc =
343 (struct soc_mixer_control *)kcontrol->private_value;
344 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
345 unsigned int read_l, read_r, gain_l_val, gain_r_val;
346 unsigned int adc_vol_flag = 0, changed = 0;
347 unsigned int lvalue, rvalue;
348 const unsigned int interval_offset = 0xc0;
349 const unsigned int tendA = 0x200;
350 const unsigned int tendB = 0xa00;
351
352 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
353 strstr(ucontrol->id.name, "FU0F Capture Volume"))
354 adc_vol_flag = 1;
355
356 regmap_read(rt721->mbq_regmap, mc->reg, &lvalue);
357 regmap_read(rt721->mbq_regmap, mc->rreg, &rvalue);
358
359 /* L Channel */
360 gain_l_val = ucontrol->value.integer.value[0];
361 if (gain_l_val > mc->max)
362 gain_l_val = mc->max;
363
364 if (mc->shift == 8) {
365 /* boost gain */
366 gain_l_val = gain_l_val * tendB;
367 } else if (mc->shift == 1) {
368 /* FU33 boost gain */
369 if (gain_l_val == 0)
370 gain_l_val = 0x8000;
371 else
372 gain_l_val = (gain_l_val - 1) * tendA;
373 } else {
374 /* ADC/DAC gain */
375 if (adc_vol_flag)
376 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset);
377 else
378 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset);
379 gain_l_val &= 0xffff;
380 }
381
382 /* R Channel */
383 gain_r_val = ucontrol->value.integer.value[1];
384 if (gain_r_val > mc->max)
385 gain_r_val = mc->max;
386
387 if (mc->shift == 8) {
388 /* boost gain */
389 gain_r_val = gain_r_val * tendB;
390 } else if (mc->shift == 1) {
391 /* FU33 boost gain */
392 if (gain_r_val == 0)
393 gain_r_val = 0x8000;
394 else
395 gain_r_val = (gain_r_val - 1) * tendA;
396 } else {
397 /* ADC/DAC gain */
398 if (adc_vol_flag)
399 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset);
400 else
401 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset);
402 gain_r_val &= 0xffff;
403 }
404
405 if (lvalue != gain_l_val || rvalue != gain_r_val)
406 changed = 1;
407 else
408 return 0;
409
410 /* Lch*/
411 regmap_write(rt721->mbq_regmap, mc->reg, gain_l_val);
412
413 /* Rch */
414 regmap_write(rt721->mbq_regmap, mc->rreg, gain_r_val);
415
416 regmap_read(rt721->mbq_regmap, mc->reg, &read_l);
417 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r);
418 if (read_r == gain_r_val && read_l == gain_l_val)
419 return changed;
420
421 return -EIO;
422 }
423
rt721_sdca_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)424 static int rt721_sdca_set_gain_get(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_value *ucontrol)
426 {
427 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
428 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
429 struct soc_mixer_control *mc =
430 (struct soc_mixer_control *)kcontrol->private_value;
431 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0;
432 unsigned int adc_vol_flag = 0;
433 const unsigned int interval_offset = 0xc0;
434 const unsigned int tendA = 0x200;
435 const unsigned int tendB = 0xa00;
436
437 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
438 strstr(ucontrol->id.name, "FU0F Capture Volume"))
439 adc_vol_flag = 1;
440
441 regmap_read(rt721->mbq_regmap, mc->reg, &read_l);
442 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r);
443
444 if (mc->shift == 8) {
445 /* boost gain */
446 ctl_l = read_l / tendB;
447 } else if (mc->shift == 1) {
448 /* FU33 boost gain */
449 if (read_l == 0x8000 || read_l == 0xfe00)
450 ctl_l = 0;
451 else
452 ctl_l = read_l / tendA + 1;
453 } else {
454 if (adc_vol_flag)
455 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset);
456 else
457 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset);
458 }
459
460 if (read_l != read_r) {
461 if (mc->shift == 8) {
462 /* boost gain */
463 ctl_r = read_r / tendB;
464 } else if (mc->shift == 1) {
465 /* FU33 boost gain */
466 if (read_r == 0x8000 || read_r == 0xfe00)
467 ctl_r = 0;
468 else
469 ctl_r = read_r / tendA + 1;
470 } else { /* ADC/DAC gain */
471 if (adc_vol_flag)
472 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset);
473 else
474 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset);
475 }
476 } else {
477 ctl_r = ctl_l;
478 }
479
480 ucontrol->value.integer.value[0] = ctl_l;
481 ucontrol->value.integer.value[1] = ctl_r;
482
483 return 0;
484 }
485
rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv * rt721)486 static int rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv *rt721)
487 {
488 int err, i;
489 unsigned int ch_mute;
490
491 for (i = 0; i < ARRAY_SIZE(rt721->fu1e_mixer_mute); i++) {
492 ch_mute = rt721->fu1e_dapm_mute || rt721->fu1e_mixer_mute[i];
493 err = regmap_write(rt721->regmap,
494 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
495 RT721_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
496 if (err < 0)
497 return err;
498 }
499
500 return 0;
501 }
502
rt721_sdca_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)503 static int rt721_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol,
504 struct snd_ctl_elem_value *ucontrol)
505 {
506 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
507 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
508 struct rt721_sdca_dmic_kctrl_priv *p =
509 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
510 unsigned int i;
511
512 for (i = 0; i < p->count; i++)
513 ucontrol->value.integer.value[i] = !rt721->fu1e_mixer_mute[i];
514
515 return 0;
516 }
517
rt721_sdca_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)518 static int rt721_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol,
519 struct snd_ctl_elem_value *ucontrol)
520 {
521 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
522 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
523 struct rt721_sdca_dmic_kctrl_priv *p =
524 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
525 int err, changed = 0, i;
526
527 for (i = 0; i < p->count; i++) {
528 if (rt721->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
529 changed = 1;
530 rt721->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
531 }
532
533 err = rt721_sdca_set_fu1e_capture_ctl(rt721);
534 if (err < 0)
535 return err;
536
537 return changed;
538 }
539
rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv * rt721)540 static int rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv *rt721)
541 {
542 int err;
543 unsigned int ch_l, ch_r;
544
545 ch_l = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_l_mute) ? 0x01 : 0x00;
546 ch_r = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_r_mute) ? 0x01 : 0x00;
547
548 err = regmap_write(rt721->regmap,
549 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
550 RT721_SDCA_CTL_FU_MUTE, CH_L), ch_l);
551 if (err < 0)
552 return err;
553
554 err = regmap_write(rt721->regmap,
555 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
556 RT721_SDCA_CTL_FU_MUTE, CH_R), ch_r);
557 if (err < 0)
558 return err;
559
560 return 0;
561 }
562
rt721_sdca_fu0f_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)563 static int rt721_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol,
564 struct snd_ctl_elem_value *ucontrol)
565 {
566 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
567 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
568
569 ucontrol->value.integer.value[0] = !rt721->fu0f_mixer_l_mute;
570 ucontrol->value.integer.value[1] = !rt721->fu0f_mixer_r_mute;
571 return 0;
572 }
573
rt721_sdca_fu0f_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)574 static int rt721_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol,
575 struct snd_ctl_elem_value *ucontrol)
576 {
577 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
578 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
579 int err, changed = 0;
580
581 if (rt721->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] ||
582 rt721->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1])
583 changed = 1;
584
585 rt721->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0];
586 rt721->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1];
587 err = rt721_sdca_set_fu0f_capture_ctl(rt721);
588 if (err < 0)
589 return err;
590
591 return changed;
592 }
593
rt721_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)594 static int rt721_sdca_fu_info(struct snd_kcontrol *kcontrol,
595 struct snd_ctl_elem_info *uinfo)
596 {
597 struct rt721_sdca_dmic_kctrl_priv *p =
598 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
599
600 if (p->max == 1)
601 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
602 else
603 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
604 uinfo->count = p->count;
605 uinfo->value.integer.min = 0;
606 uinfo->value.integer.max = p->max;
607 return 0;
608 }
609
rt721_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)610 static int rt721_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
611 struct snd_ctl_elem_value *ucontrol)
612 {
613 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
614 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
615 struct rt721_sdca_dmic_kctrl_priv *p =
616 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
617 unsigned int boost_step = 0x0a00;
618 unsigned int vol_max = 0x1e00;
619 unsigned int regvalue, ctl, i;
620 unsigned int adc_vol_flag = 0;
621 const unsigned int interval_offset = 0xc0;
622
623 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
624 adc_vol_flag = 1;
625
626 /* check all channels */
627 for (i = 0; i < p->count; i++) {
628 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value);
629
630 if (!adc_vol_flag) /* boost gain */
631 ctl = regvalue / boost_step;
632 else /* ADC gain */
633 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset);
634
635 ucontrol->value.integer.value[i] = ctl;
636 }
637
638 return 0;
639 }
640
rt721_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)641 static int rt721_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643 {
644 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
645 struct rt721_sdca_dmic_kctrl_priv *p =
646 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
647 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
648 unsigned int boost_step = 0x0a00;
649 unsigned int vol_max = 0x1e00;
650 unsigned int gain_val[4];
651 unsigned int i, adc_vol_flag = 0, changed = 0;
652 unsigned int regvalue[4];
653 const unsigned int interval_offset = 0xc0;
654 int err;
655
656 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
657 adc_vol_flag = 1;
658
659 /* check all channels */
660 for (i = 0; i < p->count; i++) {
661 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value[i]);
662
663 gain_val[i] = ucontrol->value.integer.value[i];
664 if (gain_val[i] > p->max)
665 gain_val[i] = p->max;
666
667 if (!adc_vol_flag) /* boost gain */
668 gain_val[i] = gain_val[i] * boost_step;
669 else { /* ADC gain */
670 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset);
671 gain_val[i] &= 0xffff;
672 }
673
674 if (regvalue[i] != gain_val[i])
675 changed = 1;
676 }
677
678 if (!changed)
679 return 0;
680
681 for (i = 0; i < p->count; i++) {
682 err = regmap_write(rt721->mbq_regmap, p->reg_base + i, gain_val[i]);
683 if (err < 0)
684 dev_err(&rt721->slave->dev, "%#08x can't be set\n", p->reg_base + i);
685 }
686
687 return changed;
688 }
689
690 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
691 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0);
692 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0);
693 static const DECLARE_TLV_DB_SCALE(mic2_boost_vol_tlv, -200, 200, 0);
694
695 static const struct snd_kcontrol_new rt721_sdca_controls[] = {
696 /* Headphone playback settings */
697 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume",
698 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
699 RT721_SDCA_CTL_FU_VOLUME, CH_L),
700 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
701 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
702 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv),
703 /* Headset mic capture settings */
704 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0,
705 rt721_sdca_fu0f_capture_get, rt721_sdca_fu0f_capture_put),
706 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume",
707 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
708 RT721_SDCA_CTL_FU_VOLUME, CH_L),
709 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
710 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0,
711 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic_vol_tlv),
712 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume",
713 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44,
714 RT721_SDCA_CTL_FU_CH_GAIN, CH_L),
715 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44,
716 RT721_SDCA_CTL_FU_CH_GAIN, CH_R), 1, 0x15, 0,
717 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic2_boost_vol_tlv),
718 /* AMP playback settings */
719 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume",
720 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
721 RT721_SDCA_CTL_FU_VOLUME, CH_L),
722 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
723 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
724 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv),
725 /* DMIC capture settings */
726 RT_SDCA_FU_CTRL("FU1E Capture Switch",
727 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
728 RT721_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4, rt721_sdca_fu_info,
729 rt721_sdca_fu1e_capture_get, rt721_sdca_fu1e_capture_put),
730 RT_SDCA_EXT_TLV("FU1E Capture Volume",
731 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
732 RT721_SDCA_CTL_FU_VOLUME, CH_01),
733 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put,
734 4, 0x3f, mic_vol_tlv, rt721_sdca_fu_info),
735 RT_SDCA_EXT_TLV("FU15 Boost Volume",
736 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15,
737 RT721_SDCA_CTL_FU_CH_GAIN, CH_01),
738 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put,
739 4, 3, boost_vol_tlv, rt721_sdca_fu_info),
740 };
741
rt721_sdca_adc_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)742 static int rt721_sdca_adc_mux_get(struct snd_kcontrol *kcontrol,
743 struct snd_ctl_elem_value *ucontrol)
744 {
745 struct snd_soc_component *component =
746 snd_soc_dapm_kcontrol_component(kcontrol);
747 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
748 unsigned int val = 0, mask_sft, mask;
749
750 if (strstr(ucontrol->id.name, "ADC 09 Mux")) {
751 mask_sft = 12;
752 mask = 0x7;
753 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) {
754 mask_sft = 10;
755 mask = 0x3;
756 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) {
757 mask_sft = 8;
758 mask = 0x3;
759 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) {
760 mask_sft = 6;
761 mask = 0x3;
762 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) {
763 mask_sft = 4;
764 mask = 0x3;
765 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) {
766 mask_sft = 2;
767 mask = 0x3;
768 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) {
769 mask_sft = 0;
770 mask = 0x3;
771 } else
772 return -EINVAL;
773
774 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
775 RT721_HDA_LEGACY_MUX_CTL0, &val);
776
777 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & mask;
778
779 return 0;
780 }
781
rt721_sdca_adc_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)782 static int rt721_sdca_adc_mux_put(struct snd_kcontrol *kcontrol,
783 struct snd_ctl_elem_value *ucontrol)
784 {
785 struct snd_soc_component *component =
786 snd_soc_dapm_kcontrol_component(kcontrol);
787 struct snd_soc_dapm_context *dapm =
788 snd_soc_dapm_kcontrol_dapm(kcontrol);
789 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
790 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
791 unsigned int *item = ucontrol->value.enumerated.item;
792 unsigned int val, val2 = 0, change, mask_sft, mask;
793 unsigned int check;
794
795 if (item[0] >= e->items)
796 return -EINVAL;
797
798 if (strstr(ucontrol->id.name, "ADC 09 Mux")) {
799 mask_sft = 12;
800 mask = 0x7;
801 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) {
802 mask_sft = 10;
803 mask = 0x3;
804 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) {
805 mask_sft = 8;
806 mask = 0x3;
807 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) {
808 mask_sft = 6;
809 mask = 0x3;
810 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) {
811 mask_sft = 4;
812 mask = 0x3;
813 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) {
814 mask_sft = 2;
815 mask = 0x3;
816 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) {
817 mask_sft = 0;
818 mask = 0x3;
819 } else
820 return -EINVAL;
821
822 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
823 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
824 RT721_HDA_LEGACY_MUX_CTL0, &val2);
825
826 if (strstr(ucontrol->id.name, "ADC 09 Mux"))
827 val2 = (val2 >> mask_sft) & 0x7;
828 else
829 val2 = (val2 >> mask_sft) & 0x3;
830
831 if (val == val2)
832 change = 0;
833 else
834 change = 1;
835
836 if (change) {
837 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
838 RT721_HDA_LEGACY_MUX_CTL0, &check);
839 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
840 RT721_HDA_LEGACY_MUX_CTL0, mask << mask_sft,
841 val << mask_sft);
842 }
843
844 snd_soc_dapm_mux_update_power(dapm, kcontrol,
845 item[0], e, NULL);
846
847 return change;
848 }
849
850 static const char * const adc09_mux_text[] = {
851 "MIC2",
852 "LINE1",
853 "LINE2",
854 };
855 static const char * const adc07_10_mux_text[] = {
856 "DMIC1 RE",
857 "DMIC1 FE",
858 "DMIC2 RE",
859 "DMIC2 FE",
860 };
861
862 static SOC_ENUM_SINGLE_DECL(
863 rt721_adc09_enum, SND_SOC_NOPM, 0, adc09_mux_text);
864 static SOC_ENUM_SINGLE_DECL(
865 rt721_dmic_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
866
867 static const struct snd_kcontrol_new rt721_sdca_adc09_mux =
868 SOC_DAPM_ENUM_EXT("ADC 09 Mux", rt721_adc09_enum,
869 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
870 static const struct snd_kcontrol_new rt721_sdca_adc08_r_mux =
871 SOC_DAPM_ENUM_EXT("ADC 08 R Mux", rt721_dmic_enum,
872 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
873 static const struct snd_kcontrol_new rt721_sdca_adc08_l_mux =
874 SOC_DAPM_ENUM_EXT("ADC 08 L Mux", rt721_dmic_enum,
875 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
876 static const struct snd_kcontrol_new rt721_sdca_adc10_r_mux =
877 SOC_DAPM_ENUM_EXT("ADC 10 R Mux", rt721_dmic_enum,
878 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
879 static const struct snd_kcontrol_new rt721_sdca_adc10_l_mux =
880 SOC_DAPM_ENUM_EXT("ADC 10 L Mux", rt721_dmic_enum,
881 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
882 static const struct snd_kcontrol_new rt721_sdca_adc07_r_mux =
883 SOC_DAPM_ENUM_EXT("ADC 07 R Mux", rt721_dmic_enum,
884 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
885 static const struct snd_kcontrol_new rt721_sdca_adc07_l_mux =
886 SOC_DAPM_ENUM_EXT("ADC 07 L Mux", rt721_dmic_enum,
887 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
888
889
rt721_sdca_fu42_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)890 static int rt721_sdca_fu42_event(struct snd_soc_dapm_widget *w,
891 struct snd_kcontrol *kcontrol, int event)
892 {
893 struct snd_soc_component *component =
894 snd_soc_dapm_to_component(w->dapm);
895 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
896 unsigned char unmute = 0x0, mute = 0x1;
897
898 switch (event) {
899 case SND_SOC_DAPM_POST_PMU:
900 msleep(100);
901 regmap_write(rt721->regmap,
902 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
903 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute);
904 regmap_write(rt721->regmap,
905 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
906 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute);
907 break;
908 case SND_SOC_DAPM_PRE_PMD:
909 regmap_write(rt721->regmap,
910 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
911 RT721_SDCA_CTL_FU_MUTE, CH_L), mute);
912 regmap_write(rt721->regmap,
913 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
914 RT721_SDCA_CTL_FU_MUTE, CH_R), mute);
915 break;
916 }
917 return 0;
918 }
919
rt721_sdca_fu21_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)920 static int rt721_sdca_fu21_event(struct snd_soc_dapm_widget *w,
921 struct snd_kcontrol *kcontrol, int event)
922 {
923 struct snd_soc_component *component =
924 snd_soc_dapm_to_component(w->dapm);
925 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
926 unsigned char unmute = 0x0, mute = 0x1;
927
928 switch (event) {
929 case SND_SOC_DAPM_POST_PMU:
930 regmap_write(rt721->regmap,
931 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
932 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute);
933 regmap_write(rt721->regmap,
934 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
935 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute);
936 break;
937 case SND_SOC_DAPM_PRE_PMD:
938 regmap_write(rt721->regmap,
939 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
940 RT721_SDCA_CTL_FU_MUTE, CH_L), mute);
941 regmap_write(rt721->regmap,
942 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
943 RT721_SDCA_CTL_FU_MUTE, CH_R), mute);
944 break;
945 }
946 return 0;
947 }
948
rt721_sdca_fu23_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)949 static int rt721_sdca_fu23_event(struct snd_soc_dapm_widget *w,
950 struct snd_kcontrol *kcontrol, int event)
951 {
952 struct snd_soc_component *component =
953 snd_soc_dapm_to_component(w->dapm);
954 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
955 unsigned char unmute = 0x0, mute = 0x1;
956
957 switch (event) {
958 case SND_SOC_DAPM_POST_PMU:
959 regmap_write(rt721->regmap,
960 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
961 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute);
962 regmap_write(rt721->regmap,
963 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
964 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute);
965 break;
966 case SND_SOC_DAPM_PRE_PMD:
967 regmap_write(rt721->regmap,
968 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
969 RT721_SDCA_CTL_FU_MUTE, CH_L), mute);
970 regmap_write(rt721->regmap,
971 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
972 RT721_SDCA_CTL_FU_MUTE, CH_R), mute);
973 break;
974 }
975 return 0;
976 }
977
rt721_sdca_fu113_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)978 static int rt721_sdca_fu113_event(struct snd_soc_dapm_widget *w,
979 struct snd_kcontrol *kcontrol, int event)
980 {
981 struct snd_soc_component *component =
982 snd_soc_dapm_to_component(w->dapm);
983 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
984
985 switch (event) {
986 case SND_SOC_DAPM_POST_PMU:
987 rt721->fu1e_dapm_mute = false;
988 rt721_sdca_set_fu1e_capture_ctl(rt721);
989 break;
990 case SND_SOC_DAPM_PRE_PMD:
991 rt721->fu1e_dapm_mute = true;
992 rt721_sdca_set_fu1e_capture_ctl(rt721);
993 break;
994 }
995 return 0;
996 }
997
rt721_sdca_fu36_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)998 static int rt721_sdca_fu36_event(struct snd_soc_dapm_widget *w,
999 struct snd_kcontrol *kcontrol, int event)
1000 {
1001 struct snd_soc_component *component =
1002 snd_soc_dapm_to_component(w->dapm);
1003 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1004
1005 switch (event) {
1006 case SND_SOC_DAPM_POST_PMU:
1007 rt721->fu0f_dapm_mute = false;
1008 rt721_sdca_set_fu0f_capture_ctl(rt721);
1009 break;
1010 case SND_SOC_DAPM_PRE_PMD:
1011 rt721->fu0f_dapm_mute = true;
1012 rt721_sdca_set_fu0f_capture_ctl(rt721);
1013 break;
1014 }
1015 return 0;
1016 }
1017
rt721_sdca_pde47_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1018 static int rt721_sdca_pde47_event(struct snd_soc_dapm_widget *w,
1019 struct snd_kcontrol *kcontrol, int event)
1020 {
1021 struct snd_soc_component *component =
1022 snd_soc_dapm_to_component(w->dapm);
1023 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1024 unsigned char ps0 = 0x0, ps3 = 0x3;
1025
1026 switch (event) {
1027 case SND_SOC_DAPM_POST_PMU:
1028 regmap_write(rt721->regmap,
1029 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
1030 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1031 break;
1032 case SND_SOC_DAPM_PRE_PMD:
1033 regmap_write(rt721->regmap,
1034 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
1035 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1036 break;
1037 }
1038 return 0;
1039 }
1040
rt721_sdca_pde41_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1041 static int rt721_sdca_pde41_event(struct snd_soc_dapm_widget *w,
1042 struct snd_kcontrol *kcontrol, int event)
1043 {
1044 struct snd_soc_component *component =
1045 snd_soc_dapm_to_component(w->dapm);
1046 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1047 unsigned char ps0 = 0x0, ps3 = 0x3;
1048
1049 switch (event) {
1050 case SND_SOC_DAPM_POST_PMU:
1051 regmap_write(rt721->regmap,
1052 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41,
1053 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1054 break;
1055 case SND_SOC_DAPM_PRE_PMD:
1056 regmap_write(rt721->regmap,
1057 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41,
1058 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1059 break;
1060 }
1061 return 0;
1062 }
1063
rt721_sdca_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1064 static int rt721_sdca_pde11_event(struct snd_soc_dapm_widget *w,
1065 struct snd_kcontrol *kcontrol, int event)
1066 {
1067 struct snd_soc_component *component =
1068 snd_soc_dapm_to_component(w->dapm);
1069 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1070 unsigned char ps0 = 0x0, ps3 = 0x3;
1071
1072 switch (event) {
1073 case SND_SOC_DAPM_POST_PMU:
1074 regmap_write(rt721->regmap,
1075 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
1076 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1077 break;
1078 case SND_SOC_DAPM_PRE_PMD:
1079 regmap_write(rt721->regmap,
1080 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
1081 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1082 break;
1083 }
1084 return 0;
1085 }
1086
rt721_sdca_pde34_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1087 static int rt721_sdca_pde34_event(struct snd_soc_dapm_widget *w,
1088 struct snd_kcontrol *kcontrol, int event)
1089 {
1090 struct snd_soc_component *component =
1091 snd_soc_dapm_to_component(w->dapm);
1092 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1093 unsigned char ps0 = 0x0, ps3 = 0x3;
1094
1095 switch (event) {
1096 case SND_SOC_DAPM_POST_PMU:
1097 regmap_write(rt721->regmap,
1098 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
1099 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1100 break;
1101 case SND_SOC_DAPM_PRE_PMD:
1102 regmap_write(rt721->regmap,
1103 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
1104 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1105 break;
1106 }
1107 return 0;
1108 }
1109
1110 static const struct snd_soc_dapm_widget rt721_sdca_dapm_widgets[] = {
1111 SND_SOC_DAPM_OUTPUT("HP"),
1112 SND_SOC_DAPM_OUTPUT("SPK"),
1113 SND_SOC_DAPM_INPUT("MIC2"),
1114 SND_SOC_DAPM_INPUT("LINE1"),
1115 SND_SOC_DAPM_INPUT("LINE2"),
1116 SND_SOC_DAPM_INPUT("DMIC1_2"),
1117 SND_SOC_DAPM_INPUT("DMIC3_4"),
1118
1119 SND_SOC_DAPM_SUPPLY("PDE 41", SND_SOC_NOPM, 0, 0,
1120 rt721_sdca_pde41_event,
1121 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1122 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0,
1123 rt721_sdca_pde47_event,
1124 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1125 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
1126 rt721_sdca_pde11_event,
1127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1128 SND_SOC_DAPM_SUPPLY("PDE 34", SND_SOC_NOPM, 0, 0,
1129 rt721_sdca_pde34_event,
1130 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1131
1132 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0,
1133 rt721_sdca_fu21_event,
1134 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1135 SND_SOC_DAPM_DAC_E("FU 23", NULL, SND_SOC_NOPM, 0, 0,
1136 rt721_sdca_fu23_event,
1137 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1138 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0,
1139 rt721_sdca_fu42_event,
1140 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1141 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0,
1142 rt721_sdca_fu36_event,
1143 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1144 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0,
1145 rt721_sdca_fu113_event,
1146 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1147 SND_SOC_DAPM_MUX("ADC 09 Mux", SND_SOC_NOPM, 0, 0,
1148 &rt721_sdca_adc09_mux),
1149 SND_SOC_DAPM_MUX("ADC 08 R Mux", SND_SOC_NOPM, 0, 0,
1150 &rt721_sdca_adc08_r_mux),
1151 SND_SOC_DAPM_MUX("ADC 08 L Mux", SND_SOC_NOPM, 0, 0,
1152 &rt721_sdca_adc08_l_mux),
1153 SND_SOC_DAPM_MUX("ADC 10 R Mux", SND_SOC_NOPM, 0, 0,
1154 &rt721_sdca_adc10_r_mux),
1155 SND_SOC_DAPM_MUX("ADC 10 L Mux", SND_SOC_NOPM, 0, 0,
1156 &rt721_sdca_adc10_l_mux),
1157 SND_SOC_DAPM_MUX("ADC 07 R Mux", SND_SOC_NOPM, 0, 0,
1158 &rt721_sdca_adc07_r_mux),
1159 SND_SOC_DAPM_MUX("ADC 07 L Mux", SND_SOC_NOPM, 0, 0,
1160 &rt721_sdca_adc07_l_mux),
1161
1162 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0),
1163 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0),
1164 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0),
1165 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0),
1166 };
1167
1168 static const struct snd_soc_dapm_route rt721_sdca_audio_map[] = {
1169 {"FU 42", NULL, "DP1RX"},
1170 {"FU 21", NULL, "DP3RX"},
1171 {"FU 23", NULL, "DP3RX"},
1172
1173 {"ADC 09 Mux", "MIC2", "MIC2"},
1174 {"ADC 09 Mux", "LINE1", "LINE1"},
1175 {"ADC 09 Mux", "LINE2", "LINE2"},
1176 {"ADC 07 R Mux", "DMIC1 RE", "DMIC1_2"},
1177 {"ADC 07 R Mux", "DMIC1 FE", "DMIC1_2"},
1178 {"ADC 07 R Mux", "DMIC2 RE", "DMIC3_4"},
1179 {"ADC 07 R Mux", "DMIC2 FE", "DMIC3_4"},
1180 {"ADC 07 L Mux", "DMIC1 RE", "DMIC1_2"},
1181 {"ADC 07 L Mux", "DMIC1 FE", "DMIC1_2"},
1182 {"ADC 07 L Mux", "DMIC2 RE", "DMIC3_4"},
1183 {"ADC 07 L Mux", "DMIC2 FE", "DMIC3_4"},
1184 {"ADC 08 R Mux", "DMIC1 RE", "DMIC1_2"},
1185 {"ADC 08 R Mux", "DMIC1 FE", "DMIC1_2"},
1186 {"ADC 08 R Mux", "DMIC2 RE", "DMIC3_4"},
1187 {"ADC 08 R Mux", "DMIC2 FE", "DMIC3_4"},
1188 {"ADC 08 L Mux", "DMIC1 RE", "DMIC1_2"},
1189 {"ADC 08 L Mux", "DMIC1 FE", "DMIC1_2"},
1190 {"ADC 08 L Mux", "DMIC2 RE", "DMIC3_4"},
1191 {"ADC 08 L Mux", "DMIC2 FE", "DMIC3_4"},
1192 {"ADC 10 R Mux", "DMIC1 RE", "DMIC1_2"},
1193 {"ADC 10 R Mux", "DMIC1 FE", "DMIC1_2"},
1194 {"ADC 10 R Mux", "DMIC2 RE", "DMIC3_4"},
1195 {"ADC 10 R Mux", "DMIC2 FE", "DMIC3_4"},
1196 {"ADC 10 L Mux", "DMIC1 RE", "DMIC1_2"},
1197 {"ADC 10 L Mux", "DMIC1 FE", "DMIC1_2"},
1198 {"ADC 10 L Mux", "DMIC2 RE", "DMIC3_4"},
1199 {"ADC 10 L Mux", "DMIC2 FE", "DMIC3_4"},
1200 {"FU 36", NULL, "PDE 34"},
1201 {"FU 36", NULL, "ADC 09 Mux"},
1202 {"FU 113", NULL, "PDE 11"},
1203 {"FU 113", NULL, "ADC 07 R Mux"},
1204 {"FU 113", NULL, "ADC 07 L Mux"},
1205 {"FU 113", NULL, "ADC 10 R Mux"},
1206 {"FU 113", NULL, "ADC 10 L Mux"},
1207 {"DP2TX", NULL, "FU 36"},
1208 {"DP6TX", NULL, "FU 113"},
1209
1210 {"HP", NULL, "PDE 47"},
1211 {"HP", NULL, "FU 42"},
1212 {"SPK", NULL, "PDE 41"},
1213 {"SPK", NULL, "FU 21"},
1214 {"SPK", NULL, "FU 23"},
1215 };
1216
rt721_sdca_parse_dt(struct rt721_sdca_priv * rt721,struct device * dev)1217 static int rt721_sdca_parse_dt(struct rt721_sdca_priv *rt721, struct device *dev)
1218 {
1219 device_property_read_u32(dev, "realtek,jd-src", &rt721->jd_src);
1220
1221 return 0;
1222 }
1223
rt721_sdca_probe(struct snd_soc_component * component)1224 static int rt721_sdca_probe(struct snd_soc_component *component)
1225 {
1226 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1227 int ret;
1228
1229 rt721_sdca_parse_dt(rt721, &rt721->slave->dev);
1230 rt721->component = component;
1231
1232 ret = pm_runtime_resume(component->dev);
1233 if (ret < 0 && ret != -EACCES)
1234 return ret;
1235
1236 return 0;
1237 }
1238
1239 static const struct snd_soc_component_driver soc_sdca_dev_rt721 = {
1240 .probe = rt721_sdca_probe,
1241 .controls = rt721_sdca_controls,
1242 .num_controls = ARRAY_SIZE(rt721_sdca_controls),
1243 .dapm_widgets = rt721_sdca_dapm_widgets,
1244 .num_dapm_widgets = ARRAY_SIZE(rt721_sdca_dapm_widgets),
1245 .dapm_routes = rt721_sdca_audio_map,
1246 .num_dapm_routes = ARRAY_SIZE(rt721_sdca_audio_map),
1247 .set_jack = rt721_sdca_set_jack_detect,
1248 .endianness = 1,
1249 };
1250
rt721_sdca_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)1251 static int rt721_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
1252 int direction)
1253 {
1254 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
1255
1256 return 0;
1257 }
1258
rt721_sdca_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1259 static void rt721_sdca_shutdown(struct snd_pcm_substream *substream,
1260 struct snd_soc_dai *dai)
1261 {
1262 snd_soc_dai_set_dma_data(dai, substream, NULL);
1263 }
1264
rt721_sdca_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1265 static int rt721_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
1266 struct snd_pcm_hw_params *params,
1267 struct snd_soc_dai *dai)
1268 {
1269 struct snd_soc_component *component = dai->component;
1270 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1271 struct sdw_stream_config stream_config;
1272 struct sdw_port_config port_config;
1273 enum sdw_data_direction direction;
1274 struct sdw_stream_runtime *sdw_stream;
1275 int retval, port, num_channels;
1276 unsigned int sampling_rate;
1277
1278 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
1279 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
1280
1281 if (!sdw_stream)
1282 return -EINVAL;
1283
1284 if (!rt721->slave)
1285 return -EINVAL;
1286
1287 /*
1288 * RT721_AIF1 with port = 1 for headphone playback
1289 * RT721_AIF1 with port = 2 for headset-mic capture
1290 * RT721_AIF2 with port = 3 for speaker playback
1291 * RT721_AIF3 with port = 6 for digital-mic capture
1292 */
1293 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1294 direction = SDW_DATA_DIR_RX;
1295 if (dai->id == RT721_AIF1)
1296 port = 1;
1297 else if (dai->id == RT721_AIF2)
1298 port = 3;
1299 else
1300 return -EINVAL;
1301 } else {
1302 direction = SDW_DATA_DIR_TX;
1303 if (dai->id == RT721_AIF1)
1304 port = 2;
1305 else if (dai->id == RT721_AIF3)
1306 port = 6;
1307 else
1308 return -EINVAL;
1309 }
1310 stream_config.frame_rate = params_rate(params);
1311 stream_config.ch_count = params_channels(params);
1312 stream_config.bps = snd_pcm_format_width(params_format(params));
1313 stream_config.direction = direction;
1314
1315 num_channels = params_channels(params);
1316 port_config.ch_mask = GENMASK(num_channels - 1, 0);
1317 port_config.num = port;
1318
1319 retval = sdw_stream_add_slave(rt721->slave, &stream_config,
1320 &port_config, 1, sdw_stream);
1321 if (retval) {
1322 dev_err(dai->dev, "Unable to configure port\n");
1323 return retval;
1324 }
1325
1326 if (params_channels(params) > 16) {
1327 dev_err(component->dev, "Unsupported channels %d\n",
1328 params_channels(params));
1329 return -EINVAL;
1330 }
1331
1332 /* sampling rate configuration */
1333 switch (params_rate(params)) {
1334 case 8000:
1335 sampling_rate = RT721_SDCA_RATE_8000HZ;
1336 break;
1337 case 16000:
1338 sampling_rate = RT721_SDCA_RATE_16000HZ;
1339 break;
1340 case 24000:
1341 sampling_rate = RT721_SDCA_RATE_24000HZ;
1342 break;
1343 case 32000:
1344 sampling_rate = RT721_SDCA_RATE_32000HZ;
1345 break;
1346 case 44100:
1347 sampling_rate = RT721_SDCA_RATE_44100HZ;
1348 break;
1349 case 48000:
1350 sampling_rate = RT721_SDCA_RATE_48000HZ;
1351 break;
1352 case 96000:
1353 sampling_rate = RT721_SDCA_RATE_96000HZ;
1354 break;
1355 case 192000:
1356 sampling_rate = RT721_SDCA_RATE_192000HZ;
1357 break;
1358 case 384000:
1359 sampling_rate = RT721_SDCA_RATE_384000HZ;
1360 break;
1361 case 768000:
1362 sampling_rate = RT721_SDCA_RATE_768000HZ;
1363 break;
1364 default:
1365 dev_err(component->dev, "Rate %d is not supported\n",
1366 params_rate(params));
1367 return -EINVAL;
1368 }
1369
1370 /* set sampling frequency */
1371 if (dai->id == RT721_AIF1) {
1372 regmap_write(rt721->regmap,
1373 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01,
1374 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1375 regmap_write(rt721->regmap,
1376 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11,
1377 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1378 }
1379
1380 if (dai->id == RT721_AIF2)
1381 regmap_write(rt721->regmap,
1382 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31,
1383 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1384
1385 if (dai->id == RT721_AIF3)
1386 regmap_write(rt721->regmap,
1387 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F,
1388 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1389
1390 return 0;
1391 }
1392
rt721_sdca_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1393 static int rt721_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
1394 struct snd_soc_dai *dai)
1395 {
1396 struct snd_soc_component *component = dai->component;
1397 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1398 struct sdw_stream_runtime *sdw_stream =
1399 snd_soc_dai_get_dma_data(dai, substream);
1400
1401 if (!rt721->slave)
1402 return -EINVAL;
1403
1404 sdw_stream_remove_slave(rt721->slave, sdw_stream);
1405 return 0;
1406 }
1407
1408 #define RT721_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
1409 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
1410 #define RT721_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1411 SNDRV_PCM_FMTBIT_S24_LE)
1412
1413 static const struct snd_soc_dai_ops rt721_sdca_ops = {
1414 .hw_params = rt721_sdca_pcm_hw_params,
1415 .hw_free = rt721_sdca_pcm_hw_free,
1416 .set_stream = rt721_sdca_set_sdw_stream,
1417 .shutdown = rt721_sdca_shutdown,
1418 };
1419
1420 static struct snd_soc_dai_driver rt721_sdca_dai[] = {
1421 {
1422 .name = "rt721-sdca-aif1",
1423 .id = RT721_AIF1,
1424 .playback = {
1425 .stream_name = "DP1 Headphone Playback",
1426 .channels_min = 1,
1427 .channels_max = 2,
1428 .rates = RT721_STEREO_RATES,
1429 .formats = RT721_FORMATS,
1430 },
1431 .capture = {
1432 .stream_name = "DP2 Headset Capture",
1433 .channels_min = 1,
1434 .channels_max = 2,
1435 .rates = RT721_STEREO_RATES,
1436 .formats = RT721_FORMATS,
1437 },
1438 .ops = &rt721_sdca_ops,
1439 },
1440 {
1441 .name = "rt721-sdca-aif2",
1442 .id = RT721_AIF2,
1443 .playback = {
1444 .stream_name = "DP3 Speaker Playback",
1445 .channels_min = 1,
1446 .channels_max = 2,
1447 .rates = RT721_STEREO_RATES,
1448 .formats = RT721_FORMATS,
1449 },
1450 .ops = &rt721_sdca_ops,
1451 },
1452 {
1453 .name = "rt721-sdca-aif3",
1454 .id = RT721_AIF3,
1455 .capture = {
1456 .stream_name = "DP6 DMic Capture",
1457 .channels_min = 1,
1458 .channels_max = 4,
1459 .rates = RT721_STEREO_RATES,
1460 .formats = RT721_FORMATS,
1461 },
1462 .ops = &rt721_sdca_ops,
1463 }
1464 };
1465
rt721_sdca_init(struct device * dev,struct regmap * regmap,struct regmap * mbq_regmap,struct sdw_slave * slave)1466 int rt721_sdca_init(struct device *dev, struct regmap *regmap,
1467 struct regmap *mbq_regmap, struct sdw_slave *slave)
1468 {
1469 struct rt721_sdca_priv *rt721;
1470
1471 rt721 = devm_kzalloc(dev, sizeof(*rt721), GFP_KERNEL);
1472 if (!rt721)
1473 return -ENOMEM;
1474
1475 dev_set_drvdata(dev, rt721);
1476 rt721->slave = slave;
1477 rt721->regmap = regmap;
1478 rt721->mbq_regmap = mbq_regmap;
1479
1480 regcache_cache_only(rt721->regmap, true);
1481 regcache_cache_only(rt721->mbq_regmap, true);
1482
1483 mutex_init(&rt721->calibrate_mutex);
1484 mutex_init(&rt721->disable_irq_lock);
1485
1486 INIT_DELAYED_WORK(&rt721->jack_detect_work, rt721_sdca_jack_detect_handler);
1487 INIT_DELAYED_WORK(&rt721->jack_btn_check_work, rt721_sdca_btn_check_handler);
1488
1489 /*
1490 * Mark hw_init to false
1491 * HW init will be performed when device reports present
1492 */
1493 rt721->hw_init = false;
1494 rt721->first_hw_init = false;
1495 rt721->fu1e_dapm_mute = true;
1496 rt721->fu0f_dapm_mute = true;
1497 rt721->fu0f_mixer_l_mute = rt721->fu0f_mixer_r_mute = true;
1498 rt721->fu1e_mixer_mute[0] = rt721->fu1e_mixer_mute[1] =
1499 rt721->fu1e_mixer_mute[2] = rt721->fu1e_mixer_mute[3] = true;
1500
1501 return devm_snd_soc_register_component(dev,
1502 &soc_sdca_dev_rt721, rt721_sdca_dai, ARRAY_SIZE(rt721_sdca_dai));
1503 }
1504
rt721_sdca_io_init(struct device * dev,struct sdw_slave * slave)1505 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1506 {
1507 struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev);
1508
1509 rt721->disable_irq = false;
1510
1511 if (rt721->hw_init)
1512 return 0;
1513
1514 regcache_cache_only(rt721->regmap, false);
1515 regcache_cache_only(rt721->mbq_regmap, false);
1516 if (rt721->first_hw_init) {
1517 regcache_cache_bypass(rt721->regmap, true);
1518 regcache_cache_bypass(rt721->mbq_regmap, true);
1519 } else {
1520 /*
1521 * PM runtime is only enabled when a Slave reports as Attached
1522 */
1523
1524 /* set autosuspend parameters */
1525 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1526 pm_runtime_use_autosuspend(&slave->dev);
1527
1528 /* update count of parent 'active' children */
1529 pm_runtime_set_active(&slave->dev);
1530
1531 /* make sure the device does not suspend immediately */
1532 pm_runtime_mark_last_busy(&slave->dev);
1533
1534 pm_runtime_enable(&slave->dev);
1535 }
1536
1537 pm_runtime_get_noresume(&slave->dev);
1538 rt721_sdca_dmic_preset(rt721);
1539 rt721_sdca_amp_preset(rt721);
1540 rt721_sdca_jack_preset(rt721);
1541 if (rt721->first_hw_init) {
1542 regcache_cache_bypass(rt721->regmap, false);
1543 regcache_mark_dirty(rt721->regmap);
1544 regcache_cache_bypass(rt721->mbq_regmap, false);
1545 regcache_mark_dirty(rt721->mbq_regmap);
1546 } else
1547 rt721->first_hw_init = true;
1548
1549 /* Mark Slave initialization complete */
1550 rt721->hw_init = true;
1551
1552 pm_runtime_put_autosuspend(&slave->dev);
1553
1554 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
1555 return 0;
1556 }
1557
1558 MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver");
1559 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1560 MODULE_LICENSE("GPL");
1561