1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt712-sdca-dmic.c -- rt712 SDCA DMIC ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/module.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/soundwire/sdw_registers.h>
12 #include <linux/slab.h>
13 #include <sound/core.h>
14 #include <sound/pcm.h>
15 #include <sound/pcm_params.h>
16 #include <sound/tlv.h>
17 #include "rt712-sdca.h"
18 #include "rt712-sdca-dmic.h"
19
rt712_sdca_dmic_readable_register(struct device * dev,unsigned int reg)20 static bool rt712_sdca_dmic_readable_register(struct device *dev, unsigned int reg)
21 {
22 switch (reg) {
23 case 0x201a ... 0x201f:
24 case 0x2029 ... 0x202a:
25 case 0x202d ... 0x2034:
26 case 0x2230 ... 0x2232:
27 case 0x2f01 ... 0x2f0a:
28 case 0x2f35 ... 0x2f36:
29 case 0x2f52:
30 case 0x2f58 ... 0x2f59:
31 case 0x3201:
32 case 0x320c:
33 return true;
34 default:
35 return false;
36 }
37 }
38
rt712_sdca_dmic_volatile_register(struct device * dev,unsigned int reg)39 static bool rt712_sdca_dmic_volatile_register(struct device *dev, unsigned int reg)
40 {
41 switch (reg) {
42 case 0x201b:
43 case 0x201c:
44 case 0x201d:
45 case 0x201f:
46 case 0x202d ... 0x202f:
47 case 0x2230:
48 case 0x2f01:
49 case 0x2f35:
50 case 0x320c:
51 return true;
52 default:
53 return false;
54 }
55 }
56
rt712_sdca_dmic_mbq_readable_register(struct device * dev,unsigned int reg)57 static bool rt712_sdca_dmic_mbq_readable_register(struct device *dev, unsigned int reg)
58 {
59 switch (reg) {
60 case 0x2000000 ... 0x200008e:
61 case 0x5300000 ... 0x530000e:
62 case 0x5400000 ... 0x540000e:
63 case 0x5600000 ... 0x5600008:
64 case 0x5700000 ... 0x570000d:
65 case 0x5800000 ... 0x5800021:
66 case 0x5900000 ... 0x5900028:
67 case 0x5a00000 ... 0x5a00009:
68 case 0x5b00000 ... 0x5b00051:
69 case 0x5c00000 ... 0x5c0009a:
70 case 0x5d00000 ... 0x5d00009:
71 case 0x5f00000 ... 0x5f00030:
72 case 0x6100000 ... 0x6100068:
73 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
74 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
75 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
76 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
77 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
78 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
79 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
80 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
81 return true;
82 default:
83 return false;
84 }
85 }
86
rt712_sdca_dmic_mbq_volatile_register(struct device * dev,unsigned int reg)87 static bool rt712_sdca_dmic_mbq_volatile_register(struct device *dev, unsigned int reg)
88 {
89 switch (reg) {
90 case 0x2000000:
91 case 0x200001a:
92 case 0x2000024:
93 case 0x2000046:
94 case 0x200008a:
95 case 0x5800000:
96 case 0x5800001:
97 case 0x6100008:
98 return true;
99 default:
100 return false;
101 }
102 }
103
104 static const struct regmap_config rt712_sdca_dmic_regmap = {
105 .reg_bits = 32,
106 .val_bits = 8,
107 .readable_reg = rt712_sdca_dmic_readable_register,
108 .volatile_reg = rt712_sdca_dmic_volatile_register,
109 .max_register = 0x40981300,
110 .reg_defaults = rt712_sdca_dmic_reg_defaults,
111 .num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_reg_defaults),
112 .cache_type = REGCACHE_MAPLE,
113 .use_single_read = true,
114 .use_single_write = true,
115 };
116
117 static const struct regmap_config rt712_sdca_dmic_mbq_regmap = {
118 .name = "sdw-mbq",
119 .reg_bits = 32,
120 .val_bits = 16,
121 .readable_reg = rt712_sdca_dmic_mbq_readable_register,
122 .volatile_reg = rt712_sdca_dmic_mbq_volatile_register,
123 .max_register = 0x40800f14,
124 .reg_defaults = rt712_sdca_dmic_mbq_defaults,
125 .num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_mbq_defaults),
126 .cache_type = REGCACHE_MAPLE,
127 .use_single_read = true,
128 .use_single_write = true,
129 };
130
rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int value)131 static int rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv *rt712,
132 unsigned int nid, unsigned int reg, unsigned int value)
133 {
134 int ret;
135 struct regmap *regmap = rt712->mbq_regmap;
136 unsigned int addr = (nid << 20) | reg;
137
138 ret = regmap_write(regmap, addr, value);
139 if (ret < 0)
140 dev_err(&rt712->slave->dev,
141 "%s: Failed to set private value: %06x <= %04x ret=%d\n",
142 __func__, addr, value, ret);
143
144 return ret;
145 }
146
rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int * value)147 static int rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv *rt712,
148 unsigned int nid, unsigned int reg, unsigned int *value)
149 {
150 int ret;
151 struct regmap *regmap = rt712->mbq_regmap;
152 unsigned int addr = (nid << 20) | reg;
153
154 ret = regmap_read(regmap, addr, value);
155 if (ret < 0)
156 dev_err(&rt712->slave->dev,
157 "%s: Failed to get private value: %06x => %04x ret=%d\n",
158 __func__, addr, *value, ret);
159
160 return ret;
161 }
162
rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)163 static int rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv *rt712,
164 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
165 {
166 unsigned int tmp;
167 int ret;
168
169 ret = rt712_sdca_dmic_index_read(rt712, nid, reg, &tmp);
170 if (ret < 0)
171 return ret;
172
173 set_mask_bits(&tmp, mask, val);
174 return rt712_sdca_dmic_index_write(rt712, nid, reg, tmp);
175 }
176
rt712_sdca_dmic_io_init(struct device * dev,struct sdw_slave * slave)177 static int rt712_sdca_dmic_io_init(struct device *dev, struct sdw_slave *slave)
178 {
179 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
180
181 if (rt712->hw_init)
182 return 0;
183
184 regcache_cache_only(rt712->regmap, false);
185 regcache_cache_only(rt712->mbq_regmap, false);
186 if (rt712->first_hw_init) {
187 regcache_cache_bypass(rt712->regmap, true);
188 regcache_cache_bypass(rt712->mbq_regmap, true);
189 } else {
190 /*
191 * PM runtime status is marked as 'active' only when a Slave reports as Attached
192 */
193
194 /* update count of parent 'active' children */
195 pm_runtime_set_active(&slave->dev);
196 }
197
198 pm_runtime_get_noresume(&slave->dev);
199
200 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
201 RT712_ADC0A_08_PDE_FLOAT_CTL, 0x1112);
202 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
203 RT712_ADC0B_11_PDE_FLOAT_CTL, 0x1111);
204 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
205 RT712_DMIC1_2_PDE_FLOAT_CTL, 0x1111);
206 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
207 RT712_I2S_IN_OUT_PDE_FLOAT_CTL, 0x1155);
208 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
209 RT712_DMIC_ENT_FLOAT_CTL, 0x2626);
210 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
211 RT712_ADC_ENT_FLOAT_CTL, 0x1e19);
212 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
213 RT712_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
214 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
215 RT712_ADC_VOL_CH_FLOAT_CTL2, 0x0304);
216 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
217 RT712_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
218 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
219 RT712_HDA_LEGACY_CONFIG_CTL0, 0x0050);
220 regmap_write(rt712->regmap,
221 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
222 rt712_sdca_dmic_index_write(rt712, RT712_ULTRA_SOUND_DET,
223 RT712_ULTRA_SOUND_DETECTOR6, 0x3200);
224 regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
225 regmap_write(rt712->regmap, 0x2f52, 0x00);
226
227 if (rt712->first_hw_init) {
228 regcache_cache_bypass(rt712->regmap, false);
229 regcache_mark_dirty(rt712->regmap);
230 regcache_cache_bypass(rt712->mbq_regmap, false);
231 regcache_mark_dirty(rt712->mbq_regmap);
232 } else
233 rt712->first_hw_init = true;
234
235 /* Mark Slave initialization complete */
236 rt712->hw_init = true;
237
238 pm_runtime_put_autosuspend(&slave->dev);
239
240 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
241 return 0;
242 }
243
rt712_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)244 static int rt712_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
245 struct snd_ctl_elem_value *ucontrol)
246 {
247 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
248 struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
249 struct rt712_sdca_dmic_kctrl_priv *p =
250 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
251 unsigned int regvalue, ctl, i;
252 unsigned int adc_vol_flag = 0;
253 const unsigned int interval_offset = 0xc0;
254
255 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
256 adc_vol_flag = 1;
257
258 /* check all channels */
259 for (i = 0; i < p->count; i++) {
260 regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value);
261
262 if (!adc_vol_flag) /* boost gain */
263 ctl = regvalue / 0x0a00;
264 else /* ADC gain */
265 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
266
267 ucontrol->value.integer.value[i] = ctl;
268 }
269
270 return 0;
271 }
272
rt712_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)273 static int rt712_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
274 struct snd_ctl_elem_value *ucontrol)
275 {
276 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
277 struct rt712_sdca_dmic_kctrl_priv *p =
278 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
279 struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
280 unsigned int gain_val[4];
281 unsigned int i, adc_vol_flag = 0, changed = 0;
282 unsigned int regvalue[4];
283 const unsigned int interval_offset = 0xc0;
284 int err;
285
286 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
287 adc_vol_flag = 1;
288
289 /* check all channels */
290 for (i = 0; i < p->count; i++) {
291 regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value[i]);
292
293 gain_val[i] = ucontrol->value.integer.value[i];
294 if (gain_val[i] > p->max)
295 gain_val[i] = p->max;
296
297 if (!adc_vol_flag) /* boost gain */
298 gain_val[i] = gain_val[i] * 0x0a00;
299 else { /* ADC gain */
300 gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
301 gain_val[i] &= 0xffff;
302 }
303
304 if (regvalue[i] != gain_val[i])
305 changed = 1;
306 }
307
308 if (!changed)
309 return 0;
310
311 for (i = 0; i < p->count; i++) {
312 err = regmap_write(rt712->mbq_regmap, p->reg_base + i, gain_val[i]);
313 if (err < 0)
314 dev_err(&rt712->slave->dev, "%s: 0x%08x can't be set\n",
315 __func__, p->reg_base + i);
316 }
317
318 return changed;
319 }
320
rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv * rt712)321 static int rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv *rt712)
322 {
323 int err, i;
324 unsigned int ch_mute;
325
326 for (i = 0; i < ARRAY_SIZE(rt712->fu1e_mixer_mute); i++) {
327 ch_mute = (rt712->fu1e_dapm_mute || rt712->fu1e_mixer_mute[i]) ? 0x01 : 0x00;
328 err = regmap_write(rt712->regmap,
329 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E,
330 RT712_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
331 if (err < 0)
332 return err;
333 }
334
335 return 0;
336 }
337
rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)338 static int rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol *kcontrol,
339 struct snd_ctl_elem_value *ucontrol)
340 {
341 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
342 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
343 struct rt712_sdca_dmic_kctrl_priv *p =
344 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
345 unsigned int i;
346
347 for (i = 0; i < p->count; i++)
348 ucontrol->value.integer.value[i] = !rt712->fu1e_mixer_mute[i];
349
350 return 0;
351 }
352
rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)353 static int rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol *kcontrol,
354 struct snd_ctl_elem_value *ucontrol)
355 {
356 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
357 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
358 struct rt712_sdca_dmic_kctrl_priv *p =
359 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
360 int err, changed = 0, i;
361
362 for (i = 0; i < p->count; i++) {
363 if (rt712->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
364 changed = 1;
365 rt712->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
366 }
367
368 err = rt712_sdca_set_fu1e_capture_ctl(rt712);
369 if (err < 0)
370 return err;
371
372 return changed;
373 }
374
rt712_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)375 static int rt712_sdca_fu_info(struct snd_kcontrol *kcontrol,
376 struct snd_ctl_elem_info *uinfo)
377 {
378 struct rt712_sdca_dmic_kctrl_priv *p =
379 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
380
381 if (p->max == 1)
382 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
383 else
384 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
385 uinfo->count = p->count;
386 uinfo->value.integer.min = 0;
387 uinfo->value.integer.max = p->max;
388 return 0;
389 }
390
391 #define RT712_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
392 ((unsigned long)&(struct rt712_sdca_dmic_kctrl_priv) \
393 {.reg_base = xreg_base, .count = xcount, .max = xmax, \
394 .invert = xinvert})
395
396 #define RT712_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
397 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
398 .info = rt712_sdca_fu_info, \
399 .get = rt712_sdca_dmic_fu1e_capture_get, \
400 .put = rt712_sdca_dmic_fu1e_capture_put, \
401 .private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
402
403 #define RT712_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
404 xhandler_put, xcount, xmax, tlv_array) \
405 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
406 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
407 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
408 .tlv.p = (tlv_array), \
409 .info = rt712_sdca_fu_info, \
410 .get = xhandler_get, .put = xhandler_put, \
411 .private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
412
413 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
414 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
415
416 static const struct snd_kcontrol_new rt712_sdca_dmic_snd_controls[] = {
417 RT712_SDCA_FU_CTRL("FU1E Capture Switch",
418 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01),
419 1, 1, 4),
420 RT712_SDCA_EXT_TLV("FU1E Capture Volume",
421 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01),
422 rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 0x3f, in_vol_tlv),
423 RT712_SDCA_EXT_TLV("FU15 Boost Volume",
424 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01),
425 rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 3, mic_vol_tlv),
426 };
427
rt712_sdca_dmic_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)428 static int rt712_sdca_dmic_mux_get(struct snd_kcontrol *kcontrol,
429 struct snd_ctl_elem_value *ucontrol)
430 {
431 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
432 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
433 unsigned int val = 0, mask_sft;
434
435 if (strstr(ucontrol->id.name, "ADC 25 Mux"))
436 mask_sft = 8;
437 else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
438 mask_sft = 4;
439 else
440 return -EINVAL;
441
442 rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
443 RT712_HDA_LEGACY_MUX_CTL0, &val);
444
445 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
446
447 return 0;
448 }
449
rt712_sdca_dmic_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)450 static int rt712_sdca_dmic_mux_put(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol)
452 {
453 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
454 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol);
455 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
456 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
457 unsigned int *item = ucontrol->value.enumerated.item;
458 unsigned int val, val2 = 0, change, mask_sft;
459
460 if (item[0] >= e->items)
461 return -EINVAL;
462
463 if (strstr(ucontrol->id.name, "ADC 25 Mux"))
464 mask_sft = 8;
465 else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
466 mask_sft = 4;
467 else
468 return -EINVAL;
469
470 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
471
472 rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
473 RT712_HDA_LEGACY_MUX_CTL0, &val2);
474 val2 = (0x7 << mask_sft) & val2;
475
476 if (val == val2)
477 change = 0;
478 else
479 change = 1;
480
481 if (change)
482 rt712_sdca_dmic_index_update_bits(rt712, RT712_VENDOR_HDA_CTL,
483 RT712_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
484 val << mask_sft);
485
486 snd_soc_dapm_mux_update_power(dapm, kcontrol,
487 item[0], e, NULL);
488
489 return change;
490 }
491
492 static const char * const adc_mux_text[] = {
493 "DMIC1",
494 "DMIC2",
495 };
496
497 static SOC_ENUM_SINGLE_DECL(
498 rt712_adc25_enum, SND_SOC_NOPM, 0, adc_mux_text);
499
500 static SOC_ENUM_SINGLE_DECL(
501 rt712_adc26_enum, SND_SOC_NOPM, 0, adc_mux_text);
502
503 static const struct snd_kcontrol_new rt712_sdca_dmic_adc25_mux =
504 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt712_adc25_enum,
505 rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
506
507 static const struct snd_kcontrol_new rt712_sdca_dmic_adc26_mux =
508 SOC_DAPM_ENUM_EXT("ADC 26 Mux", rt712_adc26_enum,
509 rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
510
rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)511 static int rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget *w,
512 struct snd_kcontrol *kcontrol, int event)
513 {
514 struct snd_soc_component *component =
515 snd_soc_dapm_to_component(w->dapm);
516 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
517
518 switch (event) {
519 case SND_SOC_DAPM_POST_PMU:
520 rt712->fu1e_dapm_mute = false;
521 rt712_sdca_set_fu1e_capture_ctl(rt712);
522 break;
523 case SND_SOC_DAPM_PRE_PMD:
524 rt712->fu1e_dapm_mute = true;
525 rt712_sdca_set_fu1e_capture_ctl(rt712);
526 break;
527 }
528 return 0;
529 }
530
rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)531 static int rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget *w,
532 struct snd_kcontrol *kcontrol, int event)
533 {
534 struct snd_soc_component *component =
535 snd_soc_dapm_to_component(w->dapm);
536 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
537 unsigned char ps0 = 0x0, ps3 = 0x3;
538
539 switch (event) {
540 case SND_SOC_DAPM_POST_PMU:
541 regmap_write(rt712->regmap,
542 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
543 RT712_SDCA_CTL_REQ_POWER_STATE, 0),
544 ps0);
545 break;
546 case SND_SOC_DAPM_PRE_PMD:
547 regmap_write(rt712->regmap,
548 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
549 RT712_SDCA_CTL_REQ_POWER_STATE, 0),
550 ps3);
551 break;
552 }
553 return 0;
554 }
555
556 static const struct snd_soc_dapm_widget rt712_sdca_dmic_dapm_widgets[] = {
557 SND_SOC_DAPM_INPUT("DMIC1"),
558 SND_SOC_DAPM_INPUT("DMIC2"),
559
560 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
561 rt712_sdca_dmic_pde11_event,
562 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
563
564 SND_SOC_DAPM_ADC_E("FU 1E", NULL, SND_SOC_NOPM, 0, 0,
565 rt712_sdca_dmic_fu1e_event,
566 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
567 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
568 &rt712_sdca_dmic_adc25_mux),
569 SND_SOC_DAPM_MUX("ADC 26 Mux", SND_SOC_NOPM, 0, 0,
570 &rt712_sdca_dmic_adc26_mux),
571
572 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
573 };
574
575 static const struct snd_soc_dapm_route rt712_sdca_dmic_audio_map[] = {
576 {"DP2TX", NULL, "FU 1E"},
577
578 {"FU 1E", NULL, "PDE 11"},
579 {"FU 1E", NULL, "ADC 25 Mux"},
580 {"FU 1E", NULL, "ADC 26 Mux"},
581 {"ADC 25 Mux", "DMIC1", "DMIC1"},
582 {"ADC 25 Mux", "DMIC2", "DMIC2"},
583 {"ADC 26 Mux", "DMIC1", "DMIC1"},
584 {"ADC 26 Mux", "DMIC2", "DMIC2"},
585 };
586
rt712_sdca_dmic_probe(struct snd_soc_component * component)587 static int rt712_sdca_dmic_probe(struct snd_soc_component *component)
588 {
589 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
590 int ret;
591
592 rt712->component = component;
593
594 if (!rt712->first_hw_init)
595 return 0;
596
597 ret = pm_runtime_resume(component->dev);
598 if (ret < 0 && ret != -EACCES)
599 return ret;
600
601 return 0;
602 }
603
604 static const struct snd_soc_component_driver soc_sdca_dev_rt712_dmic = {
605 .probe = rt712_sdca_dmic_probe,
606 .controls = rt712_sdca_dmic_snd_controls,
607 .num_controls = ARRAY_SIZE(rt712_sdca_dmic_snd_controls),
608 .dapm_widgets = rt712_sdca_dmic_dapm_widgets,
609 .num_dapm_widgets = ARRAY_SIZE(rt712_sdca_dmic_dapm_widgets),
610 .dapm_routes = rt712_sdca_dmic_audio_map,
611 .num_dapm_routes = ARRAY_SIZE(rt712_sdca_dmic_audio_map),
612 .endianness = 1,
613 };
614
rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)615 static int rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
616 int direction)
617 {
618 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
619
620 return 0;
621 }
622
rt712_sdca_dmic_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)623 static void rt712_sdca_dmic_shutdown(struct snd_pcm_substream *substream,
624 struct snd_soc_dai *dai)
625 {
626 snd_soc_dai_set_dma_data(dai, substream, NULL);
627 }
628
rt712_sdca_dmic_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)629 static int rt712_sdca_dmic_hw_params(struct snd_pcm_substream *substream,
630 struct snd_pcm_hw_params *params,
631 struct snd_soc_dai *dai)
632 {
633 struct snd_soc_component *component = dai->component;
634 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
635 struct sdw_stream_config stream_config;
636 struct sdw_port_config port_config;
637 struct sdw_stream_runtime *sdw_stream;
638 int retval, num_channels;
639 unsigned int sampling_rate;
640
641 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
642 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
643
644 if (!sdw_stream)
645 return -EINVAL;
646
647 if (!rt712->slave)
648 return -EINVAL;
649
650 stream_config.frame_rate = params_rate(params);
651 stream_config.ch_count = params_channels(params);
652 stream_config.bps = snd_pcm_format_width(params_format(params));
653 stream_config.direction = SDW_DATA_DIR_TX;
654
655 num_channels = params_channels(params);
656 port_config.ch_mask = GENMASK(num_channels - 1, 0);
657 port_config.num = 2;
658
659 retval = sdw_stream_add_slave(rt712->slave, &stream_config,
660 &port_config, 1, sdw_stream);
661 if (retval) {
662 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
663 return retval;
664 }
665
666 if (params_channels(params) > 4) {
667 dev_err(component->dev, "%s: Unsupported channels %d\n",
668 __func__, params_channels(params));
669 return -EINVAL;
670 }
671
672 /* sampling rate configuration */
673 switch (params_rate(params)) {
674 case 16000:
675 sampling_rate = RT712_SDCA_RATE_16000HZ;
676 break;
677 case 32000:
678 sampling_rate = RT712_SDCA_RATE_32000HZ;
679 break;
680 case 44100:
681 sampling_rate = RT712_SDCA_RATE_44100HZ;
682 break;
683 case 48000:
684 sampling_rate = RT712_SDCA_RATE_48000HZ;
685 break;
686 case 96000:
687 sampling_rate = RT712_SDCA_RATE_96000HZ;
688 break;
689 case 192000:
690 sampling_rate = RT712_SDCA_RATE_192000HZ;
691 break;
692 default:
693 dev_err(component->dev, "%s: Rate %d is not supported\n",
694 __func__, params_rate(params));
695 return -EINVAL;
696 }
697
698 /* set sampling frequency */
699 regmap_write(rt712->regmap,
700 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
701 sampling_rate);
702 regmap_write(rt712->regmap,
703 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
704 sampling_rate);
705
706 return 0;
707 }
708
rt712_sdca_dmic_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)709 static int rt712_sdca_dmic_hw_free(struct snd_pcm_substream *substream,
710 struct snd_soc_dai *dai)
711 {
712 struct snd_soc_component *component = dai->component;
713 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
714 struct sdw_stream_runtime *sdw_stream =
715 snd_soc_dai_get_dma_data(dai, substream);
716
717 if (!rt712->slave)
718 return -EINVAL;
719
720 sdw_stream_remove_slave(rt712->slave, sdw_stream);
721 return 0;
722 }
723
724 #define RT712_STEREO_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
725 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
726 #define RT712_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
727 SNDRV_PCM_FMTBIT_S24_LE)
728
729 static const struct snd_soc_dai_ops rt712_sdca_dmic_ops = {
730 .hw_params = rt712_sdca_dmic_hw_params,
731 .hw_free = rt712_sdca_dmic_hw_free,
732 .set_stream = rt712_sdca_dmic_set_sdw_stream,
733 .shutdown = rt712_sdca_dmic_shutdown,
734 };
735
736 static struct snd_soc_dai_driver rt712_sdca_dmic_dai[] = {
737 {
738 .name = "rt712-sdca-dmic-aif1",
739 .id = RT712_AIF1,
740 .capture = {
741 .stream_name = "DP2 Capture",
742 .channels_min = 1,
743 .channels_max = 4,
744 .rates = RT712_STEREO_RATES,
745 .formats = RT712_FORMATS,
746 },
747 .ops = &rt712_sdca_dmic_ops,
748 },
749 };
750
rt712_sdca_dmic_init(struct device * dev,struct regmap * regmap,struct regmap * mbq_regmap,struct sdw_slave * slave)751 static int rt712_sdca_dmic_init(struct device *dev, struct regmap *regmap,
752 struct regmap *mbq_regmap, struct sdw_slave *slave)
753 {
754 struct rt712_sdca_dmic_priv *rt712;
755 int ret;
756
757 rt712 = devm_kzalloc(dev, sizeof(*rt712), GFP_KERNEL);
758 if (!rt712)
759 return -ENOMEM;
760
761 dev_set_drvdata(dev, rt712);
762 rt712->slave = slave;
763 rt712->regmap = regmap;
764 rt712->mbq_regmap = mbq_regmap;
765
766 regcache_cache_only(rt712->regmap, true);
767 regcache_cache_only(rt712->mbq_regmap, true);
768
769 /*
770 * Mark hw_init to false
771 * HW init will be performed when device reports present
772 */
773 rt712->hw_init = false;
774 rt712->first_hw_init = false;
775 rt712->fu1e_dapm_mute = true;
776 rt712->fu1e_mixer_mute[0] = rt712->fu1e_mixer_mute[1] =
777 rt712->fu1e_mixer_mute[2] = rt712->fu1e_mixer_mute[3] = true;
778
779 ret = devm_snd_soc_register_component(dev,
780 &soc_sdca_dev_rt712_dmic,
781 rt712_sdca_dmic_dai,
782 ARRAY_SIZE(rt712_sdca_dmic_dai));
783 if (ret < 0)
784 return ret;
785
786 /* set autosuspend parameters */
787 pm_runtime_set_autosuspend_delay(dev, 3000);
788 pm_runtime_use_autosuspend(dev);
789
790 /* make sure the device does not suspend immediately */
791 pm_runtime_mark_last_busy(dev);
792
793 pm_runtime_enable(dev);
794
795 /* important note: the device is NOT tagged as 'active' and will remain
796 * 'suspended' until the hardware is enumerated/initialized. This is required
797 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
798 * fail with -EACCESS because of race conditions between card creation and enumeration
799 */
800
801 dev_dbg(dev, "%s\n", __func__);
802
803 return 0;
804 }
805
806
rt712_sdca_dmic_update_status(struct sdw_slave * slave,enum sdw_slave_status status)807 static int rt712_sdca_dmic_update_status(struct sdw_slave *slave,
808 enum sdw_slave_status status)
809 {
810 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(&slave->dev);
811
812 if (status == SDW_SLAVE_UNATTACHED)
813 rt712->hw_init = false;
814
815 /*
816 * Perform initialization only if slave status is present and
817 * hw_init flag is false
818 */
819 if (rt712->hw_init || status != SDW_SLAVE_ATTACHED)
820 return 0;
821
822 /* perform I/O transfers required for Slave initialization */
823 return rt712_sdca_dmic_io_init(&slave->dev, slave);
824 }
825
rt712_sdca_dmic_read_prop(struct sdw_slave * slave)826 static int rt712_sdca_dmic_read_prop(struct sdw_slave *slave)
827 {
828 struct sdw_slave_prop *prop = &slave->prop;
829 int nval, i;
830 u32 bit;
831 unsigned long addr;
832 struct sdw_dpn_prop *dpn;
833
834 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
835 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
836
837 prop->paging_support = true;
838
839 /* first we need to allocate memory for set bits in port lists */
840 prop->source_ports = BIT(2); /* BITMAP: 00000100 */
841 prop->sink_ports = 0;
842
843 nval = hweight32(prop->source_ports);
844 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
845 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
846 if (!prop->src_dpn_prop)
847 return -ENOMEM;
848
849 i = 0;
850 dpn = prop->src_dpn_prop;
851 addr = prop->source_ports;
852 for_each_set_bit(bit, &addr, 32) {
853 dpn[i].num = bit;
854 dpn[i].type = SDW_DPN_FULL;
855 dpn[i].simple_ch_prep_sm = true;
856 dpn[i].ch_prep_timeout = 10;
857 i++;
858 }
859
860 /* set the timeout values */
861 prop->clk_stop_timeout = 200;
862
863 /* wake-up event */
864 prop->wake_capable = 1;
865
866 return 0;
867 }
868
869 static const struct sdw_device_id rt712_sdca_dmic_id[] = {
870 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1712, 0x3, 0x1, 0),
871 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1713, 0x3, 0x1, 0),
872 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1716, 0x3, 0x1, 0),
873 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1717, 0x3, 0x1, 0),
874 {},
875 };
876 MODULE_DEVICE_TABLE(sdw, rt712_sdca_dmic_id);
877
rt712_sdca_dmic_dev_suspend(struct device * dev)878 static int rt712_sdca_dmic_dev_suspend(struct device *dev)
879 {
880 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
881
882 if (!rt712->hw_init)
883 return 0;
884
885 regcache_cache_only(rt712->regmap, true);
886 regcache_cache_only(rt712->mbq_regmap, true);
887
888 return 0;
889 }
890
rt712_sdca_dmic_dev_system_suspend(struct device * dev)891 static int rt712_sdca_dmic_dev_system_suspend(struct device *dev)
892 {
893 struct rt712_sdca_dmic_priv *rt712_sdca = dev_get_drvdata(dev);
894
895 if (!rt712_sdca->hw_init)
896 return 0;
897
898 return rt712_sdca_dmic_dev_suspend(dev);
899 }
900
901 #define RT712_PROBE_TIMEOUT 5000
902
rt712_sdca_dmic_dev_resume(struct device * dev)903 static int rt712_sdca_dmic_dev_resume(struct device *dev)
904 {
905 struct sdw_slave *slave = dev_to_sdw_dev(dev);
906 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
907 int ret;
908
909 if (!rt712->first_hw_init)
910 return 0;
911
912 ret = sdw_slave_wait_for_init(slave, RT712_PROBE_TIMEOUT);
913 if (ret) {
914 sdw_show_ping_status(slave->bus, true);
915 return ret;
916 }
917
918 regcache_cache_only(rt712->regmap, false);
919 ret = regcache_sync(rt712->regmap);
920 if (ret)
921 goto err_sync;
922
923 regcache_cache_only(rt712->mbq_regmap, false);
924 ret = regcache_sync(rt712->mbq_regmap);
925 if (ret)
926 goto err_sync;
927
928 return 0;
929
930 err_sync:
931 regcache_cache_only(rt712->regmap, true);
932 regcache_cache_only(rt712->mbq_regmap, true);
933 regcache_mark_dirty(rt712->regmap);
934 regcache_mark_dirty(rt712->mbq_regmap);
935 return ret;
936 }
937
938 static const struct dev_pm_ops rt712_sdca_dmic_pm = {
939 SYSTEM_SLEEP_PM_OPS(rt712_sdca_dmic_dev_system_suspend, rt712_sdca_dmic_dev_resume)
940 RUNTIME_PM_OPS(rt712_sdca_dmic_dev_suspend, rt712_sdca_dmic_dev_resume, NULL)
941 };
942
943
944 static const struct sdw_slave_ops rt712_sdca_dmic_slave_ops = {
945 .read_prop = rt712_sdca_dmic_read_prop,
946 .update_status = rt712_sdca_dmic_update_status,
947 };
948
rt712_sdca_dmic_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)949 static int rt712_sdca_dmic_sdw_probe(struct sdw_slave *slave,
950 const struct sdw_device_id *id)
951 {
952 struct regmap *regmap, *mbq_regmap;
953
954 /* Regmap Initialization */
955 mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt712_sdca_dmic_mbq_regmap);
956 if (IS_ERR(mbq_regmap))
957 return PTR_ERR(mbq_regmap);
958
959 regmap = devm_regmap_init_sdw(slave, &rt712_sdca_dmic_regmap);
960 if (IS_ERR(regmap))
961 return PTR_ERR(regmap);
962
963 return rt712_sdca_dmic_init(&slave->dev, regmap, mbq_regmap, slave);
964 }
965
rt712_sdca_dmic_sdw_remove(struct sdw_slave * slave)966 static void rt712_sdca_dmic_sdw_remove(struct sdw_slave *slave)
967 {
968 pm_runtime_disable(&slave->dev);
969 }
970
971 static struct sdw_driver rt712_sdca_dmic_sdw_driver = {
972 .driver = {
973 .name = "rt712-sdca-dmic",
974 .pm = pm_ptr(&rt712_sdca_dmic_pm),
975 },
976 .probe = rt712_sdca_dmic_sdw_probe,
977 .remove = rt712_sdca_dmic_sdw_remove,
978 .ops = &rt712_sdca_dmic_slave_ops,
979 .id_table = rt712_sdca_dmic_id,
980 };
981 module_sdw_driver(rt712_sdca_dmic_sdw_driver);
982
983 MODULE_DESCRIPTION("ASoC RT712 SDCA DMIC SDW driver");
984 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
985 MODULE_LICENSE("GPL");
986