1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver
4 //
5 // Copyright 2019 Realtek Semiconductor Corp.
6 // Author: Oder Chiou <oder_chiou@realtek.com>
7 //
8
9 #include <linux/cleanup.h>
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/pm.h>
15 #include <linux/acpi.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/mutex.h>
19 #include <linux/soundwire/sdw.h>
20 #include <linux/soundwire/sdw_type.h>
21 #include <linux/soundwire/sdw_registers.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/jack.h>
26 #include <sound/sdw.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31
32 #include "rt5682.h"
33
34 #define RT5682_SDW_ADDR_L 0x3000
35 #define RT5682_SDW_ADDR_H 0x3001
36 #define RT5682_SDW_DATA_L 0x3004
37 #define RT5682_SDW_DATA_H 0x3005
38 #define RT5682_SDW_CMD 0x3008
39
rt5682_sdw_read(void * context,unsigned int reg,unsigned int * val)40 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
41 {
42 struct device *dev = context;
43 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
44 unsigned int data_l, data_h;
45
46 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
47 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
48 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
49 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
50 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
51
52 *val = (data_h << 8) | data_l;
53
54 dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
55
56 return 0;
57 }
58
rt5682_sdw_write(void * context,unsigned int reg,unsigned int val)59 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
60 {
61 struct device *dev = context;
62 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
63
64 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
65 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
66 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
67 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
68 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
69
70 dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
71
72 return 0;
73 }
74
75 static const struct regmap_config rt5682_sdw_indirect_regmap = {
76 .reg_bits = 16,
77 .val_bits = 16,
78 .max_register = RT5682_I2C_MODE,
79 .volatile_reg = rt5682_volatile_register,
80 .readable_reg = rt5682_readable_register,
81 .cache_type = REGCACHE_MAPLE,
82 .reg_defaults = rt5682_reg,
83 .num_reg_defaults = RT5682_REG_NUM,
84 .use_single_read = true,
85 .use_single_write = true,
86 .reg_read = rt5682_sdw_read,
87 .reg_write = rt5682_sdw_write,
88 };
89
rt5682_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)90 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
91 int direction)
92 {
93 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
94
95 return 0;
96 }
97
rt5682_sdw_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)98 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
99 struct snd_soc_dai *dai)
100 {
101 snd_soc_dai_set_dma_data(dai, substream, NULL);
102 }
103
rt5682_sdw_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)104 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
105 struct snd_pcm_hw_params *params,
106 struct snd_soc_dai *dai)
107 {
108 struct snd_soc_component *component = dai->component;
109 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
110 struct sdw_stream_config stream_config = {0};
111 struct sdw_port_config port_config = {0};
112 struct sdw_stream_runtime *sdw_stream;
113 int retval;
114 unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
115
116 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
117
118 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
119 if (!sdw_stream)
120 return -ENOMEM;
121
122 if (!rt5682->slave)
123 return -EINVAL;
124
125 /* SoundWire specific configuration */
126 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
127
128 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
129 port_config.num = 1;
130 else
131 port_config.num = 2;
132
133 retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
134 &port_config, 1, sdw_stream);
135 if (retval) {
136 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
137 return retval;
138 }
139
140 switch (params_rate(params)) {
141 case 48000:
142 val_p = RT5682_SDW_REF_1_48K;
143 val_c = RT5682_SDW_REF_2_48K;
144 break;
145 case 96000:
146 val_p = RT5682_SDW_REF_1_96K;
147 val_c = RT5682_SDW_REF_2_96K;
148 break;
149 case 192000:
150 val_p = RT5682_SDW_REF_1_192K;
151 val_c = RT5682_SDW_REF_2_192K;
152 break;
153 case 32000:
154 val_p = RT5682_SDW_REF_1_32K;
155 val_c = RT5682_SDW_REF_2_32K;
156 break;
157 case 24000:
158 val_p = RT5682_SDW_REF_1_24K;
159 val_c = RT5682_SDW_REF_2_24K;
160 break;
161 case 16000:
162 val_p = RT5682_SDW_REF_1_16K;
163 val_c = RT5682_SDW_REF_2_16K;
164 break;
165 case 12000:
166 val_p = RT5682_SDW_REF_1_12K;
167 val_c = RT5682_SDW_REF_2_12K;
168 break;
169 case 8000:
170 val_p = RT5682_SDW_REF_1_8K;
171 val_c = RT5682_SDW_REF_2_8K;
172 break;
173 case 44100:
174 val_p = RT5682_SDW_REF_1_44K;
175 val_c = RT5682_SDW_REF_2_44K;
176 break;
177 case 88200:
178 val_p = RT5682_SDW_REF_1_88K;
179 val_c = RT5682_SDW_REF_2_88K;
180 break;
181 case 176400:
182 val_p = RT5682_SDW_REF_1_176K;
183 val_c = RT5682_SDW_REF_2_176K;
184 break;
185 case 22050:
186 val_p = RT5682_SDW_REF_1_22K;
187 val_c = RT5682_SDW_REF_2_22K;
188 break;
189 case 11025:
190 val_p = RT5682_SDW_REF_1_11K;
191 val_c = RT5682_SDW_REF_2_11K;
192 break;
193 default:
194 return -EINVAL;
195 }
196
197 if (params_rate(params) <= 48000) {
198 osr_p = RT5682_DAC_OSR_D_8;
199 osr_c = RT5682_ADC_OSR_D_8;
200 } else if (params_rate(params) <= 96000) {
201 osr_p = RT5682_DAC_OSR_D_4;
202 osr_c = RT5682_ADC_OSR_D_4;
203 } else {
204 osr_p = RT5682_DAC_OSR_D_2;
205 osr_c = RT5682_ADC_OSR_D_2;
206 }
207
208 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
209 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
210 RT5682_SDW_REF_1_MASK, val_p);
211 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
212 RT5682_DAC_OSR_MASK, osr_p);
213 } else {
214 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
215 RT5682_SDW_REF_2_MASK, val_c);
216 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
217 RT5682_ADC_OSR_MASK, osr_c);
218 }
219
220 return retval;
221 }
222
rt5682_sdw_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)223 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
224 struct snd_soc_dai *dai)
225 {
226 struct snd_soc_component *component = dai->component;
227 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
228 struct sdw_stream_runtime *sdw_stream =
229 snd_soc_dai_get_dma_data(dai, substream);
230
231 if (!rt5682->slave)
232 return -EINVAL;
233
234 sdw_stream_remove_slave(rt5682->slave, sdw_stream);
235 return 0;
236 }
237
238 static const struct snd_soc_dai_ops rt5682_sdw_ops = {
239 .hw_params = rt5682_sdw_hw_params,
240 .hw_free = rt5682_sdw_hw_free,
241 .set_stream = rt5682_set_sdw_stream,
242 .shutdown = rt5682_sdw_shutdown,
243 };
244
245 static struct snd_soc_dai_driver rt5682_dai[] = {
246 {
247 .name = "rt5682-aif1",
248 .id = RT5682_AIF1,
249 .playback = {
250 .stream_name = "AIF1 Playback",
251 .channels_min = 1,
252 .channels_max = 2,
253 .rates = RT5682_STEREO_RATES,
254 .formats = RT5682_FORMATS,
255 },
256 .capture = {
257 .stream_name = "AIF1 Capture",
258 .channels_min = 1,
259 .channels_max = 2,
260 .rates = RT5682_STEREO_RATES,
261 .formats = RT5682_FORMATS,
262 },
263 .ops = &rt5682_aif1_dai_ops,
264 },
265 {
266 .name = "rt5682-aif2",
267 .id = RT5682_AIF2,
268 .capture = {
269 .stream_name = "AIF2 Capture",
270 .channels_min = 1,
271 .channels_max = 2,
272 .rates = RT5682_STEREO_RATES,
273 .formats = RT5682_FORMATS,
274 },
275 .ops = &rt5682_aif2_dai_ops,
276 },
277 {
278 .name = "rt5682-sdw",
279 .id = RT5682_SDW,
280 .playback = {
281 .stream_name = "SDW Playback",
282 .channels_min = 1,
283 .channels_max = 2,
284 .rates = RT5682_STEREO_RATES,
285 .formats = RT5682_FORMATS,
286 },
287 .capture = {
288 .stream_name = "SDW Capture",
289 .channels_min = 1,
290 .channels_max = 2,
291 .rates = RT5682_STEREO_RATES,
292 .formats = RT5682_FORMATS,
293 },
294 .ops = &rt5682_sdw_ops,
295 },
296 };
297
rt5682_sdw_init(struct device * dev,struct regmap * regmap,struct sdw_slave * slave)298 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
299 struct sdw_slave *slave)
300 {
301 struct rt5682_priv *rt5682;
302 int ret;
303
304 rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
305 if (!rt5682)
306 return -ENOMEM;
307
308 dev_set_drvdata(dev, rt5682);
309 rt5682->slave = slave;
310 rt5682->sdw_regmap = regmap;
311 rt5682->is_sdw = true;
312
313 mutex_init(&rt5682->disable_irq_lock);
314
315 rt5682->regmap = devm_regmap_init(dev, NULL, dev,
316 &rt5682_sdw_indirect_regmap);
317 if (IS_ERR(rt5682->regmap)) {
318 ret = PTR_ERR(rt5682->regmap);
319 dev_err(dev, "%s: Failed to allocate register map: %d\n",
320 __func__, ret);
321 return ret;
322 }
323
324
325 ret = rt5682_get_ldo1(rt5682, dev);
326 if (ret)
327 return ret;
328
329 regcache_cache_only(rt5682->sdw_regmap, true);
330 regcache_cache_only(rt5682->regmap, true);
331
332 /*
333 * Mark hw_init to false
334 * HW init will be performed when device reports present
335 */
336 rt5682->hw_init = false;
337 rt5682->first_hw_init = false;
338
339 mutex_init(&rt5682->calibrate_mutex);
340 INIT_DELAYED_WORK(&rt5682->jack_detect_work,
341 rt5682_jack_detect_handler);
342
343 ret = devm_snd_soc_register_component(dev,
344 &rt5682_soc_component_dev,
345 rt5682_dai, ARRAY_SIZE(rt5682_dai));
346 if (ret < 0)
347 return ret;
348
349 /* set autosuspend parameters */
350 pm_runtime_set_autosuspend_delay(dev, 3000);
351 pm_runtime_use_autosuspend(dev);
352
353 /* make sure the device does not suspend immediately */
354 pm_runtime_mark_last_busy(dev);
355
356 pm_runtime_enable(dev);
357
358 /* important note: the device is NOT tagged as 'active' and will remain
359 * 'suspended' until the hardware is enumerated/initialized. This is required
360 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
361 * fail with -EACCESS because of race conditions between card creation and enumeration
362 */
363
364 dev_dbg(dev, "%s\n", __func__);
365
366 return ret;
367 }
368
rt5682_io_init(struct device * dev,struct sdw_slave * slave)369 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
370 {
371 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
372 int ret = 0, loop = 10;
373 unsigned int val;
374
375 rt5682->disable_irq = false;
376
377 if (rt5682->hw_init)
378 return 0;
379
380 regcache_cache_only(rt5682->sdw_regmap, false);
381 regcache_cache_only(rt5682->regmap, false);
382 if (rt5682->first_hw_init)
383 regcache_cache_bypass(rt5682->regmap, true);
384
385 /*
386 * PM runtime status is marked as 'active' only when a Slave reports as Attached
387 */
388 if (!rt5682->first_hw_init)
389 /* update count of parent 'active' children */
390 pm_runtime_set_active(&slave->dev);
391
392 pm_runtime_get_noresume(&slave->dev);
393
394 while (loop > 0) {
395 regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
396 if (val == DEVICE_ID)
397 break;
398 dev_warn(dev, "Device with ID register %x is not rt5682\n", val);
399 usleep_range(30000, 30005);
400 loop--;
401 }
402
403 if (val != DEVICE_ID) {
404 dev_err(dev, "%s: Device with ID register %x is not rt5682\n", __func__, val);
405 ret = -ENODEV;
406 goto err_nodev;
407 }
408
409 rt5682_calibrate(rt5682);
410
411 if (rt5682->first_hw_init) {
412 regcache_cache_bypass(rt5682->regmap, false);
413 regcache_mark_dirty(rt5682->regmap);
414 ret = regcache_sync(rt5682->regmap);
415 if (ret)
416 goto err_sync;
417
418 /* volatile registers */
419 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
420 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
421
422 goto reinit;
423 }
424
425 rt5682_apply_patch_list(rt5682, dev);
426
427 regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
428
429 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
430 RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
431 RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
432 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
433 regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
434 regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
435 RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
436 regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
437 RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
438 regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
439 RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
440
441 /* Soundwire */
442 regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
443 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
444 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
445 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
446 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
447 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
448 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
449 regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
450 RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
451 RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
452
453 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
454 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
455 regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142);
456 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600);
457 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
458 RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
459 regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
460 RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
461 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
462 RT5682_POW_IRQ | RT5682_POW_JDH |
463 RT5682_POW_ANA, RT5682_POW_IRQ |
464 RT5682_POW_JDH | RT5682_POW_ANA);
465 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
466 RT5682_PWR_JDH, RT5682_PWR_JDH);
467 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
468 RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
469 RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
470
471 reinit:
472 mod_delayed_work(system_power_efficient_wq,
473 &rt5682->jack_detect_work, msecs_to_jiffies(250));
474
475 /* Mark Slave initialization complete */
476 rt5682->hw_init = true;
477 rt5682->first_hw_init = true;
478 goto out;
479
480 err_sync:
481 regcache_cache_bypass(rt5682->regmap, false);
482 regcache_cache_only(rt5682->sdw_regmap, true);
483 regcache_cache_only(rt5682->regmap, true);
484 regcache_mark_dirty(rt5682->regmap);
485
486 err_nodev:
487 out:
488 pm_runtime_put_autosuspend(&slave->dev);
489
490 dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret);
491
492 return ret;
493 }
494
rt5682_sdw_readable_register(struct device * dev,unsigned int reg)495 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
496 {
497 switch (reg) {
498 case 0x00e0:
499 case 0x00f0:
500 case 0x3000:
501 case 0x3001:
502 case 0x3004:
503 case 0x3005:
504 case 0x3008:
505 return true;
506 default:
507 return false;
508 }
509 }
510
511 static const struct regmap_config rt5682_sdw_regmap = {
512 .name = "sdw",
513 .reg_bits = 32,
514 .val_bits = 8,
515 .max_register = RT5682_I2C_MODE,
516 .readable_reg = rt5682_sdw_readable_register,
517 .cache_type = REGCACHE_NONE,
518 .use_single_read = true,
519 .use_single_write = true,
520 };
521
rt5682_update_status(struct sdw_slave * slave,enum sdw_slave_status status)522 static int rt5682_update_status(struct sdw_slave *slave,
523 enum sdw_slave_status status)
524 {
525 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
526
527 if (status == SDW_SLAVE_UNATTACHED)
528 rt5682->hw_init = false;
529
530 /*
531 * Perform initialization only if slave status is present and
532 * hw_init flag is false
533 */
534 if (rt5682->hw_init || status != SDW_SLAVE_ATTACHED)
535 return 0;
536
537 /* perform I/O transfers required for Slave initialization */
538 return rt5682_io_init(&slave->dev, slave);
539 }
540
rt5682_read_prop(struct sdw_slave * slave)541 static int rt5682_read_prop(struct sdw_slave *slave)
542 {
543 struct sdw_slave_prop *prop = &slave->prop;
544 int nval, i;
545 u32 bit;
546 unsigned long addr;
547 struct sdw_dpn_prop *dpn;
548
549 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
550 SDW_SCP_INT1_PARITY;
551 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
552
553 prop->paging_support = false;
554
555 /* first we need to allocate memory for set bits in port lists */
556 prop->source_ports = 0x4; /* BITMAP: 00000100 */
557 prop->sink_ports = 0x2; /* BITMAP: 00000010 */
558
559 nval = hweight32(prop->source_ports);
560 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
561 sizeof(*prop->src_dpn_prop),
562 GFP_KERNEL);
563 if (!prop->src_dpn_prop)
564 return -ENOMEM;
565
566 i = 0;
567 dpn = prop->src_dpn_prop;
568 addr = prop->source_ports;
569 for_each_set_bit(bit, &addr, 32) {
570 dpn[i].num = bit;
571 dpn[i].type = SDW_DPN_FULL;
572 dpn[i].simple_ch_prep_sm = true;
573 dpn[i].ch_prep_timeout = 10;
574 i++;
575 }
576
577 /* do this again for sink now */
578 nval = hweight32(prop->sink_ports);
579 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
580 sizeof(*prop->sink_dpn_prop),
581 GFP_KERNEL);
582 if (!prop->sink_dpn_prop)
583 return -ENOMEM;
584
585 i = 0;
586 dpn = prop->sink_dpn_prop;
587 addr = prop->sink_ports;
588 for_each_set_bit(bit, &addr, 32) {
589 dpn[i].num = bit;
590 dpn[i].type = SDW_DPN_FULL;
591 dpn[i].simple_ch_prep_sm = true;
592 dpn[i].ch_prep_timeout = 10;
593 i++;
594 }
595
596 /* set the timeout values */
597 prop->clk_stop_timeout = 20;
598
599 /* wake-up event */
600 prop->wake_capable = 1;
601
602 return 0;
603 }
604
605 /* Bus clock frequency */
606 #define RT5682_CLK_FREQ_9600000HZ 9600000
607 #define RT5682_CLK_FREQ_12000000HZ 12000000
608 #define RT5682_CLK_FREQ_6000000HZ 6000000
609 #define RT5682_CLK_FREQ_4800000HZ 4800000
610 #define RT5682_CLK_FREQ_2400000HZ 2400000
611 #define RT5682_CLK_FREQ_12288000HZ 12288000
612
rt5682_clock_config(struct device * dev)613 static int rt5682_clock_config(struct device *dev)
614 {
615 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
616 unsigned int clk_freq, value;
617
618 clk_freq = (rt5682->params.curr_dr_freq >> 1);
619
620 switch (clk_freq) {
621 case RT5682_CLK_FREQ_12000000HZ:
622 value = 0x0;
623 break;
624 case RT5682_CLK_FREQ_6000000HZ:
625 value = 0x1;
626 break;
627 case RT5682_CLK_FREQ_9600000HZ:
628 value = 0x2;
629 break;
630 case RT5682_CLK_FREQ_4800000HZ:
631 value = 0x3;
632 break;
633 case RT5682_CLK_FREQ_2400000HZ:
634 value = 0x4;
635 break;
636 case RT5682_CLK_FREQ_12288000HZ:
637 value = 0x5;
638 break;
639 default:
640 return -EINVAL;
641 }
642
643 regmap_write(rt5682->sdw_regmap, 0xe0, value);
644 regmap_write(rt5682->sdw_regmap, 0xf0, value);
645
646 dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
647
648 return 0;
649 }
650
rt5682_bus_config(struct sdw_slave * slave,struct sdw_bus_params * params)651 static int rt5682_bus_config(struct sdw_slave *slave,
652 struct sdw_bus_params *params)
653 {
654 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
655 int ret;
656
657 memcpy(&rt5682->params, params, sizeof(*params));
658
659 ret = rt5682_clock_config(&slave->dev);
660 if (ret < 0)
661 dev_err(&slave->dev, "%s: Invalid clk config", __func__);
662
663 return ret;
664 }
665
rt5682_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)666 static int rt5682_interrupt_callback(struct sdw_slave *slave,
667 struct sdw_slave_intr_status *status)
668 {
669 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
670
671 dev_dbg(&slave->dev,
672 "%s control_port_stat=%x", __func__, status->control_port);
673
674 guard(mutex)(&rt5682->disable_irq_lock);
675 if (status->control_port & 0x4 && !rt5682->disable_irq) {
676 mod_delayed_work(system_power_efficient_wq,
677 &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
678 }
679
680 return 0;
681 }
682
683 static const struct sdw_slave_ops rt5682_slave_ops = {
684 .read_prop = rt5682_read_prop,
685 .interrupt_callback = rt5682_interrupt_callback,
686 .update_status = rt5682_update_status,
687 .bus_config = rt5682_bus_config,
688 };
689
rt5682_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)690 static int rt5682_sdw_probe(struct sdw_slave *slave,
691 const struct sdw_device_id *id)
692 {
693 struct regmap *regmap;
694
695 /* Regmap Initialization */
696 regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
697 if (IS_ERR(regmap))
698 return -EINVAL;
699
700 return rt5682_sdw_init(&slave->dev, regmap, slave);
701 }
702
rt5682_sdw_remove(struct sdw_slave * slave)703 static void rt5682_sdw_remove(struct sdw_slave *slave)
704 {
705 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
706
707 if (rt5682->hw_init)
708 cancel_delayed_work_sync(&rt5682->jack_detect_work);
709
710 pm_runtime_disable(&slave->dev);
711 }
712
713 static const struct sdw_device_id rt5682_id[] = {
714 SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0),
715 {},
716 };
717 MODULE_DEVICE_TABLE(sdw, rt5682_id);
718
rt5682_dev_suspend(struct device * dev)719 static int rt5682_dev_suspend(struct device *dev)
720 {
721 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
722
723 if (!rt5682->hw_init)
724 return 0;
725
726 cancel_delayed_work_sync(&rt5682->jack_detect_work);
727
728 regcache_cache_only(rt5682->sdw_regmap, true);
729 regcache_cache_only(rt5682->regmap, true);
730 regcache_mark_dirty(rt5682->regmap);
731
732 return 0;
733 }
734
rt5682_dev_system_suspend(struct device * dev)735 static int rt5682_dev_system_suspend(struct device *dev)
736 {
737 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
738 struct sdw_slave *slave = dev_to_sdw_dev(dev);
739 int ret;
740
741 if (!rt5682->hw_init)
742 return 0;
743
744 /*
745 * prevent new interrupts from being handled after the
746 * deferred work completes and before the parent disables
747 * interrupts on the link
748 */
749 scoped_guard(mutex, &rt5682->disable_irq_lock) {
750 rt5682->disable_irq = true;
751 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1,
752 SDW_SCP_INT1_IMPL_DEF, 0);
753 }
754
755 if (ret < 0) {
756 /* log but don't prevent suspend from happening */
757 dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__);
758 }
759
760 return rt5682_dev_suspend(dev);
761 }
762
rt5682_dev_resume(struct device * dev)763 static int rt5682_dev_resume(struct device *dev)
764 {
765 struct sdw_slave *slave = dev_to_sdw_dev(dev);
766 struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
767 int ret;
768
769 if (!rt5682->first_hw_init)
770 return 0;
771
772 if (!slave->unattach_request) {
773 scoped_guard(mutex, &rt5682->disable_irq_lock) {
774 if (rt5682->disable_irq) {
775 sdw_write_no_pm(slave, SDW_SCP_INTMASK1, SDW_SCP_INT1_IMPL_DEF);
776 rt5682->disable_irq = false;
777 }
778 }
779 }
780
781 ret = sdw_slave_wait_for_init(slave, RT5682_PROBE_TIMEOUT);
782 if (ret) {
783 sdw_show_ping_status(slave->bus, true);
784 return ret;
785 }
786
787 regcache_cache_only(rt5682->sdw_regmap, false);
788 regcache_cache_only(rt5682->regmap, false);
789 ret = regcache_sync(rt5682->regmap);
790 if (ret) {
791 regcache_cache_only(rt5682->sdw_regmap, true);
792 regcache_cache_only(rt5682->regmap, true);
793 regcache_mark_dirty(rt5682->regmap);
794 return ret;
795 }
796
797 return 0;
798 }
799
800 static const struct dev_pm_ops rt5682_pm = {
801 SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume)
802 RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
803 };
804
805 static struct sdw_driver rt5682_sdw_driver = {
806 .driver = {
807 .name = "rt5682",
808 .pm = pm_ptr(&rt5682_pm),
809 },
810 .probe = rt5682_sdw_probe,
811 .remove = rt5682_sdw_remove,
812 .ops = &rt5682_slave_ops,
813 .id_table = rt5682_id,
814 };
815 module_sdw_driver(rt5682_sdw_driver);
816
817 MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
818 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
819 MODULE_LICENSE("GPL v2");
820