1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 opp-shared; 34 35 opp-500000000 { 36 opp-hz = /bits/ 64 <500000000>; 37 opp-microvolt = <825000>; 38 clock-latency-ns = <500000>; 39 }; 40 opp-1000000000 { 41 opp-hz = /bits/ 64 <1000000000>; 42 opp-microvolt = <825000>; 43 clock-latency-ns = <500000>; 44 }; 45 opp-1500000000 { 46 opp-hz = /bits/ 64 <1500000000>; 47 opp-microvolt = <825000>; 48 clock-latency-ns = <500000>; 49 }; 50 opp-1700000000 { 51 opp-hz = /bits/ 64 <1700000000>; 52 opp-microvolt = <825000>; 53 clock-latency-ns = <500000>; 54 opp-suspend; 55 }; 56 opp-1800000000 { 57 opp-hz = /bits/ 64 <1800000000>; 58 opp-microvolt = <880000>; 59 clock-latency-ns = <500000>; 60 turbo-mode; 61 }; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu-map { 69 cluster0 { 70 core0 { 71 cpu = <&a76_0>; 72 }; 73 core1 { 74 cpu = <&a76_1>; 75 }; 76 }; 77 78 cluster1 { 79 core0 { 80 cpu = <&a76_2>; 81 }; 82 core1 { 83 cpu = <&a76_3>; 84 }; 85 }; 86 }; 87 88 a76_0: cpu@0 { 89 compatible = "arm,cortex-a76"; 90 reg = <0>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 93 next-level-cache = <&L3_CA76_0>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 a76_1: cpu@100 { 101 compatible = "arm,cortex-a76"; 102 reg = <0x100>; 103 device_type = "cpu"; 104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 105 next-level-cache = <&L3_CA76_0>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0>; 108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a76_2: cpu@10000 { 113 compatible = "arm,cortex-a76"; 114 reg = <0x10000>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 117 next-level-cache = <&L3_CA76_1>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 a76_3: cpu@10100 { 125 compatible = "arm,cortex-a76"; 126 reg = <0x10100>; 127 device_type = "cpu"; 128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 129 next-level-cache = <&L3_CA76_1>; 130 enable-method = "psci"; 131 cpu-idle-states = <&CPU_SLEEP_0>; 132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 133 operating-points-v2 = <&cluster0_opp>; 134 }; 135 136 idle-states { 137 entry-method = "psci"; 138 139 CPU_SLEEP_0: cpu-sleep-0 { 140 compatible = "arm,idle-state"; 141 arm,psci-suspend-param = <0x0010000>; 142 local-timer-stop; 143 entry-latency-us = <400>; 144 exit-latency-us = <500>; 145 min-residency-us = <4000>; 146 }; 147 }; 148 149 L3_CA76_0: cache-controller-0 { 150 compatible = "cache"; 151 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 152 cache-unified; 153 cache-level = <3>; 154 }; 155 156 L3_CA76_1: cache-controller-1 { 157 compatible = "cache"; 158 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 159 cache-unified; 160 cache-level = <3>; 161 }; 162 }; 163 164 extal_clk: extal { 165 compatible = "fixed-clock"; 166 #clock-cells = <0>; 167 /* This value must be overridden by the board */ 168 clock-frequency = <0>; 169 bootph-all; 170 }; 171 172 extalr_clk: extalr { 173 compatible = "fixed-clock"; 174 #clock-cells = <0>; 175 /* This value must be overridden by the board */ 176 clock-frequency = <0>; 177 bootph-all; 178 }; 179 180 pcie0_clkref: pcie0-clkref { 181 compatible = "fixed-clock"; 182 #clock-cells = <0>; 183 /* This value must be overridden by the board */ 184 clock-frequency = <0>; 185 }; 186 187 pcie1_clkref: pcie1-clkref { 188 compatible = "fixed-clock"; 189 #clock-cells = <0>; 190 /* This value must be overridden by the board */ 191 clock-frequency = <0>; 192 }; 193 194 pmu_a76 { 195 compatible = "arm,cortex-a76-pmu"; 196 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 197 }; 198 199 psci { 200 compatible = "arm,psci-1.0", "arm,psci-0.2"; 201 method = "smc"; 202 }; 203 204 /* External SCIF clocks - to be overridden by boards that provide them */ 205 scif_clk: scif { 206 compatible = "fixed-clock"; 207 #clock-cells = <0>; 208 clock-frequency = <0>; 209 }; 210 211 scif_clk2: scif2 { 212 compatible = "fixed-clock"; 213 #clock-cells = <0>; 214 clock-frequency = <0>; 215 }; 216 217 soc: soc { 218 compatible = "simple-bus"; 219 interrupt-parent = <&gic>; 220 bootph-all; 221 222 #address-cells = <2>; 223 #size-cells = <2>; 224 ranges; 225 226 rwdt: watchdog@e6020000 { 227 compatible = "renesas,r8a779g0-wdt", 228 "renesas,rcar-gen4-wdt"; 229 reg = <0 0xe6020000 0 0x0c>; 230 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 231 clocks = <&cpg CPG_MOD 907>; 232 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 233 resets = <&cpg 907>; 234 status = "disabled"; 235 }; 236 237 pfc: pinctrl@e6050000 { 238 compatible = "renesas,pfc-r8a779g0"; 239 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 240 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 241 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 242 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 243 <0 0xe6068000 0 0x16c>; 244 bootph-all; 245 }; 246 247 gpio0: gpio@e6050180 { 248 compatible = "renesas,gpio-r8a779g0", 249 "renesas,rcar-gen4-gpio"; 250 reg = <0 0xe6050180 0 0x54>; 251 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 252 clocks = <&cpg CPG_MOD 915>; 253 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 254 resets = <&cpg 915>; 255 gpio-controller; 256 #gpio-cells = <2>; 257 gpio-ranges = <&pfc 0 0 19>; 258 interrupt-controller; 259 #interrupt-cells = <2>; 260 }; 261 262 gpio1: gpio@e6050980 { 263 compatible = "renesas,gpio-r8a779g0", 264 "renesas,rcar-gen4-gpio"; 265 reg = <0 0xe6050980 0 0x54>; 266 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 267 clocks = <&cpg CPG_MOD 915>; 268 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 269 resets = <&cpg 915>; 270 gpio-controller; 271 #gpio-cells = <2>; 272 gpio-ranges = <&pfc 0 32 29>; 273 interrupt-controller; 274 #interrupt-cells = <2>; 275 }; 276 277 gpio2: gpio@e6058180 { 278 compatible = "renesas,gpio-r8a779g0", 279 "renesas,rcar-gen4-gpio"; 280 reg = <0 0xe6058180 0 0x54>; 281 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 282 clocks = <&cpg CPG_MOD 916>; 283 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 284 resets = <&cpg 916>; 285 gpio-controller; 286 #gpio-cells = <2>; 287 gpio-ranges = <&pfc 0 64 20>; 288 interrupt-controller; 289 #interrupt-cells = <2>; 290 }; 291 292 gpio3: gpio@e6058980 { 293 compatible = "renesas,gpio-r8a779g0", 294 "renesas,rcar-gen4-gpio"; 295 reg = <0 0xe6058980 0 0x54>; 296 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 297 clocks = <&cpg CPG_MOD 916>; 298 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 299 resets = <&cpg 916>; 300 gpio-controller; 301 #gpio-cells = <2>; 302 gpio-ranges = <&pfc 0 96 30>; 303 interrupt-controller; 304 #interrupt-cells = <2>; 305 }; 306 307 gpio4: gpio@e6060180 { 308 compatible = "renesas,gpio-r8a779g0", 309 "renesas,rcar-gen4-gpio"; 310 reg = <0 0xe6060180 0 0x54>; 311 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 312 clocks = <&cpg CPG_MOD 917>; 313 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 314 resets = <&cpg 917>; 315 gpio-controller; 316 #gpio-cells = <2>; 317 gpio-ranges = <&pfc 0 128 25>; 318 interrupt-controller; 319 #interrupt-cells = <2>; 320 }; 321 322 gpio5: gpio@e6060980 { 323 compatible = "renesas,gpio-r8a779g0", 324 "renesas,rcar-gen4-gpio"; 325 reg = <0 0xe6060980 0 0x54>; 326 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 917>; 328 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 329 resets = <&cpg 917>; 330 gpio-controller; 331 #gpio-cells = <2>; 332 gpio-ranges = <&pfc 0 160 21>; 333 interrupt-controller; 334 #interrupt-cells = <2>; 335 }; 336 337 gpio6: gpio@e6061180 { 338 compatible = "renesas,gpio-r8a779g0", 339 "renesas,rcar-gen4-gpio"; 340 reg = <0 0xe6061180 0 0x54>; 341 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 342 clocks = <&cpg CPG_MOD 917>; 343 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 344 resets = <&cpg 917>; 345 gpio-controller; 346 #gpio-cells = <2>; 347 gpio-ranges = <&pfc 0 192 21>; 348 interrupt-controller; 349 #interrupt-cells = <2>; 350 }; 351 352 gpio7: gpio@e6061980 { 353 compatible = "renesas,gpio-r8a779g0", 354 "renesas,rcar-gen4-gpio"; 355 reg = <0 0xe6061980 0 0x54>; 356 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 357 clocks = <&cpg CPG_MOD 917>; 358 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 359 resets = <&cpg 917>; 360 gpio-controller; 361 #gpio-cells = <2>; 362 gpio-ranges = <&pfc 0 224 21>; 363 interrupt-controller; 364 #interrupt-cells = <2>; 365 }; 366 367 gpio8: gpio@e6068180 { 368 compatible = "renesas,gpio-r8a779g0", 369 "renesas,rcar-gen4-gpio"; 370 reg = <0 0xe6068180 0 0x54>; 371 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 372 clocks = <&cpg CPG_MOD 918>; 373 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 374 resets = <&cpg 918>; 375 gpio-controller; 376 #gpio-cells = <2>; 377 gpio-ranges = <&pfc 0 256 14>; 378 interrupt-controller; 379 #interrupt-cells = <2>; 380 }; 381 382 cmt0: timer@e60f0000 { 383 compatible = "renesas,r8a779g0-cmt0", 384 "renesas,rcar-gen4-cmt0"; 385 reg = <0 0xe60f0000 0 0x1004>; 386 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 910>; 389 clock-names = "fck"; 390 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 391 resets = <&cpg 910>; 392 status = "disabled"; 393 }; 394 395 cmt1: timer@e6130000 { 396 compatible = "renesas,r8a779g0-cmt1", 397 "renesas,rcar-gen4-cmt1"; 398 reg = <0 0xe6130000 0 0x1004>; 399 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 911>; 408 clock-names = "fck"; 409 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 410 resets = <&cpg 911>; 411 status = "disabled"; 412 }; 413 414 cmt2: timer@e6140000 { 415 compatible = "renesas,r8a779g0-cmt1", 416 "renesas,rcar-gen4-cmt1"; 417 reg = <0 0xe6140000 0 0x1004>; 418 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 421 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 422 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 423 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 425 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&cpg CPG_MOD 912>; 427 clock-names = "fck"; 428 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 429 resets = <&cpg 912>; 430 status = "disabled"; 431 }; 432 433 cmt3: timer@e6148000 { 434 compatible = "renesas,r8a779g0-cmt1", 435 "renesas,rcar-gen4-cmt1"; 436 reg = <0 0xe6148000 0 0x1004>; 437 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 444 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 913>; 446 clock-names = "fck"; 447 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 448 resets = <&cpg 913>; 449 status = "disabled"; 450 }; 451 452 cpg: clock-controller@e6150000 { 453 compatible = "renesas,r8a779g0-cpg-mssr"; 454 reg = <0 0xe6150000 0 0x4000>; 455 clocks = <&extal_clk>, <&extalr_clk>; 456 clock-names = "extal", "extalr"; 457 #clock-cells = <2>; 458 #power-domain-cells = <0>; 459 #reset-cells = <1>; 460 bootph-all; 461 }; 462 463 rst: reset-controller@e6160000 { 464 compatible = "renesas,r8a779g0-rst"; 465 reg = <0 0xe6160000 0 0x4000>; 466 bootph-all; 467 }; 468 469 sysc: system-controller@e6180000 { 470 compatible = "renesas,r8a779g0-sysc"; 471 reg = <0 0xe6180000 0 0x4000>; 472 #power-domain-cells = <1>; 473 }; 474 475 tsc: thermal@e6198000 { 476 compatible = "renesas,r8a779g0-thermal"; 477 reg = <0 0xe6198000 0 0x200>, 478 <0 0xe61a0000 0 0x200>, 479 <0 0xe61a8000 0 0x200>, 480 <0 0xe61b0000 0 0x200>; 481 clocks = <&cpg CPG_MOD 919>; 482 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 483 resets = <&cpg 919>; 484 #thermal-sensor-cells = <1>; 485 }; 486 487 otp: otp@e61be000 { 488 compatible = "renesas,r8a779g0-otp"; 489 reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; 490 }; 491 492 intc_ex: interrupt-controller@e61c0000 { 493 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 494 #interrupt-cells = <2>; 495 interrupt-controller; 496 reg = <0 0xe61c0000 0 0x200>; 497 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 611>; 504 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 505 resets = <&cpg 611>; 506 }; 507 508 tmu0: timer@e61e0000 { 509 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 510 reg = <0 0xe61e0000 0 0x30>; 511 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 514 interrupt-names = "tuni0", "tuni1", "tuni2"; 515 clocks = <&cpg CPG_MOD 713>; 516 clock-names = "fck"; 517 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 518 resets = <&cpg 713>; 519 status = "disabled"; 520 }; 521 522 tmu1: timer@e6fc0000 { 523 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 524 reg = <0 0xe6fc0000 0 0x30>; 525 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 529 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 530 clocks = <&cpg CPG_MOD 714>; 531 clock-names = "fck"; 532 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 533 resets = <&cpg 714>; 534 status = "disabled"; 535 }; 536 537 tmu2: timer@e6fd0000 { 538 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 539 reg = <0 0xe6fd0000 0 0x30>; 540 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 541 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 542 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 544 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 545 clocks = <&cpg CPG_MOD 715>; 546 clock-names = "fck"; 547 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 548 resets = <&cpg 715>; 549 status = "disabled"; 550 }; 551 552 tmu3: timer@e6fe0000 { 553 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 554 reg = <0 0xe6fe0000 0 0x30>; 555 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 556 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 557 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 558 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 559 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 560 clocks = <&cpg CPG_MOD 716>; 561 clock-names = "fck"; 562 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 563 resets = <&cpg 716>; 564 status = "disabled"; 565 }; 566 567 tmu4: timer@ffc00000 { 568 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 569 reg = <0 0xffc00000 0 0x30>; 570 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 571 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 572 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 574 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 575 clocks = <&cpg CPG_MOD 717>; 576 clock-names = "fck"; 577 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 578 resets = <&cpg 717>; 579 status = "disabled"; 580 }; 581 582 tsn0: ethernet@e6460000 { 583 compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn"; 584 reg = <0 0xe6460000 0 0x7000>, 585 <0 0xe6449000 0 0x500>; 586 reg-names = "tsnes", "gptp"; 587 interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 588 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; 589 interrupt-names = "tx", "rx"; 590 clocks = <&cpg CPG_MOD 2723>; 591 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 592 resets = <&cpg 2723>; 593 status = "disabled"; 594 }; 595 596 i2c0: i2c@e6500000 { 597 compatible = "renesas,i2c-r8a779g0", 598 "renesas,rcar-gen4-i2c"; 599 reg = <0 0xe6500000 0 0x40>; 600 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 601 clocks = <&cpg CPG_MOD 518>; 602 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 603 <&dmac1 0x91>, <&dmac1 0x90>; 604 dma-names = "tx", "rx", "tx", "rx"; 605 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 606 resets = <&cpg 518>; 607 i2c-scl-internal-delay-ns = <110>; 608 #address-cells = <1>; 609 #size-cells = <0>; 610 status = "disabled"; 611 }; 612 613 i2c1: i2c@e6508000 { 614 compatible = "renesas,i2c-r8a779g0", 615 "renesas,rcar-gen4-i2c"; 616 reg = <0 0xe6508000 0 0x40>; 617 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 618 clocks = <&cpg CPG_MOD 519>; 619 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 620 <&dmac1 0x93>, <&dmac1 0x92>; 621 dma-names = "tx", "rx", "tx", "rx"; 622 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 623 resets = <&cpg 519>; 624 i2c-scl-internal-delay-ns = <110>; 625 #address-cells = <1>; 626 #size-cells = <0>; 627 status = "disabled"; 628 }; 629 630 i2c2: i2c@e6510000 { 631 compatible = "renesas,i2c-r8a779g0", 632 "renesas,rcar-gen4-i2c"; 633 reg = <0 0xe6510000 0 0x40>; 634 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 635 clocks = <&cpg CPG_MOD 520>; 636 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 637 <&dmac1 0x95>, <&dmac1 0x94>; 638 dma-names = "tx", "rx", "tx", "rx"; 639 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 640 resets = <&cpg 520>; 641 i2c-scl-internal-delay-ns = <110>; 642 #address-cells = <1>; 643 #size-cells = <0>; 644 status = "disabled"; 645 }; 646 647 i2c3: i2c@e66d0000 { 648 compatible = "renesas,i2c-r8a779g0", 649 "renesas,rcar-gen4-i2c"; 650 reg = <0 0xe66d0000 0 0x40>; 651 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 652 clocks = <&cpg CPG_MOD 521>; 653 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 654 <&dmac1 0x97>, <&dmac1 0x96>; 655 dma-names = "tx", "rx", "tx", "rx"; 656 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 657 resets = <&cpg 521>; 658 i2c-scl-internal-delay-ns = <110>; 659 #address-cells = <1>; 660 #size-cells = <0>; 661 status = "disabled"; 662 }; 663 664 i2c4: i2c@e66d8000 { 665 compatible = "renesas,i2c-r8a779g0", 666 "renesas,rcar-gen4-i2c"; 667 reg = <0 0xe66d8000 0 0x40>; 668 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 669 clocks = <&cpg CPG_MOD 522>; 670 dma-names = "tx", "rx", "tx", "rx"; 671 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 672 <&dmac1 0x99>, <&dmac1 0x98>; 673 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 674 resets = <&cpg 522>; 675 i2c-scl-internal-delay-ns = <110>; 676 #address-cells = <1>; 677 #size-cells = <0>; 678 status = "disabled"; 679 }; 680 681 i2c5: i2c@e66e0000 { 682 compatible = "renesas,i2c-r8a779g0", 683 "renesas,rcar-gen4-i2c"; 684 reg = <0 0xe66e0000 0 0x40>; 685 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 686 clocks = <&cpg CPG_MOD 523>; 687 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 688 <&dmac1 0x9b>, <&dmac1 0x9a>; 689 dma-names = "tx", "rx", "tx", "rx"; 690 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 691 resets = <&cpg 523>; 692 i2c-scl-internal-delay-ns = <110>; 693 #address-cells = <1>; 694 #size-cells = <0>; 695 status = "disabled"; 696 }; 697 698 hscif0: serial@e6540000 { 699 compatible = "renesas,hscif-r8a779g0", 700 "renesas,rcar-gen4-hscif", "renesas,hscif"; 701 reg = <0 0xe6540000 0 0x60>; 702 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 703 clocks = <&cpg CPG_MOD 514>, 704 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 705 <&scif_clk>; 706 clock-names = "fck", "brg_int", "scif_clk"; 707 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 708 <&dmac1 0x31>, <&dmac1 0x30>; 709 dma-names = "tx", "rx", "tx", "rx"; 710 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 711 resets = <&cpg 514>; 712 status = "disabled"; 713 }; 714 715 hscif1: serial@e6550000 { 716 compatible = "renesas,hscif-r8a779g0", 717 "renesas,rcar-gen4-hscif", "renesas,hscif"; 718 reg = <0 0xe6550000 0 0x60>; 719 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&cpg CPG_MOD 515>, 721 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 722 <&scif_clk>; 723 clock-names = "fck", "brg_int", "scif_clk"; 724 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 725 <&dmac1 0x33>, <&dmac1 0x32>; 726 dma-names = "tx", "rx", "tx", "rx"; 727 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 728 resets = <&cpg 515>; 729 status = "disabled"; 730 }; 731 732 hscif2: serial@e6560000 { 733 compatible = "renesas,hscif-r8a779g0", 734 "renesas,rcar-gen4-hscif", "renesas,hscif"; 735 reg = <0 0xe6560000 0 0x60>; 736 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&cpg CPG_MOD 516>, 738 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 739 <&scif_clk2>; 740 clock-names = "fck", "brg_int", "scif_clk"; 741 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 742 <&dmac1 0x35>, <&dmac1 0x34>; 743 dma-names = "tx", "rx", "tx", "rx"; 744 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 745 resets = <&cpg 516>; 746 status = "disabled"; 747 }; 748 749 hscif3: serial@e66a0000 { 750 compatible = "renesas,hscif-r8a779g0", 751 "renesas,rcar-gen4-hscif", "renesas,hscif"; 752 reg = <0 0xe66a0000 0 0x60>; 753 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 754 clocks = <&cpg CPG_MOD 517>, 755 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 756 <&scif_clk>; 757 clock-names = "fck", "brg_int", "scif_clk"; 758 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 759 <&dmac1 0x37>, <&dmac1 0x36>; 760 dma-names = "tx", "rx", "tx", "rx"; 761 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 762 resets = <&cpg 517>; 763 status = "disabled"; 764 }; 765 766 pciec0: pcie@e65d0000 { 767 compatible = "renesas,r8a779g0-pcie", 768 "renesas,rcar-gen4-pcie"; 769 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 770 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 771 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 772 <0 0xfe000000 0 0x400000>; 773 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 774 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 778 interrupt-names = "msi", "dma", "sft_ce", "app"; 779 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 780 clock-names = "core", "ref"; 781 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 782 resets = <&cpg 624>; 783 reset-names = "pwr"; 784 max-link-speed = <4>; 785 num-lanes = <2>; 786 #address-cells = <3>; 787 #size-cells = <2>; 788 bus-range = <0x00 0xff>; 789 device_type = "pci"; 790 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 791 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 792 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 793 #interrupt-cells = <1>; 794 interrupt-map-mask = <0 0 0 7>; 795 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 796 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 797 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 798 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 799 snps,enable-cdm-check; 800 status = "disabled"; 801 }; 802 803 pciec1: pcie@e65d8000 { 804 compatible = "renesas,r8a779g0-pcie", 805 "renesas,rcar-gen4-pcie"; 806 reg = <0 0xe65d8000 0 0x1000>, <0 0xe65da000 0 0x0800>, 807 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 808 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 809 <0 0xee900000 0 0x400000>; 810 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 811 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 815 interrupt-names = "msi", "dma", "sft_ce", "app"; 816 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 817 clock-names = "core", "ref"; 818 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 819 resets = <&cpg 625>; 820 reset-names = "pwr"; 821 max-link-speed = <4>; 822 num-lanes = <2>; 823 #address-cells = <3>; 824 #size-cells = <2>; 825 bus-range = <0x00 0xff>; 826 device_type = "pci"; 827 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00400000>, 828 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x10000000>; 829 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 830 #interrupt-cells = <1>; 831 interrupt-map-mask = <0 0 0 7>; 832 interrupt-map = <0 0 0 1 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 833 <0 0 0 2 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 834 <0 0 0 3 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 835 <0 0 0 4 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; 836 snps,enable-cdm-check; 837 status = "disabled"; 838 }; 839 840 pciec0_ep: pcie-ep@e65d0000 { 841 compatible = "renesas,r8a779g0-pcie-ep", 842 "renesas,rcar-gen4-pcie-ep"; 843 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 844 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 845 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 846 <0 0xfe000000 0 0x400000>; 847 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 848 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 851 interrupt-names = "dma", "sft_ce", "app"; 852 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 853 clock-names = "core", "ref"; 854 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 855 resets = <&cpg 624>; 856 reset-names = "pwr"; 857 max-link-speed = <4>; 858 num-lanes = <2>; 859 max-functions = /bits/ 8 <2>; 860 status = "disabled"; 861 }; 862 863 pciec1_ep: pcie-ep@e65d8000 { 864 compatible = "renesas,r8a779g0-pcie-ep", 865 "renesas,rcar-gen4-pcie-ep"; 866 reg = <0 0xe65d8000 0 0x2000>, <0 0xe65da000 0 0x1000>, 867 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 868 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 869 <0 0xee900000 0 0x400000>; 870 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 871 interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 874 interrupt-names = "dma", "sft_ce", "app"; 875 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 876 clock-names = "core", "ref"; 877 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 878 resets = <&cpg 625>; 879 reset-names = "pwr"; 880 max-link-speed = <4>; 881 num-lanes = <2>; 882 max-functions = /bits/ 8 <2>; 883 status = "disabled"; 884 }; 885 886 canfd: can@e6660000 { 887 compatible = "renesas,r8a779g0-canfd", 888 "renesas,rcar-gen4-canfd"; 889 reg = <0 0xe6660000 0 0x8500>; 890 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 892 interrupt-names = "ch_int", "g_int"; 893 clocks = <&cpg CPG_MOD 328>, 894 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 895 <&can_clk>; 896 clock-names = "fck", "canfd", "can_clk"; 897 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 898 assigned-clock-rates = <80000000>; 899 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 900 resets = <&cpg 328>; 901 status = "disabled"; 902 903 channel0 { 904 status = "disabled"; 905 }; 906 907 channel1 { 908 status = "disabled"; 909 }; 910 911 channel2 { 912 status = "disabled"; 913 }; 914 915 channel3 { 916 status = "disabled"; 917 }; 918 919 channel4 { 920 status = "disabled"; 921 }; 922 923 channel5 { 924 status = "disabled"; 925 }; 926 927 channel6 { 928 status = "disabled"; 929 }; 930 931 channel7 { 932 status = "disabled"; 933 }; 934 }; 935 936 avb0: ethernet@e6800000 { 937 compatible = "renesas,etheravb-r8a779g0", 938 "renesas,etheravb-rcar-gen4"; 939 reg = <0 0xe6800000 0 0x1000>; 940 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 941 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 942 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 943 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 965 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 966 "ch5", "ch6", "ch7", "ch8", "ch9", 967 "ch10", "ch11", "ch12", "ch13", 968 "ch14", "ch15", "ch16", "ch17", 969 "ch18", "ch19", "ch20", "ch21", 970 "ch22", "ch23", "ch24"; 971 clocks = <&cpg CPG_MOD 211>; 972 clock-names = "fck"; 973 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 974 resets = <&cpg 211>; 975 phy-mode = "rgmii"; 976 rx-internal-delay-ps = <0>; 977 tx-internal-delay-ps = <0>; 978 iommus = <&ipmmu_hc 0>; 979 status = "disabled"; 980 }; 981 982 avb1: ethernet@e6810000 { 983 compatible = "renesas,etheravb-r8a779g0", 984 "renesas,etheravb-rcar-gen4"; 985 reg = <0 0xe6810000 0 0x1000>; 986 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 1005 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 1006 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 1009 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 1010 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 1011 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1012 "ch5", "ch6", "ch7", "ch8", "ch9", 1013 "ch10", "ch11", "ch12", "ch13", 1014 "ch14", "ch15", "ch16", "ch17", 1015 "ch18", "ch19", "ch20", "ch21", 1016 "ch22", "ch23", "ch24"; 1017 clocks = <&cpg CPG_MOD 212>; 1018 clock-names = "fck"; 1019 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1020 resets = <&cpg 212>; 1021 phy-mode = "rgmii"; 1022 rx-internal-delay-ps = <0>; 1023 tx-internal-delay-ps = <0>; 1024 iommus = <&ipmmu_hc 1>; 1025 status = "disabled"; 1026 }; 1027 1028 avb2: ethernet@e6820000 { 1029 compatible = "renesas,etheravb-r8a779g0", 1030 "renesas,etheravb-rcar-gen4"; 1031 reg = <0 0xe6820000 0 0x1000>; 1032 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1048 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1049 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1050 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1051 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1052 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1053 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1055 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1056 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 1057 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1058 "ch5", "ch6", "ch7", "ch8", "ch9", 1059 "ch10", "ch11", "ch12", "ch13", 1060 "ch14", "ch15", "ch16", "ch17", 1061 "ch18", "ch19", "ch20", "ch21", 1062 "ch22", "ch23", "ch24"; 1063 clocks = <&cpg CPG_MOD 213>; 1064 clock-names = "fck"; 1065 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1066 resets = <&cpg 213>; 1067 phy-mode = "rgmii"; 1068 rx-internal-delay-ps = <0>; 1069 tx-internal-delay-ps = <0>; 1070 iommus = <&ipmmu_hc 2>; 1071 status = "disabled"; 1072 }; 1073 1074 pwm0: pwm@e6e30000 { 1075 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1076 reg = <0 0xe6e30000 0 0x10>; 1077 #pwm-cells = <2>; 1078 clocks = <&cpg CPG_MOD 628>; 1079 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1080 resets = <&cpg 628>; 1081 status = "disabled"; 1082 }; 1083 1084 pwm1: pwm@e6e31000 { 1085 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1086 reg = <0 0xe6e31000 0 0x10>; 1087 #pwm-cells = <2>; 1088 clocks = <&cpg CPG_MOD 628>; 1089 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1090 resets = <&cpg 628>; 1091 status = "disabled"; 1092 }; 1093 1094 pwm2: pwm@e6e32000 { 1095 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1096 reg = <0 0xe6e32000 0 0x10>; 1097 #pwm-cells = <2>; 1098 clocks = <&cpg CPG_MOD 628>; 1099 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1100 resets = <&cpg 628>; 1101 status = "disabled"; 1102 }; 1103 1104 pwm3: pwm@e6e33000 { 1105 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1106 reg = <0 0xe6e33000 0 0x10>; 1107 #pwm-cells = <2>; 1108 clocks = <&cpg CPG_MOD 628>; 1109 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1110 resets = <&cpg 628>; 1111 status = "disabled"; 1112 }; 1113 1114 pwm4: pwm@e6e34000 { 1115 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1116 reg = <0 0xe6e34000 0 0x10>; 1117 #pwm-cells = <2>; 1118 clocks = <&cpg CPG_MOD 628>; 1119 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1120 resets = <&cpg 628>; 1121 status = "disabled"; 1122 }; 1123 1124 pwm5: pwm@e6e35000 { 1125 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e35000 0 0x10>; 1127 #pwm-cells = <2>; 1128 clocks = <&cpg CPG_MOD 628>; 1129 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1130 resets = <&cpg 628>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm6: pwm@e6e36000 { 1135 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e36000 0 0x10>; 1137 #pwm-cells = <2>; 1138 clocks = <&cpg CPG_MOD 628>; 1139 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1140 resets = <&cpg 628>; 1141 status = "disabled"; 1142 }; 1143 1144 pwm7: pwm@e6e37000 { 1145 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1146 reg = <0 0xe6e37000 0 0x10>; 1147 #pwm-cells = <2>; 1148 clocks = <&cpg CPG_MOD 628>; 1149 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1150 resets = <&cpg 628>; 1151 status = "disabled"; 1152 }; 1153 1154 pwm8: pwm@e6e38000 { 1155 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1156 reg = <0 0xe6e38000 0 0x10>; 1157 #pwm-cells = <2>; 1158 clocks = <&cpg CPG_MOD 628>; 1159 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1160 resets = <&cpg 628>; 1161 status = "disabled"; 1162 }; 1163 1164 pwm9: pwm@e6e39000 { 1165 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1166 reg = <0 0xe6e39000 0 0x10>; 1167 #pwm-cells = <2>; 1168 clocks = <&cpg CPG_MOD 628>; 1169 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1170 resets = <&cpg 628>; 1171 status = "disabled"; 1172 }; 1173 1174 scif0: serial@e6e60000 { 1175 compatible = "renesas,scif-r8a779g0", 1176 "renesas,rcar-gen4-scif", "renesas,scif"; 1177 reg = <0 0xe6e60000 0 64>; 1178 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1179 clocks = <&cpg CPG_MOD 702>, 1180 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1181 <&scif_clk>; 1182 clock-names = "fck", "brg_int", "scif_clk"; 1183 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1184 <&dmac1 0x51>, <&dmac1 0x50>; 1185 dma-names = "tx", "rx", "tx", "rx"; 1186 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1187 resets = <&cpg 702>; 1188 status = "disabled"; 1189 }; 1190 1191 scif1: serial@e6e68000 { 1192 compatible = "renesas,scif-r8a779g0", 1193 "renesas,rcar-gen4-scif", "renesas,scif"; 1194 reg = <0 0xe6e68000 0 64>; 1195 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1196 clocks = <&cpg CPG_MOD 703>, 1197 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1198 <&scif_clk>; 1199 clock-names = "fck", "brg_int", "scif_clk"; 1200 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1201 <&dmac1 0x53>, <&dmac1 0x52>; 1202 dma-names = "tx", "rx", "tx", "rx"; 1203 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1204 resets = <&cpg 703>; 1205 status = "disabled"; 1206 }; 1207 1208 scif3: serial@e6c50000 { 1209 compatible = "renesas,scif-r8a779g0", 1210 "renesas,rcar-gen4-scif", "renesas,scif"; 1211 reg = <0 0xe6c50000 0 64>; 1212 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1213 clocks = <&cpg CPG_MOD 704>, 1214 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1215 <&scif_clk>; 1216 clock-names = "fck", "brg_int", "scif_clk"; 1217 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1218 <&dmac1 0x57>, <&dmac1 0x56>; 1219 dma-names = "tx", "rx", "tx", "rx"; 1220 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1221 resets = <&cpg 704>; 1222 status = "disabled"; 1223 }; 1224 1225 scif4: serial@e6c40000 { 1226 compatible = "renesas,scif-r8a779g0", 1227 "renesas,rcar-gen4-scif", "renesas,scif"; 1228 reg = <0 0xe6c40000 0 64>; 1229 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 705>, 1231 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1232 <&scif_clk2>; 1233 clock-names = "fck", "brg_int", "scif_clk"; 1234 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1235 <&dmac1 0x59>, <&dmac1 0x58>; 1236 dma-names = "tx", "rx", "tx", "rx"; 1237 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1238 resets = <&cpg 705>; 1239 status = "disabled"; 1240 }; 1241 1242 tpu: pwm@e6e80000 { 1243 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1244 reg = <0 0xe6e80000 0 0x148>; 1245 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1246 clocks = <&cpg CPG_MOD 718>; 1247 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1248 resets = <&cpg 718>; 1249 #pwm-cells = <3>; 1250 status = "disabled"; 1251 }; 1252 1253 msiof0: spi@e6e90000 { 1254 compatible = "renesas,msiof-r8a779g0", 1255 "renesas,rcar-gen4-msiof"; 1256 reg = <0 0xe6e90000 0 0x0064>; 1257 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1258 clocks = <&cpg CPG_MOD 618>; 1259 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1260 <&dmac1 0x41>, <&dmac1 0x40>; 1261 dma-names = "tx", "rx", "tx", "rx"; 1262 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1263 resets = <&cpg 618>; 1264 #address-cells = <1>; 1265 #size-cells = <0>; 1266 status = "disabled"; 1267 }; 1268 1269 msiof1: spi@e6ea0000 { 1270 compatible = "renesas,msiof-r8a779g0", 1271 "renesas,rcar-gen4-msiof"; 1272 reg = <0 0xe6ea0000 0 0x0064>; 1273 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1274 clocks = <&cpg CPG_MOD 619>; 1275 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1276 <&dmac1 0x43>, <&dmac1 0x42>; 1277 dma-names = "tx", "rx", "tx", "rx"; 1278 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1279 resets = <&cpg 619>; 1280 #address-cells = <1>; 1281 #size-cells = <0>; 1282 status = "disabled"; 1283 }; 1284 1285 msiof2: spi@e6c00000 { 1286 compatible = "renesas,msiof-r8a779g0", 1287 "renesas,rcar-gen4-msiof"; 1288 reg = <0 0xe6c00000 0 0x0064>; 1289 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1290 clocks = <&cpg CPG_MOD 620>; 1291 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1292 <&dmac1 0x45>, <&dmac1 0x44>; 1293 dma-names = "tx", "rx", "tx", "rx"; 1294 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1295 resets = <&cpg 620>; 1296 #address-cells = <1>; 1297 #size-cells = <0>; 1298 status = "disabled"; 1299 }; 1300 1301 msiof3: spi@e6c10000 { 1302 compatible = "renesas,msiof-r8a779g0", 1303 "renesas,rcar-gen4-msiof"; 1304 reg = <0 0xe6c10000 0 0x0064>; 1305 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1306 clocks = <&cpg CPG_MOD 621>; 1307 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1308 <&dmac1 0x47>, <&dmac1 0x46>; 1309 dma-names = "tx", "rx", "tx", "rx"; 1310 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1311 resets = <&cpg 621>; 1312 #address-cells = <1>; 1313 #size-cells = <0>; 1314 status = "disabled"; 1315 }; 1316 1317 msiof4: spi@e6c20000 { 1318 compatible = "renesas,msiof-r8a779g0", 1319 "renesas,rcar-gen4-msiof"; 1320 reg = <0 0xe6c20000 0 0x0064>; 1321 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1322 clocks = <&cpg CPG_MOD 622>; 1323 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1324 <&dmac1 0x49>, <&dmac1 0x48>; 1325 dma-names = "tx", "rx", "tx", "rx"; 1326 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1327 resets = <&cpg 622>; 1328 #address-cells = <1>; 1329 #size-cells = <0>; 1330 status = "disabled"; 1331 }; 1332 1333 msiof5: spi@e6c28000 { 1334 compatible = "renesas,msiof-r8a779g0", 1335 "renesas,rcar-gen4-msiof"; 1336 reg = <0 0xe6c28000 0 0x0064>; 1337 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1338 clocks = <&cpg CPG_MOD 623>; 1339 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1340 <&dmac1 0x4b>, <&dmac1 0x4a>; 1341 dma-names = "tx", "rx", "tx", "rx"; 1342 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1343 resets = <&cpg 623>; 1344 #address-cells = <1>; 1345 #size-cells = <0>; 1346 status = "disabled"; 1347 }; 1348 1349 vin00: video@e6ef0000 { 1350 compatible = "renesas,vin-r8a779g0", 1351 "renesas,rcar-gen4-vin"; 1352 reg = <0 0xe6ef0000 0 0x1000>; 1353 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1354 clocks = <&cpg CPG_MOD 730>; 1355 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1356 resets = <&cpg 730>; 1357 renesas,id = <0>; 1358 status = "disabled"; 1359 1360 ports { 1361 #address-cells = <1>; 1362 #size-cells = <0>; 1363 1364 port@2 { 1365 #address-cells = <1>; 1366 #size-cells = <0>; 1367 1368 reg = <2>; 1369 1370 vin00isp0: endpoint@0 { 1371 reg = <0>; 1372 remote-endpoint = <&isp0vin00>; 1373 }; 1374 }; 1375 }; 1376 }; 1377 1378 vin01: video@e6ef1000 { 1379 compatible = "renesas,vin-r8a779g0", 1380 "renesas,rcar-gen4-vin"; 1381 reg = <0 0xe6ef1000 0 0x1000>; 1382 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1383 clocks = <&cpg CPG_MOD 731>; 1384 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1385 resets = <&cpg 731>; 1386 renesas,id = <1>; 1387 status = "disabled"; 1388 1389 ports { 1390 #address-cells = <1>; 1391 #size-cells = <0>; 1392 1393 port@2 { 1394 #address-cells = <1>; 1395 #size-cells = <0>; 1396 1397 reg = <2>; 1398 1399 vin01isp0: endpoint@0 { 1400 reg = <0>; 1401 remote-endpoint = <&isp0vin01>; 1402 }; 1403 }; 1404 }; 1405 }; 1406 1407 vin02: video@e6ef2000 { 1408 compatible = "renesas,vin-r8a779g0", 1409 "renesas,rcar-gen4-vin"; 1410 reg = <0 0xe6ef2000 0 0x1000>; 1411 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1412 clocks = <&cpg CPG_MOD 800>; 1413 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1414 resets = <&cpg 800>; 1415 renesas,id = <2>; 1416 status = "disabled"; 1417 1418 ports { 1419 #address-cells = <1>; 1420 #size-cells = <0>; 1421 1422 port@2 { 1423 #address-cells = <1>; 1424 #size-cells = <0>; 1425 1426 reg = <2>; 1427 1428 vin02isp0: endpoint@0 { 1429 reg = <0>; 1430 remote-endpoint = <&isp0vin02>; 1431 }; 1432 }; 1433 }; 1434 }; 1435 1436 vin03: video@e6ef3000 { 1437 compatible = "renesas,vin-r8a779g0", 1438 "renesas,rcar-gen4-vin"; 1439 reg = <0 0xe6ef3000 0 0x1000>; 1440 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1441 clocks = <&cpg CPG_MOD 801>; 1442 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1443 resets = <&cpg 801>; 1444 renesas,id = <3>; 1445 status = "disabled"; 1446 1447 ports { 1448 #address-cells = <1>; 1449 #size-cells = <0>; 1450 1451 port@2 { 1452 #address-cells = <1>; 1453 #size-cells = <0>; 1454 1455 reg = <2>; 1456 1457 vin03isp0: endpoint@0 { 1458 reg = <0>; 1459 remote-endpoint = <&isp0vin03>; 1460 }; 1461 }; 1462 }; 1463 }; 1464 1465 vin04: video@e6ef4000 { 1466 compatible = "renesas,vin-r8a779g0", 1467 "renesas,rcar-gen4-vin"; 1468 reg = <0 0xe6ef4000 0 0x1000>; 1469 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1470 clocks = <&cpg CPG_MOD 802>; 1471 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1472 resets = <&cpg 802>; 1473 renesas,id = <4>; 1474 status = "disabled"; 1475 1476 ports { 1477 #address-cells = <1>; 1478 #size-cells = <0>; 1479 1480 port@2 { 1481 #address-cells = <1>; 1482 #size-cells = <0>; 1483 1484 reg = <2>; 1485 1486 vin04isp0: endpoint@0 { 1487 reg = <0>; 1488 remote-endpoint = <&isp0vin04>; 1489 }; 1490 }; 1491 }; 1492 }; 1493 1494 vin05: video@e6ef5000 { 1495 compatible = "renesas,vin-r8a779g0", 1496 "renesas,rcar-gen4-vin"; 1497 reg = <0 0xe6ef5000 0 0x1000>; 1498 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1499 clocks = <&cpg CPG_MOD 803>; 1500 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1501 resets = <&cpg 803>; 1502 renesas,id = <5>; 1503 status = "disabled"; 1504 1505 ports { 1506 #address-cells = <1>; 1507 #size-cells = <0>; 1508 1509 port@2 { 1510 #address-cells = <1>; 1511 #size-cells = <0>; 1512 1513 reg = <2>; 1514 1515 vin05isp0: endpoint@0 { 1516 reg = <0>; 1517 remote-endpoint = <&isp0vin05>; 1518 }; 1519 }; 1520 }; 1521 }; 1522 1523 vin06: video@e6ef6000 { 1524 compatible = "renesas,vin-r8a779g0", 1525 "renesas,rcar-gen4-vin"; 1526 reg = <0 0xe6ef6000 0 0x1000>; 1527 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1528 clocks = <&cpg CPG_MOD 804>; 1529 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1530 resets = <&cpg 804>; 1531 renesas,id = <6>; 1532 status = "disabled"; 1533 1534 ports { 1535 #address-cells = <1>; 1536 #size-cells = <0>; 1537 1538 port@2 { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 reg = <2>; 1543 1544 vin06isp0: endpoint@0 { 1545 reg = <0>; 1546 remote-endpoint = <&isp0vin06>; 1547 }; 1548 }; 1549 }; 1550 }; 1551 1552 vin07: video@e6ef7000 { 1553 compatible = "renesas,vin-r8a779g0", 1554 "renesas,rcar-gen4-vin"; 1555 reg = <0 0xe6ef7000 0 0x1000>; 1556 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1557 clocks = <&cpg CPG_MOD 805>; 1558 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1559 resets = <&cpg 805>; 1560 renesas,id = <7>; 1561 status = "disabled"; 1562 1563 ports { 1564 #address-cells = <1>; 1565 #size-cells = <0>; 1566 1567 port@2 { 1568 #address-cells = <1>; 1569 #size-cells = <0>; 1570 1571 reg = <2>; 1572 1573 vin07isp0: endpoint@0 { 1574 reg = <0>; 1575 remote-endpoint = <&isp0vin07>; 1576 }; 1577 }; 1578 }; 1579 }; 1580 1581 vin08: video@e6ef8000 { 1582 compatible = "renesas,vin-r8a779g0", 1583 "renesas,rcar-gen4-vin"; 1584 reg = <0 0xe6ef8000 0 0x1000>; 1585 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1586 clocks = <&cpg CPG_MOD 806>; 1587 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1588 resets = <&cpg 806>; 1589 renesas,id = <8>; 1590 status = "disabled"; 1591 1592 ports { 1593 #address-cells = <1>; 1594 #size-cells = <0>; 1595 1596 port@2 { 1597 #address-cells = <1>; 1598 #size-cells = <0>; 1599 1600 reg = <2>; 1601 1602 vin08isp1: endpoint@1 { 1603 reg = <1>; 1604 remote-endpoint = <&isp1vin08>; 1605 }; 1606 }; 1607 }; 1608 }; 1609 1610 vin09: video@e6ef9000 { 1611 compatible = "renesas,vin-r8a779g0", 1612 "renesas,rcar-gen4-vin"; 1613 reg = <0 0xe6ef9000 0 0x1000>; 1614 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1615 clocks = <&cpg CPG_MOD 807>; 1616 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1617 resets = <&cpg 807>; 1618 renesas,id = <9>; 1619 status = "disabled"; 1620 1621 ports { 1622 #address-cells = <1>; 1623 #size-cells = <0>; 1624 1625 port@2 { 1626 #address-cells = <1>; 1627 #size-cells = <0>; 1628 1629 reg = <2>; 1630 1631 vin09isp1: endpoint@1 { 1632 reg = <1>; 1633 remote-endpoint = <&isp1vin09>; 1634 }; 1635 }; 1636 }; 1637 }; 1638 1639 vin10: video@e6efa000 { 1640 compatible = "renesas,vin-r8a779g0", 1641 "renesas,rcar-gen4-vin"; 1642 reg = <0 0xe6efa000 0 0x1000>; 1643 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1644 clocks = <&cpg CPG_MOD 808>; 1645 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1646 resets = <&cpg 808>; 1647 renesas,id = <10>; 1648 status = "disabled"; 1649 1650 ports { 1651 #address-cells = <1>; 1652 #size-cells = <0>; 1653 1654 port@2 { 1655 #address-cells = <1>; 1656 #size-cells = <0>; 1657 1658 reg = <2>; 1659 1660 vin10isp1: endpoint@1 { 1661 reg = <1>; 1662 remote-endpoint = <&isp1vin10>; 1663 }; 1664 }; 1665 }; 1666 }; 1667 1668 vin11: video@e6efb000 { 1669 compatible = "renesas,vin-r8a779g0", 1670 "renesas,rcar-gen4-vin"; 1671 reg = <0 0xe6efb000 0 0x1000>; 1672 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1673 clocks = <&cpg CPG_MOD 809>; 1674 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1675 resets = <&cpg 809>; 1676 renesas,id = <11>; 1677 status = "disabled"; 1678 1679 ports { 1680 #address-cells = <1>; 1681 #size-cells = <0>; 1682 1683 port@2 { 1684 #address-cells = <1>; 1685 #size-cells = <0>; 1686 1687 reg = <2>; 1688 1689 vin11isp1: endpoint@1 { 1690 reg = <1>; 1691 remote-endpoint = <&isp1vin11>; 1692 }; 1693 }; 1694 }; 1695 }; 1696 1697 vin12: video@e6efc000 { 1698 compatible = "renesas,vin-r8a779g0", 1699 "renesas,rcar-gen4-vin"; 1700 reg = <0 0xe6efc000 0 0x1000>; 1701 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1702 clocks = <&cpg CPG_MOD 810>; 1703 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1704 resets = <&cpg 810>; 1705 renesas,id = <12>; 1706 status = "disabled"; 1707 1708 ports { 1709 #address-cells = <1>; 1710 #size-cells = <0>; 1711 1712 port@2 { 1713 #address-cells = <1>; 1714 #size-cells = <0>; 1715 1716 reg = <2>; 1717 1718 vin12isp1: endpoint@1 { 1719 reg = <1>; 1720 remote-endpoint = <&isp1vin12>; 1721 }; 1722 }; 1723 }; 1724 }; 1725 1726 vin13: video@e6efd000 { 1727 compatible = "renesas,vin-r8a779g0", 1728 "renesas,rcar-gen4-vin"; 1729 reg = <0 0xe6efd000 0 0x1000>; 1730 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1731 clocks = <&cpg CPG_MOD 811>; 1732 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1733 resets = <&cpg 811>; 1734 renesas,id = <13>; 1735 status = "disabled"; 1736 1737 ports { 1738 #address-cells = <1>; 1739 #size-cells = <0>; 1740 1741 port@2 { 1742 #address-cells = <1>; 1743 #size-cells = <0>; 1744 1745 reg = <2>; 1746 1747 vin13isp1: endpoint@1 { 1748 reg = <1>; 1749 remote-endpoint = <&isp1vin13>; 1750 }; 1751 }; 1752 }; 1753 }; 1754 1755 vin14: video@e6efe000 { 1756 compatible = "renesas,vin-r8a779g0", 1757 "renesas,rcar-gen4-vin"; 1758 reg = <0 0xe6efe000 0 0x1000>; 1759 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1760 clocks = <&cpg CPG_MOD 812>; 1761 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1762 resets = <&cpg 812>; 1763 renesas,id = <14>; 1764 status = "disabled"; 1765 1766 ports { 1767 #address-cells = <1>; 1768 #size-cells = <0>; 1769 1770 port@2 { 1771 #address-cells = <1>; 1772 #size-cells = <0>; 1773 1774 reg = <2>; 1775 1776 vin14isp1: endpoint@1 { 1777 reg = <1>; 1778 remote-endpoint = <&isp1vin14>; 1779 }; 1780 }; 1781 }; 1782 }; 1783 1784 vin15: video@e6eff000 { 1785 compatible = "renesas,vin-r8a779g0", 1786 "renesas,rcar-gen4-vin"; 1787 reg = <0 0xe6eff000 0 0x1000>; 1788 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1789 clocks = <&cpg CPG_MOD 813>; 1790 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1791 resets = <&cpg 813>; 1792 renesas,id = <15>; 1793 status = "disabled"; 1794 1795 ports { 1796 #address-cells = <1>; 1797 #size-cells = <0>; 1798 1799 port@2 { 1800 #address-cells = <1>; 1801 #size-cells = <0>; 1802 1803 reg = <2>; 1804 1805 vin15isp1: endpoint@1 { 1806 reg = <1>; 1807 remote-endpoint = <&isp1vin15>; 1808 }; 1809 }; 1810 }; 1811 }; 1812 1813 dmac0: dma-controller@e7350000 { 1814 compatible = "renesas,dmac-r8a779g0", 1815 "renesas,rcar-gen4-dmac"; 1816 reg = <0 0xe7350000 0 0x1000>, 1817 <0 0xe7300000 0 0x10000>; 1818 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1819 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1820 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1821 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1822 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1823 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1824 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1825 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1826 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1827 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1828 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1829 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1830 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1831 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1832 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1833 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1834 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1835 interrupt-names = "error", 1836 "ch0", "ch1", "ch2", "ch3", "ch4", 1837 "ch5", "ch6", "ch7", "ch8", "ch9", 1838 "ch10", "ch11", "ch12", "ch13", 1839 "ch14", "ch15"; 1840 clocks = <&cpg CPG_MOD 709>; 1841 clock-names = "fck"; 1842 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1843 resets = <&cpg 709>; 1844 #dma-cells = <1>; 1845 dma-channels = <16>; 1846 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1847 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1848 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1849 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1850 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1851 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1852 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1853 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1854 }; 1855 1856 dmac1: dma-controller@e7351000 { 1857 compatible = "renesas,dmac-r8a779g0", 1858 "renesas,rcar-gen4-dmac"; 1859 reg = <0 0xe7351000 0 0x1000>, 1860 <0 0xe7310000 0 0x10000>; 1861 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1862 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1863 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1864 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1865 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1866 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1867 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1868 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1869 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1870 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1871 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1872 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1873 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1874 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1875 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1876 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1877 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1878 interrupt-names = "error", 1879 "ch0", "ch1", "ch2", "ch3", "ch4", 1880 "ch5", "ch6", "ch7", "ch8", "ch9", 1881 "ch10", "ch11", "ch12", "ch13", 1882 "ch14", "ch15"; 1883 clocks = <&cpg CPG_MOD 710>; 1884 clock-names = "fck"; 1885 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1886 resets = <&cpg 710>; 1887 #dma-cells = <1>; 1888 dma-channels = <16>; 1889 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1890 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1891 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1892 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1893 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1894 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1895 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1896 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1897 }; 1898 1899 rcar_sound: sound@ec5a0000 { 1900 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1901 reg = <0 0xec5a0000 0 0x020>, 1902 <0 0xec540000 0 0x1000>, 1903 <0 0xec541000 0 0x050>, 1904 <0 0xec400000 0 0x40000>; 1905 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1906 1907 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1908 clock-names = "ssiu.0", "ssi.0", "clkin"; 1909 /* #clock-cells is fixed */ 1910 #clock-cells = <0>; 1911 /* #sound-dai-cells is fixed */ 1912 #sound-dai-cells = <0>; 1913 1914 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1915 resets = <&cpg 2926>, <&cpg 2927>; 1916 reset-names = "ssiu.0", "ssi.0"; 1917 status = "disabled"; 1918 1919 rcar_sound,ssiu { 1920 ssiu00: ssiu-0 { 1921 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1922 dma-names = "tx", "rx"; 1923 }; 1924 ssiu01: ssiu-1 { 1925 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1926 dma-names = "tx", "rx"; 1927 }; 1928 ssiu02: ssiu-2 { 1929 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1930 dma-names = "tx", "rx"; 1931 }; 1932 ssiu03: ssiu-3 { 1933 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1934 dma-names = "tx", "rx"; 1935 }; 1936 ssiu04: ssiu-4 { 1937 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1938 dma-names = "tx", "rx"; 1939 }; 1940 ssiu05: ssiu-5 { 1941 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1942 dma-names = "tx", "rx"; 1943 }; 1944 ssiu06: ssiu-6 { 1945 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1946 dma-names = "tx", "rx"; 1947 }; 1948 ssiu07: ssiu-7 { 1949 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1950 dma-names = "tx", "rx"; 1951 }; 1952 }; 1953 1954 rcar_sound,ssi { 1955 ssi0: ssi-0 { 1956 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1957 }; 1958 }; 1959 }; 1960 1961 mmc0: mmc@ee140000 { 1962 compatible = "renesas,sdhi-r8a779g0", 1963 "renesas,rcar-gen4-sdhi"; 1964 reg = <0 0xee140000 0 0x2000>; 1965 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1966 clocks = <&cpg CPG_MOD 706>, 1967 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1968 clock-names = "core", "clkh"; 1969 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1970 resets = <&cpg 706>; 1971 max-frequency = <200000000>; 1972 iommus = <&ipmmu_ds0 32>; 1973 status = "disabled"; 1974 }; 1975 1976 rpc: spi@ee200000 { 1977 compatible = "renesas,r8a779g0-rpc-if", 1978 "renesas,rcar-gen4-rpc-if"; 1979 reg = <0 0xee200000 0 0x200>, 1980 <0 0x08000000 0 0x04000000>, 1981 <0 0xee208000 0 0x100>; 1982 reg-names = "regs", "dirmap", "wbuf"; 1983 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1984 clocks = <&cpg CPG_MOD 629>; 1985 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1986 resets = <&cpg 629>; 1987 #address-cells = <1>; 1988 #size-cells = <0>; 1989 status = "disabled"; 1990 }; 1991 1992 ipmmu_rt0: iommu@ee480000 { 1993 compatible = "renesas,ipmmu-r8a779g0", 1994 "renesas,rcar-gen4-ipmmu-vmsa"; 1995 reg = <0 0xee480000 0 0x20000>; 1996 renesas,ipmmu-main = <&ipmmu_mm>; 1997 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1998 #iommu-cells = <1>; 1999 }; 2000 2001 ipmmu_rt1: iommu@ee4c0000 { 2002 compatible = "renesas,ipmmu-r8a779g0", 2003 "renesas,rcar-gen4-ipmmu-vmsa"; 2004 reg = <0 0xee4c0000 0 0x20000>; 2005 renesas,ipmmu-main = <&ipmmu_mm>; 2006 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2007 #iommu-cells = <1>; 2008 }; 2009 2010 ipmmu_ds0: iommu@eed00000 { 2011 compatible = "renesas,ipmmu-r8a779g0", 2012 "renesas,rcar-gen4-ipmmu-vmsa"; 2013 reg = <0 0xeed00000 0 0x20000>; 2014 renesas,ipmmu-main = <&ipmmu_mm>; 2015 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2016 #iommu-cells = <1>; 2017 }; 2018 2019 ipmmu_hc: iommu@eed40000 { 2020 compatible = "renesas,ipmmu-r8a779g0", 2021 "renesas,rcar-gen4-ipmmu-vmsa"; 2022 reg = <0 0xeed40000 0 0x20000>; 2023 renesas,ipmmu-main = <&ipmmu_mm>; 2024 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2025 #iommu-cells = <1>; 2026 }; 2027 2028 ipmmu_ir: iommu@eed80000 { 2029 compatible = "renesas,ipmmu-r8a779g0", 2030 "renesas,rcar-gen4-ipmmu-vmsa"; 2031 reg = <0 0xeed80000 0 0x20000>; 2032 renesas,ipmmu-main = <&ipmmu_mm>; 2033 power-domains = <&sysc R8A779G0_PD_A3IR>; 2034 #iommu-cells = <1>; 2035 }; 2036 2037 ipmmu_vc: iommu@eedc0000 { 2038 compatible = "renesas,ipmmu-r8a779g0", 2039 "renesas,rcar-gen4-ipmmu-vmsa"; 2040 reg = <0 0xeedc0000 0 0x20000>; 2041 renesas,ipmmu-main = <&ipmmu_mm>; 2042 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2043 #iommu-cells = <1>; 2044 }; 2045 2046 ipmmu_3dg: iommu@eee00000 { 2047 compatible = "renesas,ipmmu-r8a779g0", 2048 "renesas,rcar-gen4-ipmmu-vmsa"; 2049 reg = <0 0xeee00000 0 0x20000>; 2050 renesas,ipmmu-main = <&ipmmu_mm>; 2051 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2052 #iommu-cells = <1>; 2053 }; 2054 2055 ipmmu_vi0: iommu@eee80000 { 2056 compatible = "renesas,ipmmu-r8a779g0", 2057 "renesas,rcar-gen4-ipmmu-vmsa"; 2058 reg = <0 0xeee80000 0 0x20000>; 2059 renesas,ipmmu-main = <&ipmmu_mm>; 2060 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2061 #iommu-cells = <1>; 2062 }; 2063 2064 ipmmu_vi1: iommu@eeec0000 { 2065 compatible = "renesas,ipmmu-r8a779g0", 2066 "renesas,rcar-gen4-ipmmu-vmsa"; 2067 reg = <0 0xeeec0000 0 0x20000>; 2068 renesas,ipmmu-main = <&ipmmu_mm>; 2069 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2070 #iommu-cells = <1>; 2071 }; 2072 2073 ipmmu_vip0: iommu@eef00000 { 2074 compatible = "renesas,ipmmu-r8a779g0", 2075 "renesas,rcar-gen4-ipmmu-vmsa"; 2076 reg = <0 0xeef00000 0 0x20000>; 2077 renesas,ipmmu-main = <&ipmmu_mm>; 2078 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2079 #iommu-cells = <1>; 2080 }; 2081 2082 ipmmu_vip1: iommu@eef40000 { 2083 compatible = "renesas,ipmmu-r8a779g0", 2084 "renesas,rcar-gen4-ipmmu-vmsa"; 2085 reg = <0 0xeef40000 0 0x20000>; 2086 renesas,ipmmu-main = <&ipmmu_mm>; 2087 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2088 #iommu-cells = <1>; 2089 }; 2090 2091 ipmmu_mm: iommu@eefc0000 { 2092 compatible = "renesas,ipmmu-r8a779g0", 2093 "renesas,rcar-gen4-ipmmu-vmsa"; 2094 reg = <0 0xeefc0000 0 0x20000>; 2095 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 2096 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 2097 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2098 #iommu-cells = <1>; 2099 }; 2100 2101 gic: interrupt-controller@f1000000 { 2102 compatible = "arm,gic-v3"; 2103 #interrupt-cells = <3>; 2104 #address-cells = <0>; 2105 interrupt-controller; 2106 reg = <0x0 0xf1000000 0 0x20000>, 2107 <0x0 0xf1060000 0 0x110000>; 2108 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2109 }; 2110 2111 csi40: csi2@fe500000 { 2112 compatible = "renesas,r8a779g0-csi2"; 2113 reg = <0 0xfe500000 0 0x40000>; 2114 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 2115 clocks = <&cpg CPG_MOD 331>; 2116 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2117 resets = <&cpg 331>; 2118 status = "disabled"; 2119 2120 ports { 2121 #address-cells = <1>; 2122 #size-cells = <0>; 2123 2124 port@0 { 2125 reg = <0>; 2126 }; 2127 2128 port@1 { 2129 reg = <1>; 2130 csi40isp0: endpoint { 2131 remote-endpoint = <&isp0csi40>; 2132 }; 2133 }; 2134 }; 2135 }; 2136 2137 csi41: csi2@fe540000 { 2138 compatible = "renesas,r8a779g0-csi2"; 2139 reg = <0 0xfe540000 0 0x40000>; 2140 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 2141 clocks = <&cpg CPG_MOD 400>; 2142 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2143 resets = <&cpg 400>; 2144 status = "disabled"; 2145 2146 ports { 2147 #address-cells = <1>; 2148 #size-cells = <0>; 2149 2150 port@0 { 2151 reg = <0>; 2152 }; 2153 2154 port@1 { 2155 reg = <1>; 2156 csi41isp1: endpoint { 2157 remote-endpoint = <&isp1csi41>; 2158 }; 2159 }; 2160 }; 2161 }; 2162 2163 fcpvd0: fcp@fea10000 { 2164 compatible = "renesas,fcpv"; 2165 reg = <0 0xfea10000 0 0x200>; 2166 clocks = <&cpg CPG_MOD 508>; 2167 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2168 resets = <&cpg 508>; 2169 iommus = <&ipmmu_vi1 6>; 2170 }; 2171 2172 fcpvd1: fcp@fea11000 { 2173 compatible = "renesas,fcpv"; 2174 reg = <0 0xfea11000 0 0x200>; 2175 clocks = <&cpg CPG_MOD 509>; 2176 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2177 resets = <&cpg 509>; 2178 iommus = <&ipmmu_vi1 7>; 2179 }; 2180 2181 fcpvx0: fcp@fedb0000 { 2182 compatible = "renesas,fcpv"; 2183 reg = <0 0xfedb0000 0 0x200>; 2184 clocks = <&cpg CPG_MOD 1100>; 2185 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2186 resets = <&cpg 1100>; 2187 iommus = <&ipmmu_vi1 24>; 2188 }; 2189 2190 fcpvx1: fcp@fedb8000 { 2191 compatible = "renesas,fcpv"; 2192 reg = <0 0xfedb8000 0 0x200>; 2193 clocks = <&cpg CPG_MOD 1101>; 2194 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2195 resets = <&cpg 1101>; 2196 iommus = <&ipmmu_vi1 25>; 2197 }; 2198 2199 vspd0: vsp@fea20000 { 2200 compatible = "renesas,vsp2"; 2201 reg = <0 0xfea20000 0 0x7000>; 2202 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2203 clocks = <&cpg CPG_MOD 830>; 2204 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2205 resets = <&cpg 830>; 2206 2207 renesas,fcp = <&fcpvd0>; 2208 }; 2209 2210 vspd1: vsp@fea28000 { 2211 compatible = "renesas,vsp2"; 2212 reg = <0 0xfea28000 0 0x7000>; 2213 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2214 clocks = <&cpg CPG_MOD 831>; 2215 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2216 resets = <&cpg 831>; 2217 2218 renesas,fcp = <&fcpvd1>; 2219 }; 2220 2221 vspx0: vsp@fedd0000 { 2222 compatible = "renesas,vsp2"; 2223 reg = <0 0xfedd0000 0 0x8000>; 2224 interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>; 2225 clocks = <&cpg CPG_MOD 1028>; 2226 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2227 resets = <&cpg 1028>; 2228 2229 renesas,fcp = <&fcpvx0>; 2230 }; 2231 2232 vspx1: vsp@fedd8000 { 2233 compatible = "renesas,vsp2"; 2234 reg = <0 0xfedd8000 0 0x8000>; 2235 interrupts = <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>; 2236 clocks = <&cpg CPG_MOD 1029>; 2237 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2238 resets = <&cpg 1029>; 2239 2240 renesas,fcp = <&fcpvx1>; 2241 }; 2242 2243 du: display@feb00000 { 2244 compatible = "renesas,du-r8a779g0"; 2245 reg = <0 0xfeb00000 0 0x40000>; 2246 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2247 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2248 clocks = <&cpg CPG_MOD 411>; 2249 clock-names = "du.0"; 2250 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2251 resets = <&cpg 411>; 2252 reset-names = "du.0"; 2253 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2254 2255 status = "disabled"; 2256 2257 ports { 2258 #address-cells = <1>; 2259 #size-cells = <0>; 2260 2261 port@0 { 2262 reg = <0>; 2263 du_out_dsi0: endpoint { 2264 remote-endpoint = <&dsi0_in>; 2265 }; 2266 }; 2267 2268 port@1 { 2269 reg = <1>; 2270 du_out_dsi1: endpoint { 2271 remote-endpoint = <&dsi1_in>; 2272 }; 2273 }; 2274 }; 2275 }; 2276 2277 isp0: isp@fed00000 { 2278 compatible = "renesas,r8a779g0-isp", 2279 "renesas,rcar-gen4-isp"; 2280 reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>; 2281 reg-names = "cs", "core"; 2282 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 2283 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; 2284 interrupt-names = "cs", "core"; 2285 clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>; 2286 clock-names = "cs", "core"; 2287 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2288 resets = <&cpg 612>, <&cpg 16>; 2289 reset-names = "cs", "core"; 2290 status = "disabled"; 2291 2292 renesas,vspx = <&vspx0>; 2293 2294 ports { 2295 #address-cells = <1>; 2296 #size-cells = <0>; 2297 2298 port@0 { 2299 #address-cells = <1>; 2300 #size-cells = <0>; 2301 2302 reg = <0>; 2303 2304 isp0csi40: endpoint@0 { 2305 reg = <0>; 2306 remote-endpoint = <&csi40isp0>; 2307 }; 2308 }; 2309 2310 port@1 { 2311 reg = <1>; 2312 isp0vin00: endpoint { 2313 remote-endpoint = <&vin00isp0>; 2314 }; 2315 }; 2316 2317 port@2 { 2318 reg = <2>; 2319 isp0vin01: endpoint { 2320 remote-endpoint = <&vin01isp0>; 2321 }; 2322 }; 2323 2324 port@3 { 2325 reg = <3>; 2326 isp0vin02: endpoint { 2327 remote-endpoint = <&vin02isp0>; 2328 }; 2329 }; 2330 2331 port@4 { 2332 reg = <4>; 2333 isp0vin03: endpoint { 2334 remote-endpoint = <&vin03isp0>; 2335 }; 2336 }; 2337 2338 port@5 { 2339 reg = <5>; 2340 isp0vin04: endpoint { 2341 remote-endpoint = <&vin04isp0>; 2342 }; 2343 }; 2344 2345 port@6 { 2346 reg = <6>; 2347 isp0vin05: endpoint { 2348 remote-endpoint = <&vin05isp0>; 2349 }; 2350 }; 2351 2352 port@7 { 2353 reg = <7>; 2354 isp0vin06: endpoint { 2355 remote-endpoint = <&vin06isp0>; 2356 }; 2357 }; 2358 2359 port@8 { 2360 reg = <8>; 2361 isp0vin07: endpoint { 2362 remote-endpoint = <&vin07isp0>; 2363 }; 2364 }; 2365 }; 2366 }; 2367 2368 isp1: isp@fed20000 { 2369 compatible = "renesas,r8a779g0-isp", 2370 "renesas,rcar-gen4-isp"; 2371 reg = <0 0xfed20000 0 0x10000>, <0 0xfee00000 0 0x100000>; 2372 reg-names = "cs", "core"; 2373 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 2374 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>; 2375 interrupt-names = "cs", "core"; 2376 clocks = <&cpg CPG_MOD 613>, <&cpg CPG_MOD 17>; 2377 clock-names = "cs", "core"; 2378 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2379 resets = <&cpg 613>, <&cpg 17>; 2380 reset-names = "cs", "core"; 2381 status = "disabled"; 2382 2383 renesas,vspx = <&vspx1>; 2384 2385 ports { 2386 #address-cells = <1>; 2387 #size-cells = <0>; 2388 2389 port@0 { 2390 #address-cells = <1>; 2391 #size-cells = <0>; 2392 2393 reg = <0>; 2394 2395 isp1csi41: endpoint@1 { 2396 reg = <1>; 2397 remote-endpoint = <&csi41isp1>; 2398 }; 2399 }; 2400 2401 port@1 { 2402 reg = <1>; 2403 isp1vin08: endpoint { 2404 remote-endpoint = <&vin08isp1>; 2405 }; 2406 }; 2407 2408 port@2 { 2409 reg = <2>; 2410 isp1vin09: endpoint { 2411 remote-endpoint = <&vin09isp1>; 2412 }; 2413 }; 2414 2415 port@3 { 2416 reg = <3>; 2417 isp1vin10: endpoint { 2418 remote-endpoint = <&vin10isp1>; 2419 }; 2420 }; 2421 2422 port@4 { 2423 reg = <4>; 2424 isp1vin11: endpoint { 2425 remote-endpoint = <&vin11isp1>; 2426 }; 2427 }; 2428 2429 port@5 { 2430 reg = <5>; 2431 isp1vin12: endpoint { 2432 remote-endpoint = <&vin12isp1>; 2433 }; 2434 }; 2435 2436 port@6 { 2437 reg = <6>; 2438 isp1vin13: endpoint { 2439 remote-endpoint = <&vin13isp1>; 2440 }; 2441 }; 2442 2443 port@7 { 2444 reg = <7>; 2445 isp1vin14: endpoint { 2446 remote-endpoint = <&vin14isp1>; 2447 }; 2448 }; 2449 2450 port@8 { 2451 reg = <8>; 2452 isp1vin15: endpoint { 2453 remote-endpoint = <&vin15isp1>; 2454 }; 2455 }; 2456 }; 2457 }; 2458 2459 dsi0: dsi-encoder@fed80000 { 2460 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2461 reg = <0 0xfed80000 0 0x10000>; 2462 clocks = <&cpg CPG_MOD 415>, 2463 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2464 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2465 clock-names = "fck", "dsi", "pll"; 2466 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2467 resets = <&cpg 415>; 2468 2469 status = "disabled"; 2470 2471 ports { 2472 #address-cells = <1>; 2473 #size-cells = <0>; 2474 2475 port@0 { 2476 reg = <0>; 2477 dsi0_in: endpoint { 2478 remote-endpoint = <&du_out_dsi0>; 2479 }; 2480 }; 2481 2482 port@1 { 2483 reg = <1>; 2484 }; 2485 }; 2486 }; 2487 2488 dsi1: dsi-encoder@fed90000 { 2489 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2490 reg = <0 0xfed90000 0 0x10000>; 2491 clocks = <&cpg CPG_MOD 416>, 2492 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2493 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2494 clock-names = "fck", "dsi", "pll"; 2495 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2496 resets = <&cpg 416>; 2497 2498 status = "disabled"; 2499 2500 ports { 2501 #address-cells = <1>; 2502 #size-cells = <0>; 2503 2504 port@0 { 2505 reg = <0>; 2506 dsi1_in: endpoint { 2507 remote-endpoint = <&du_out_dsi1>; 2508 }; 2509 }; 2510 2511 port@1 { 2512 reg = <1>; 2513 }; 2514 }; 2515 }; 2516 2517 prr: chipid@fff00044 { 2518 compatible = "renesas,prr"; 2519 reg = <0 0xfff00044 0 4>; 2520 bootph-all; 2521 }; 2522 }; 2523 2524 thermal-zones { 2525 sensor_thermal_cr52: sensor1-thermal { 2526 polling-delay-passive = <250>; 2527 polling-delay = <1000>; 2528 thermal-sensors = <&tsc 0>; 2529 2530 trips { 2531 sensor1_crit: sensor1-crit { 2532 temperature = <120000>; 2533 hysteresis = <1000>; 2534 type = "critical"; 2535 }; 2536 }; 2537 }; 2538 2539 sensor_thermal_cnn: sensor2-thermal { 2540 polling-delay-passive = <250>; 2541 polling-delay = <1000>; 2542 thermal-sensors = <&tsc 1>; 2543 2544 trips { 2545 sensor2_crit: sensor2-crit { 2546 temperature = <120000>; 2547 hysteresis = <1000>; 2548 type = "critical"; 2549 }; 2550 }; 2551 }; 2552 2553 sensor_thermal_ca76: sensor3-thermal { 2554 polling-delay-passive = <250>; 2555 polling-delay = <1000>; 2556 thermal-sensors = <&tsc 2>; 2557 2558 trips { 2559 sensor3_crit: sensor3-crit { 2560 temperature = <120000>; 2561 hysteresis = <1000>; 2562 type = "critical"; 2563 }; 2564 }; 2565 }; 2566 2567 sensor_thermal_ddr1: sensor4-thermal { 2568 polling-delay-passive = <250>; 2569 polling-delay = <1000>; 2570 thermal-sensors = <&tsc 3>; 2571 2572 trips { 2573 sensor4_crit: sensor4-crit { 2574 temperature = <120000>; 2575 hysteresis = <1000>; 2576 type = "critical"; 2577 }; 2578 }; 2579 }; 2580 }; 2581 2582 timer { 2583 compatible = "arm,armv8-timer"; 2584 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2585 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2586 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2587 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2588 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2589 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2590 "hyp-virt"; 2591 }; 2592}; 2593