1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Spider Ethernet sub-board 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8/ { 9 aliases { 10 ethernet0 = &rswitch_port0; 11 ethernet1 = &rswitch_port1; 12 ethernet2 = &rswitch_port2; 13 }; 14}; 15 16ð_serdes { 17 status = "okay"; 18}; 19 20&i2c4 { 21 eeprom@52 { 22 compatible = "rohm,br24g01", "atmel,24c01"; 23 label = "ethernet-sub-board"; 24 reg = <0x52>; 25 pagesize = <8>; 26 }; 27}; 28 29&pfc { 30 tsn0_pins: tsn0 { 31 groups = "tsn0_mdio_b", "tsn0_link_b"; 32 function = "tsn0"; 33 power-source = <1800>; 34 }; 35 36 tsn1_pins: tsn1 { 37 groups = "tsn1_mdio_b", "tsn1_link_b"; 38 function = "tsn1"; 39 power-source = <1800>; 40 }; 41 42 tsn2_pins: tsn2 { 43 groups = "tsn2_mdio_b", "tsn2_link_b"; 44 function = "tsn2"; 45 power-source = <1800>; 46 }; 47}; 48 49&rswitch { 50 pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>, <&tsn2_pins>; 51 pinctrl-names = "default"; 52 status = "okay"; 53}; 54 55&rswitch_port0 { 56 reg = <0>; 57 phy-handle = <&u101>; 58 phy-mode = "sgmii"; 59 phys = <ð_serdes 0>; 60 status = "okay"; 61 62 mdio { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 66 u101: ethernet-phy@1 { 67 reg = <1>; 68 compatible = "ethernet-phy-ieee802.3-c45"; 69 interrupts-extended = <&gpio3 10 IRQ_TYPE_LEVEL_LOW>; 70 }; 71 }; 72}; 73 74&rswitch_port1 { 75 reg = <1>; 76 phy-handle = <&u201>; 77 phy-mode = "sgmii"; 78 phys = <ð_serdes 1>; 79 status = "okay"; 80 81 mdio { 82 #address-cells = <1>; 83 #size-cells = <0>; 84 85 u201: ethernet-phy@2 { 86 reg = <2>; 87 compatible = "ethernet-phy-ieee802.3-c45"; 88 interrupts-extended = <&gpio3 11 IRQ_TYPE_LEVEL_LOW>; 89 }; 90 }; 91}; 92 93&rswitch_port2 { 94 reg = <2>; 95 phy-handle = <&u301>; 96 phy-mode = "sgmii"; 97 phys = <ð_serdes 2>; 98 status = "okay"; 99 100 mdio { 101 #address-cells = <1>; 102 #size-cells = <0>; 103 104 u301: ethernet-phy@3 { 105 reg = <3>; 106 compatible = "ethernet-phy-ieee802.3-c45"; 107 interrupts-extended = <&gpio3 9 IRQ_TYPE_LEVEL_LOW>; 108 }; 109 }; 110}; 111