1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock - to be overridden by boards that provide it */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 cluster1_opp: opp-table-1 { 49 compatible = "operating-points-v2"; 50 opp-shared; 51 52 opp-800000000 { 53 opp-hz = /bits/ 64 <800000000>; 54 opp-microvolt = <1030000>; 55 clock-latency-ns = <300000>; 56 }; 57 opp-1000000000 { 58 opp-hz = /bits/ 64 <1000000000>; 59 opp-microvolt = <1030000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1200000000 { 63 opp-hz = /bits/ 64 <1200000000>; 64 opp-microvolt = <1030000>; 65 clock-latency-ns = <300000>; 66 opp-suspend; 67 }; 68 }; 69 70 cpus { 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 a53_0: cpu@0 { 75 compatible = "arm,cortex-a53"; 76 reg = <0>; 77 device_type = "cpu"; 78 #cooling-cells = <2>; 79 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 80 next-level-cache = <&L2_CA53>; 81 enable-method = "psci"; 82 cpu-idle-states = <&CPU_SLEEP_0>; 83 dynamic-power-coefficient = <277>; 84 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; 85 operating-points-v2 = <&cluster1_opp>; 86 }; 87 88 a53_1: cpu@1 { 89 compatible = "arm,cortex-a53"; 90 reg = <1>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 93 next-level-cache = <&L2_CA53>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; 97 operating-points-v2 = <&cluster1_opp>; 98 }; 99 100 L2_CA53: cache-controller-0 { 101 compatible = "cache"; 102 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 103 cache-unified; 104 cache-level = <2>; 105 }; 106 107 idle-states { 108 entry-method = "psci"; 109 110 CPU_SLEEP_0: cpu-sleep-0 { 111 compatible = "arm,idle-state"; 112 arm,psci-suspend-param = <0x0010000>; 113 local-timer-stop; 114 entry-latency-us = <700>; 115 exit-latency-us = <700>; 116 min-residency-us = <5000>; 117 }; 118 }; 119 }; 120 121 extal_clk: extal { 122 compatible = "fixed-clock"; 123 #clock-cells = <0>; 124 /* This value must be overridden by the board */ 125 clock-frequency = <0>; 126 bootph-all; 127 }; 128 129 /* External PCIe clock - can be overridden by the board */ 130 pcie_bus_clk: pcie_bus { 131 compatible = "fixed-clock"; 132 #clock-cells = <0>; 133 clock-frequency = <0>; 134 }; 135 136 pmu_a53 { 137 compatible = "arm,cortex-a53-pmu"; 138 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 139 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 140 interrupt-affinity = <&a53_0>, <&a53_1>; 141 }; 142 143 psci { 144 compatible = "arm,psci-1.0", "arm,psci-0.2"; 145 method = "smc"; 146 }; 147 148 /* External SCIF clock - to be overridden by boards that provide it */ 149 scif_clk: scif { 150 compatible = "fixed-clock"; 151 #clock-cells = <0>; 152 clock-frequency = <0>; 153 }; 154 155 soc: soc { 156 compatible = "simple-bus"; 157 bootph-all; 158 159 #address-cells = <2>; 160 #size-cells = <2>; 161 ranges; 162 163 rwdt: watchdog@e6020000 { 164 compatible = "renesas,r8a77990-wdt", 165 "renesas,rcar-gen3-wdt"; 166 reg = <0 0xe6020000 0 0x0c>; 167 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 168 clocks = <&cpg CPG_MOD 402>; 169 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 170 resets = <&cpg 402>; 171 status = "disabled"; 172 }; 173 174 swdt: watchdog@e6030000 { 175 compatible = "renesas,r8a77990-wdt", "renesas,rcar-gen3-wdt"; 176 reg = <0 0xe6030000 0 0x0c>; 177 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 178 clocks = <&cpg CPG_CORE R8A77990_CLK_OSC>; 179 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 180 resets = <&cpg 401>; 181 status = "disabled"; 182 }; 183 184 gpio0: gpio@e6050000 { 185 compatible = "renesas,gpio-r8a77990", 186 "renesas,rcar-gen3-gpio"; 187 reg = <0 0xe6050000 0 0x50>; 188 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 189 #gpio-cells = <2>; 190 gpio-controller; 191 gpio-ranges = <&pfc 0 0 18>; 192 #interrupt-cells = <2>; 193 interrupt-controller; 194 clocks = <&cpg CPG_MOD 912>; 195 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 196 resets = <&cpg 912>; 197 }; 198 199 gpio1: gpio@e6051000 { 200 compatible = "renesas,gpio-r8a77990", 201 "renesas,rcar-gen3-gpio"; 202 reg = <0 0xe6051000 0 0x50>; 203 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 204 #gpio-cells = <2>; 205 gpio-controller; 206 gpio-ranges = <&pfc 0 32 23>; 207 #interrupt-cells = <2>; 208 interrupt-controller; 209 clocks = <&cpg CPG_MOD 911>; 210 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 211 resets = <&cpg 911>; 212 }; 213 214 gpio2: gpio@e6052000 { 215 compatible = "renesas,gpio-r8a77990", 216 "renesas,rcar-gen3-gpio"; 217 reg = <0 0xe6052000 0 0x50>; 218 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 64 26>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 910>; 225 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 226 resets = <&cpg 910>; 227 }; 228 229 gpio3: gpio@e6053000 { 230 compatible = "renesas,gpio-r8a77990", 231 "renesas,rcar-gen3-gpio"; 232 reg = <0 0xe6053000 0 0x50>; 233 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 234 #gpio-cells = <2>; 235 gpio-controller; 236 gpio-ranges = <&pfc 0 96 16>; 237 #interrupt-cells = <2>; 238 interrupt-controller; 239 clocks = <&cpg CPG_MOD 909>; 240 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 241 resets = <&cpg 909>; 242 }; 243 244 gpio4: gpio@e6054000 { 245 compatible = "renesas,gpio-r8a77990", 246 "renesas,rcar-gen3-gpio"; 247 reg = <0 0xe6054000 0 0x50>; 248 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 249 #gpio-cells = <2>; 250 gpio-controller; 251 gpio-ranges = <&pfc 0 128 11>; 252 #interrupt-cells = <2>; 253 interrupt-controller; 254 clocks = <&cpg CPG_MOD 908>; 255 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 256 resets = <&cpg 908>; 257 }; 258 259 gpio5: gpio@e6055000 { 260 compatible = "renesas,gpio-r8a77990", 261 "renesas,rcar-gen3-gpio"; 262 reg = <0 0xe6055000 0 0x50>; 263 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 264 #gpio-cells = <2>; 265 gpio-controller; 266 gpio-ranges = <&pfc 0 160 20>; 267 #interrupt-cells = <2>; 268 interrupt-controller; 269 clocks = <&cpg CPG_MOD 907>; 270 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 271 resets = <&cpg 907>; 272 }; 273 274 gpio6: gpio@e6055400 { 275 compatible = "renesas,gpio-r8a77990", 276 "renesas,rcar-gen3-gpio"; 277 reg = <0 0xe6055400 0 0x50>; 278 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 279 #gpio-cells = <2>; 280 gpio-controller; 281 gpio-ranges = <&pfc 0 192 18>; 282 #interrupt-cells = <2>; 283 interrupt-controller; 284 clocks = <&cpg CPG_MOD 906>; 285 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 286 resets = <&cpg 906>; 287 }; 288 289 pfc: pinctrl@e6060000 { 290 compatible = "renesas,pfc-r8a77990"; 291 reg = <0 0xe6060000 0 0x508>; 292 bootph-all; 293 }; 294 295 i2c_dvfs: i2c@e60b0000 { 296 #address-cells = <1>; 297 #size-cells = <0>; 298 compatible = "renesas,iic-r8a77990", 299 "renesas,rcar-gen3-iic", 300 "renesas,rmobile-iic"; 301 reg = <0 0xe60b0000 0 0x425>; 302 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 303 clocks = <&cpg CPG_MOD 926>; 304 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 305 resets = <&cpg 926>; 306 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 307 dma-names = "tx", "rx"; 308 status = "disabled"; 309 }; 310 311 cmt0: timer@e60f0000 { 312 compatible = "renesas,r8a77990-cmt0", 313 "renesas,rcar-gen3-cmt0"; 314 reg = <0 0xe60f0000 0 0x1004>; 315 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 317 clocks = <&cpg CPG_MOD 303>; 318 clock-names = "fck"; 319 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 320 resets = <&cpg 303>; 321 status = "disabled"; 322 }; 323 324 cmt1: timer@e6130000 { 325 compatible = "renesas,r8a77990-cmt1", 326 "renesas,rcar-gen3-cmt1"; 327 reg = <0 0xe6130000 0 0x1004>; 328 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 336 clocks = <&cpg CPG_MOD 302>; 337 clock-names = "fck"; 338 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 339 resets = <&cpg 302>; 340 status = "disabled"; 341 }; 342 343 cmt2: timer@e6140000 { 344 compatible = "renesas,r8a77990-cmt1", 345 "renesas,rcar-gen3-cmt1"; 346 reg = <0 0xe6140000 0 0x1004>; 347 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 355 clocks = <&cpg CPG_MOD 301>; 356 clock-names = "fck"; 357 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 358 resets = <&cpg 301>; 359 status = "disabled"; 360 }; 361 362 cmt3: timer@e6148000 { 363 compatible = "renesas,r8a77990-cmt1", 364 "renesas,rcar-gen3-cmt1"; 365 reg = <0 0xe6148000 0 0x1004>; 366 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 372 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 373 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 374 clocks = <&cpg CPG_MOD 300>; 375 clock-names = "fck"; 376 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 377 resets = <&cpg 300>; 378 status = "disabled"; 379 }; 380 381 cpg: clock-controller@e6150000 { 382 compatible = "renesas,r8a77990-cpg-mssr"; 383 reg = <0 0xe6150000 0 0x1000>; 384 clocks = <&extal_clk>; 385 clock-names = "extal"; 386 #clock-cells = <2>; 387 #power-domain-cells = <0>; 388 #reset-cells = <1>; 389 bootph-all; 390 }; 391 392 rst: reset-controller@e6160000 { 393 compatible = "renesas,r8a77990-rst"; 394 reg = <0 0xe6160000 0 0x0200>; 395 bootph-all; 396 }; 397 398 sysc: system-controller@e6180000 { 399 compatible = "renesas,r8a77990-sysc"; 400 reg = <0 0xe6180000 0 0x0400>; 401 #power-domain-cells = <1>; 402 }; 403 404 thermal: thermal@e6190000 { 405 compatible = "renesas,thermal-r8a77990"; 406 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 407 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 409 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 410 clocks = <&cpg CPG_MOD 522>; 411 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 412 resets = <&cpg 522>; 413 #thermal-sensor-cells = <0>; 414 }; 415 416 intc_ex: interrupt-controller@e61c0000 { 417 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 418 #interrupt-cells = <2>; 419 interrupt-controller; 420 reg = <0 0xe61c0000 0 0x200>; 421 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 422 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 423 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 425 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 426 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 427 clocks = <&cpg CPG_MOD 407>; 428 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 429 resets = <&cpg 407>; 430 }; 431 432 tmu0: timer@e61e0000 { 433 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 434 reg = <0 0xe61e0000 0 0x30>; 435 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 438 interrupt-names = "tuni0", "tuni1", "tuni2"; 439 clocks = <&cpg CPG_MOD 125>; 440 clock-names = "fck"; 441 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 442 resets = <&cpg 125>; 443 status = "disabled"; 444 }; 445 446 tmu1: timer@e6fc0000 { 447 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 448 reg = <0 0xe6fc0000 0 0x30>; 449 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 453 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 454 clocks = <&cpg CPG_MOD 124>; 455 clock-names = "fck"; 456 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 457 resets = <&cpg 124>; 458 status = "disabled"; 459 }; 460 461 tmu2: timer@e6fd0000 { 462 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 463 reg = <0 0xe6fd0000 0 0x30>; 464 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 468 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 469 clocks = <&cpg CPG_MOD 123>; 470 clock-names = "fck"; 471 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 472 resets = <&cpg 123>; 473 status = "disabled"; 474 }; 475 476 tmu3: timer@e6fe0000 { 477 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 478 reg = <0 0xe6fe0000 0 0x30>; 479 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 482 interrupt-names = "tuni0", "tuni1", "tuni2"; 483 clocks = <&cpg CPG_MOD 122>; 484 clock-names = "fck"; 485 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 486 resets = <&cpg 122>; 487 status = "disabled"; 488 }; 489 490 tmu4: timer@ffc00000 { 491 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 492 reg = <0 0xffc00000 0 0x30>; 493 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 496 interrupt-names = "tuni0", "tuni1", "tuni2"; 497 clocks = <&cpg CPG_MOD 121>; 498 clock-names = "fck"; 499 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 500 resets = <&cpg 121>; 501 status = "disabled"; 502 }; 503 504 i2c0: i2c@e6500000 { 505 #address-cells = <1>; 506 #size-cells = <0>; 507 compatible = "renesas,i2c-r8a77990", 508 "renesas,rcar-gen3-i2c"; 509 reg = <0 0xe6500000 0 0x40>; 510 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 931>; 512 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 513 resets = <&cpg 931>; 514 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 515 <&dmac2 0x91>, <&dmac2 0x90>; 516 dma-names = "tx", "rx", "tx", "rx"; 517 i2c-scl-internal-delay-ns = <110>; 518 status = "disabled"; 519 }; 520 521 i2c1: i2c@e6508000 { 522 #address-cells = <1>; 523 #size-cells = <0>; 524 compatible = "renesas,i2c-r8a77990", 525 "renesas,rcar-gen3-i2c"; 526 reg = <0 0xe6508000 0 0x40>; 527 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 528 clocks = <&cpg CPG_MOD 930>; 529 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 530 resets = <&cpg 930>; 531 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 532 <&dmac2 0x93>, <&dmac2 0x92>; 533 dma-names = "tx", "rx", "tx", "rx"; 534 i2c-scl-internal-delay-ns = <6>; 535 status = "disabled"; 536 }; 537 538 i2c2: i2c@e6510000 { 539 #address-cells = <1>; 540 #size-cells = <0>; 541 compatible = "renesas,i2c-r8a77990", 542 "renesas,rcar-gen3-i2c"; 543 reg = <0 0xe6510000 0 0x40>; 544 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 545 clocks = <&cpg CPG_MOD 929>; 546 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 547 resets = <&cpg 929>; 548 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 549 <&dmac2 0x95>, <&dmac2 0x94>; 550 dma-names = "tx", "rx", "tx", "rx"; 551 i2c-scl-internal-delay-ns = <6>; 552 status = "disabled"; 553 }; 554 555 i2c3: i2c@e66d0000 { 556 #address-cells = <1>; 557 #size-cells = <0>; 558 compatible = "renesas,i2c-r8a77990", 559 "renesas,rcar-gen3-i2c"; 560 reg = <0 0xe66d0000 0 0x40>; 561 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 928>; 563 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 564 resets = <&cpg 928>; 565 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 566 dma-names = "tx", "rx"; 567 i2c-scl-internal-delay-ns = <110>; 568 status = "disabled"; 569 }; 570 571 i2c4: i2c@e66d8000 { 572 #address-cells = <1>; 573 #size-cells = <0>; 574 compatible = "renesas,i2c-r8a77990", 575 "renesas,rcar-gen3-i2c"; 576 reg = <0 0xe66d8000 0 0x40>; 577 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 578 clocks = <&cpg CPG_MOD 927>; 579 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 580 resets = <&cpg 927>; 581 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 582 dma-names = "tx", "rx"; 583 i2c-scl-internal-delay-ns = <6>; 584 status = "disabled"; 585 }; 586 587 i2c5: i2c@e66e0000 { 588 #address-cells = <1>; 589 #size-cells = <0>; 590 compatible = "renesas,i2c-r8a77990", 591 "renesas,rcar-gen3-i2c"; 592 reg = <0 0xe66e0000 0 0x40>; 593 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 919>; 595 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 596 resets = <&cpg 919>; 597 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 598 dma-names = "tx", "rx"; 599 i2c-scl-internal-delay-ns = <6>; 600 status = "disabled"; 601 }; 602 603 i2c6: i2c@e66e8000 { 604 #address-cells = <1>; 605 #size-cells = <0>; 606 compatible = "renesas,i2c-r8a77990", 607 "renesas,rcar-gen3-i2c"; 608 reg = <0 0xe66e8000 0 0x40>; 609 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 610 clocks = <&cpg CPG_MOD 918>; 611 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 612 resets = <&cpg 918>; 613 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 614 dma-names = "tx", "rx"; 615 i2c-scl-internal-delay-ns = <6>; 616 status = "disabled"; 617 }; 618 619 i2c7: i2c@e6690000 { 620 #address-cells = <1>; 621 #size-cells = <0>; 622 compatible = "renesas,i2c-r8a77990", 623 "renesas,rcar-gen3-i2c"; 624 reg = <0 0xe6690000 0 0x40>; 625 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 1003>; 627 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 628 resets = <&cpg 1003>; 629 i2c-scl-internal-delay-ns = <6>; 630 status = "disabled"; 631 }; 632 633 hscif0: serial@e6540000 { 634 compatible = "renesas,hscif-r8a77990", 635 "renesas,rcar-gen3-hscif", 636 "renesas,hscif"; 637 reg = <0 0xe6540000 0 0x60>; 638 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 639 clocks = <&cpg CPG_MOD 520>, 640 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 641 <&scif_clk>; 642 clock-names = "fck", "brg_int", "scif_clk"; 643 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 644 <&dmac2 0x31>, <&dmac2 0x30>; 645 dma-names = "tx", "rx", "tx", "rx"; 646 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 647 resets = <&cpg 520>; 648 status = "disabled"; 649 }; 650 651 hscif1: serial@e6550000 { 652 compatible = "renesas,hscif-r8a77990", 653 "renesas,rcar-gen3-hscif", 654 "renesas,hscif"; 655 reg = <0 0xe6550000 0 0x60>; 656 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 657 clocks = <&cpg CPG_MOD 519>, 658 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 659 <&scif_clk>; 660 clock-names = "fck", "brg_int", "scif_clk"; 661 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 662 <&dmac2 0x33>, <&dmac2 0x32>; 663 dma-names = "tx", "rx", "tx", "rx"; 664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 665 resets = <&cpg 519>; 666 status = "disabled"; 667 }; 668 669 hscif2: serial@e6560000 { 670 compatible = "renesas,hscif-r8a77990", 671 "renesas,rcar-gen3-hscif", 672 "renesas,hscif"; 673 reg = <0 0xe6560000 0 0x60>; 674 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 675 clocks = <&cpg CPG_MOD 518>, 676 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 677 <&scif_clk>; 678 clock-names = "fck", "brg_int", "scif_clk"; 679 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 680 <&dmac2 0x35>, <&dmac2 0x34>; 681 dma-names = "tx", "rx", "tx", "rx"; 682 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 683 resets = <&cpg 518>; 684 status = "disabled"; 685 }; 686 687 hscif3: serial@e66a0000 { 688 compatible = "renesas,hscif-r8a77990", 689 "renesas,rcar-gen3-hscif", 690 "renesas,hscif"; 691 reg = <0 0xe66a0000 0 0x60>; 692 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 693 clocks = <&cpg CPG_MOD 517>, 694 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 695 <&scif_clk>; 696 clock-names = "fck", "brg_int", "scif_clk"; 697 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 698 dma-names = "tx", "rx"; 699 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 700 resets = <&cpg 517>; 701 status = "disabled"; 702 }; 703 704 hscif4: serial@e66b0000 { 705 compatible = "renesas,hscif-r8a77990", 706 "renesas,rcar-gen3-hscif", 707 "renesas,hscif"; 708 reg = <0 0xe66b0000 0 0x60>; 709 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 710 clocks = <&cpg CPG_MOD 516>, 711 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 712 <&scif_clk>; 713 clock-names = "fck", "brg_int", "scif_clk"; 714 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 715 dma-names = "tx", "rx"; 716 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 717 resets = <&cpg 516>; 718 status = "disabled"; 719 }; 720 721 hsusb: usb@e6590000 { 722 compatible = "renesas,usbhs-r8a77990", 723 "renesas,rcar-gen3-usbhs"; 724 reg = <0 0xe6590000 0 0x200>; 725 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 726 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 727 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 728 <&usb_dmac1 0>, <&usb_dmac1 1>; 729 dma-names = "ch0", "ch1", "ch2", "ch3"; 730 renesas,buswait = <11>; 731 phys = <&usb2_phy0 3>; 732 phy-names = "usb"; 733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 734 resets = <&cpg 704>, <&cpg 703>; 735 status = "disabled"; 736 }; 737 738 usb_dmac0: dma-controller@e65a0000 { 739 compatible = "renesas,r8a77990-usb-dmac", 740 "renesas,usb-dmac"; 741 reg = <0 0xe65a0000 0 0x100>; 742 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 744 interrupt-names = "ch0", "ch1"; 745 clocks = <&cpg CPG_MOD 330>; 746 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 747 resets = <&cpg 330>; 748 #dma-cells = <1>; 749 dma-channels = <2>; 750 }; 751 752 usb_dmac1: dma-controller@e65b0000 { 753 compatible = "renesas,r8a77990-usb-dmac", 754 "renesas,usb-dmac"; 755 reg = <0 0xe65b0000 0 0x100>; 756 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 758 interrupt-names = "ch0", "ch1"; 759 clocks = <&cpg CPG_MOD 331>; 760 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 761 resets = <&cpg 331>; 762 #dma-cells = <1>; 763 dma-channels = <2>; 764 }; 765 766 arm_cc630p: crypto@e6601000 { 767 compatible = "arm,cryptocell-630p-ree"; 768 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 769 reg = <0x0 0xe6601000 0 0x1000>; 770 clocks = <&cpg CPG_MOD 229>; 771 resets = <&cpg 229>; 772 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 773 }; 774 775 dmac0: dma-controller@e6700000 { 776 compatible = "renesas,dmac-r8a77990", 777 "renesas,rcar-dmac"; 778 reg = <0 0xe6700000 0 0x10000>; 779 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 796 interrupt-names = "error", 797 "ch0", "ch1", "ch2", "ch3", 798 "ch4", "ch5", "ch6", "ch7", 799 "ch8", "ch9", "ch10", "ch11", 800 "ch12", "ch13", "ch14", "ch15"; 801 clocks = <&cpg CPG_MOD 219>; 802 clock-names = "fck"; 803 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 804 resets = <&cpg 219>; 805 #dma-cells = <1>; 806 dma-channels = <16>; 807 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 808 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 809 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 810 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 811 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 812 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 813 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 814 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 815 }; 816 817 dmac1: dma-controller@e7300000 { 818 compatible = "renesas,dmac-r8a77990", 819 "renesas,rcar-dmac"; 820 reg = <0 0xe7300000 0 0x10000>; 821 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 838 interrupt-names = "error", 839 "ch0", "ch1", "ch2", "ch3", 840 "ch4", "ch5", "ch6", "ch7", 841 "ch8", "ch9", "ch10", "ch11", 842 "ch12", "ch13", "ch14", "ch15"; 843 clocks = <&cpg CPG_MOD 218>; 844 clock-names = "fck"; 845 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 846 resets = <&cpg 218>; 847 #dma-cells = <1>; 848 dma-channels = <16>; 849 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 850 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 851 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 852 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 853 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 854 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 855 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 856 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 857 }; 858 859 dmac2: dma-controller@e7310000 { 860 compatible = "renesas,dmac-r8a77990", 861 "renesas,rcar-dmac"; 862 reg = <0 0xe7310000 0 0x10000>; 863 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 880 interrupt-names = "error", 881 "ch0", "ch1", "ch2", "ch3", 882 "ch4", "ch5", "ch6", "ch7", 883 "ch8", "ch9", "ch10", "ch11", 884 "ch12", "ch13", "ch14", "ch15"; 885 clocks = <&cpg CPG_MOD 217>; 886 clock-names = "fck"; 887 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 888 resets = <&cpg 217>; 889 #dma-cells = <1>; 890 dma-channels = <16>; 891 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 892 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 893 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 894 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 895 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 896 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 897 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 898 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 899 }; 900 901 ipmmu_ds0: iommu@e6740000 { 902 compatible = "renesas,ipmmu-r8a77990"; 903 reg = <0 0xe6740000 0 0x1000>; 904 renesas,ipmmu-main = <&ipmmu_mm 0>; 905 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 906 #iommu-cells = <1>; 907 }; 908 909 ipmmu_ds1: iommu@e7740000 { 910 compatible = "renesas,ipmmu-r8a77990"; 911 reg = <0 0xe7740000 0 0x1000>; 912 renesas,ipmmu-main = <&ipmmu_mm 1>; 913 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 914 #iommu-cells = <1>; 915 }; 916 917 ipmmu_hc: iommu@e6570000 { 918 compatible = "renesas,ipmmu-r8a77990"; 919 reg = <0 0xe6570000 0 0x1000>; 920 renesas,ipmmu-main = <&ipmmu_mm 2>; 921 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 922 #iommu-cells = <1>; 923 }; 924 925 ipmmu_mm: iommu@e67b0000 { 926 compatible = "renesas,ipmmu-r8a77990"; 927 reg = <0 0xe67b0000 0 0x1000>; 928 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 930 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 931 #iommu-cells = <1>; 932 }; 933 934 ipmmu_mp: iommu@ec670000 { 935 compatible = "renesas,ipmmu-r8a77990"; 936 reg = <0 0xec670000 0 0x1000>; 937 renesas,ipmmu-main = <&ipmmu_mm 4>; 938 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 939 #iommu-cells = <1>; 940 }; 941 942 ipmmu_pv0: iommu@fd800000 { 943 compatible = "renesas,ipmmu-r8a77990"; 944 reg = <0 0xfd800000 0 0x1000>; 945 renesas,ipmmu-main = <&ipmmu_mm 6>; 946 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 947 #iommu-cells = <1>; 948 }; 949 950 ipmmu_rt: iommu@ffc80000 { 951 compatible = "renesas,ipmmu-r8a77990"; 952 reg = <0 0xffc80000 0 0x1000>; 953 renesas,ipmmu-main = <&ipmmu_mm 10>; 954 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 955 #iommu-cells = <1>; 956 }; 957 958 ipmmu_vc0: iommu@fe6b0000 { 959 compatible = "renesas,ipmmu-r8a77990"; 960 reg = <0 0xfe6b0000 0 0x1000>; 961 renesas,ipmmu-main = <&ipmmu_mm 12>; 962 power-domains = <&sysc R8A77990_PD_A3VC>; 963 #iommu-cells = <1>; 964 }; 965 966 ipmmu_vi0: iommu@febd0000 { 967 compatible = "renesas,ipmmu-r8a77990"; 968 reg = <0 0xfebd0000 0 0x1000>; 969 renesas,ipmmu-main = <&ipmmu_mm 14>; 970 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 971 #iommu-cells = <1>; 972 }; 973 974 ipmmu_vp0: iommu@fe990000 { 975 compatible = "renesas,ipmmu-r8a77990"; 976 reg = <0 0xfe990000 0 0x1000>; 977 renesas,ipmmu-main = <&ipmmu_mm 16>; 978 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 979 #iommu-cells = <1>; 980 }; 981 982 avb: ethernet@e6800000 { 983 compatible = "renesas,etheravb-r8a77990", 984 "renesas,etheravb-rcar-gen3"; 985 reg = <0 0xe6800000 0 0x800>; 986 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1005 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1006 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1009 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1010 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1011 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1012 "ch4", "ch5", "ch6", "ch7", 1013 "ch8", "ch9", "ch10", "ch11", 1014 "ch12", "ch13", "ch14", "ch15", 1015 "ch16", "ch17", "ch18", "ch19", 1016 "ch20", "ch21", "ch22", "ch23", 1017 "ch24"; 1018 clocks = <&cpg CPG_MOD 812>; 1019 clock-names = "fck"; 1020 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1021 resets = <&cpg 812>; 1022 phy-mode = "rgmii"; 1023 rx-internal-delay-ps = <0>; 1024 iommus = <&ipmmu_ds0 16>; 1025 #address-cells = <1>; 1026 #size-cells = <0>; 1027 status = "disabled"; 1028 }; 1029 1030 can0: can@e6c30000 { 1031 compatible = "renesas,can-r8a77990", 1032 "renesas,rcar-gen3-can"; 1033 reg = <0 0xe6c30000 0 0x1000>; 1034 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1035 clocks = <&cpg CPG_MOD 916>, 1036 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1037 <&can_clk>; 1038 clock-names = "clkp1", "clkp2", "can_clk"; 1039 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1040 assigned-clock-rates = <40000000>; 1041 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1042 resets = <&cpg 916>; 1043 status = "disabled"; 1044 }; 1045 1046 can1: can@e6c38000 { 1047 compatible = "renesas,can-r8a77990", 1048 "renesas,rcar-gen3-can"; 1049 reg = <0 0xe6c38000 0 0x1000>; 1050 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1051 clocks = <&cpg CPG_MOD 915>, 1052 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1053 <&can_clk>; 1054 clock-names = "clkp1", "clkp2", "can_clk"; 1055 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1056 assigned-clock-rates = <40000000>; 1057 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1058 resets = <&cpg 915>; 1059 status = "disabled"; 1060 }; 1061 1062 canfd: can@e66c0000 { 1063 compatible = "renesas,r8a77990-canfd", 1064 "renesas,rcar-gen3-canfd"; 1065 reg = <0 0xe66c0000 0 0x8000>; 1066 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1067 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1068 interrupt-names = "ch_int", "g_int"; 1069 clocks = <&cpg CPG_MOD 914>, 1070 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1071 <&can_clk>; 1072 clock-names = "fck", "canfd", "can_clk"; 1073 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1074 assigned-clock-rates = <80000000>; 1075 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1076 resets = <&cpg 914>; 1077 status = "disabled"; 1078 1079 channel0 { 1080 status = "disabled"; 1081 }; 1082 1083 channel1 { 1084 status = "disabled"; 1085 }; 1086 }; 1087 1088 pwm0: pwm@e6e30000 { 1089 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1090 reg = <0 0xe6e30000 0 0x8>; 1091 clocks = <&cpg CPG_MOD 523>; 1092 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1093 resets = <&cpg 523>; 1094 #pwm-cells = <2>; 1095 status = "disabled"; 1096 }; 1097 1098 pwm1: pwm@e6e31000 { 1099 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1100 reg = <0 0xe6e31000 0 0x8>; 1101 clocks = <&cpg CPG_MOD 523>; 1102 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1103 resets = <&cpg 523>; 1104 #pwm-cells = <2>; 1105 status = "disabled"; 1106 }; 1107 1108 pwm2: pwm@e6e32000 { 1109 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1110 reg = <0 0xe6e32000 0 0x8>; 1111 clocks = <&cpg CPG_MOD 523>; 1112 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1113 resets = <&cpg 523>; 1114 #pwm-cells = <2>; 1115 status = "disabled"; 1116 }; 1117 1118 pwm3: pwm@e6e33000 { 1119 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1120 reg = <0 0xe6e33000 0 0x8>; 1121 clocks = <&cpg CPG_MOD 523>; 1122 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1123 resets = <&cpg 523>; 1124 #pwm-cells = <2>; 1125 status = "disabled"; 1126 }; 1127 1128 pwm4: pwm@e6e34000 { 1129 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1130 reg = <0 0xe6e34000 0 0x8>; 1131 clocks = <&cpg CPG_MOD 523>; 1132 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1133 resets = <&cpg 523>; 1134 #pwm-cells = <2>; 1135 status = "disabled"; 1136 }; 1137 1138 pwm5: pwm@e6e35000 { 1139 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1140 reg = <0 0xe6e35000 0 0x8>; 1141 clocks = <&cpg CPG_MOD 523>; 1142 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1143 resets = <&cpg 523>; 1144 #pwm-cells = <2>; 1145 status = "disabled"; 1146 }; 1147 1148 pwm6: pwm@e6e36000 { 1149 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1150 reg = <0 0xe6e36000 0 0x8>; 1151 clocks = <&cpg CPG_MOD 523>; 1152 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1153 resets = <&cpg 523>; 1154 #pwm-cells = <2>; 1155 status = "disabled"; 1156 }; 1157 1158 scif0: serial@e6e60000 { 1159 compatible = "renesas,scif-r8a77990", 1160 "renesas,rcar-gen3-scif", "renesas,scif"; 1161 reg = <0 0xe6e60000 0 64>; 1162 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1163 clocks = <&cpg CPG_MOD 207>, 1164 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1165 <&scif_clk>; 1166 clock-names = "fck", "brg_int", "scif_clk"; 1167 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1168 <&dmac2 0x51>, <&dmac2 0x50>; 1169 dma-names = "tx", "rx", "tx", "rx"; 1170 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1171 resets = <&cpg 207>; 1172 status = "disabled"; 1173 }; 1174 1175 scif1: serial@e6e68000 { 1176 compatible = "renesas,scif-r8a77990", 1177 "renesas,rcar-gen3-scif", "renesas,scif"; 1178 reg = <0 0xe6e68000 0 64>; 1179 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1180 clocks = <&cpg CPG_MOD 206>, 1181 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1182 <&scif_clk>; 1183 clock-names = "fck", "brg_int", "scif_clk"; 1184 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1185 <&dmac2 0x53>, <&dmac2 0x52>; 1186 dma-names = "tx", "rx", "tx", "rx"; 1187 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1188 resets = <&cpg 206>; 1189 status = "disabled"; 1190 }; 1191 1192 scif2: serial@e6e88000 { 1193 compatible = "renesas,scif-r8a77990", 1194 "renesas,rcar-gen3-scif", "renesas,scif"; 1195 reg = <0 0xe6e88000 0 64>; 1196 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1197 clocks = <&cpg CPG_MOD 310>, 1198 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1199 <&scif_clk>; 1200 clock-names = "fck", "brg_int", "scif_clk"; 1201 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1202 <&dmac2 0x13>, <&dmac2 0x12>; 1203 dma-names = "tx", "rx", "tx", "rx"; 1204 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1205 resets = <&cpg 310>; 1206 status = "disabled"; 1207 }; 1208 1209 scif3: serial@e6c50000 { 1210 compatible = "renesas,scif-r8a77990", 1211 "renesas,rcar-gen3-scif", "renesas,scif"; 1212 reg = <0 0xe6c50000 0 64>; 1213 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1214 clocks = <&cpg CPG_MOD 204>, 1215 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1216 <&scif_clk>; 1217 clock-names = "fck", "brg_int", "scif_clk"; 1218 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1219 dma-names = "tx", "rx"; 1220 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1221 resets = <&cpg 204>; 1222 status = "disabled"; 1223 }; 1224 1225 scif4: serial@e6c40000 { 1226 compatible = "renesas,scif-r8a77990", 1227 "renesas,rcar-gen3-scif", "renesas,scif"; 1228 reg = <0 0xe6c40000 0 64>; 1229 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 203>, 1231 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1232 <&scif_clk>; 1233 clock-names = "fck", "brg_int", "scif_clk"; 1234 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1235 dma-names = "tx", "rx"; 1236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1237 resets = <&cpg 203>; 1238 status = "disabled"; 1239 }; 1240 1241 scif5: serial@e6f30000 { 1242 compatible = "renesas,scif-r8a77990", 1243 "renesas,rcar-gen3-scif", "renesas,scif"; 1244 reg = <0 0xe6f30000 0 64>; 1245 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1246 clocks = <&cpg CPG_MOD 202>, 1247 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1248 <&scif_clk>; 1249 clock-names = "fck", "brg_int", "scif_clk"; 1250 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1251 dma-names = "tx", "rx"; 1252 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1253 resets = <&cpg 202>; 1254 status = "disabled"; 1255 }; 1256 1257 msiof0: spi@e6e90000 { 1258 compatible = "renesas,msiof-r8a77990", 1259 "renesas,rcar-gen3-msiof"; 1260 reg = <0 0xe6e90000 0 0x0064>; 1261 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 211>; 1263 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1264 <&dmac2 0x41>, <&dmac2 0x40>; 1265 dma-names = "tx", "rx", "tx", "rx"; 1266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1267 resets = <&cpg 211>; 1268 #address-cells = <1>; 1269 #size-cells = <0>; 1270 status = "disabled"; 1271 }; 1272 1273 msiof1: spi@e6ea0000 { 1274 compatible = "renesas,msiof-r8a77990", 1275 "renesas,rcar-gen3-msiof"; 1276 reg = <0 0xe6ea0000 0 0x0064>; 1277 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1278 clocks = <&cpg CPG_MOD 210>; 1279 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1280 dma-names = "tx", "rx"; 1281 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1282 resets = <&cpg 210>; 1283 #address-cells = <1>; 1284 #size-cells = <0>; 1285 status = "disabled"; 1286 }; 1287 1288 msiof2: spi@e6c00000 { 1289 compatible = "renesas,msiof-r8a77990", 1290 "renesas,rcar-gen3-msiof"; 1291 reg = <0 0xe6c00000 0 0x0064>; 1292 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1293 clocks = <&cpg CPG_MOD 209>; 1294 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1295 dma-names = "tx", "rx"; 1296 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1297 resets = <&cpg 209>; 1298 #address-cells = <1>; 1299 #size-cells = <0>; 1300 status = "disabled"; 1301 }; 1302 1303 msiof3: spi@e6c10000 { 1304 compatible = "renesas,msiof-r8a77990", 1305 "renesas,rcar-gen3-msiof"; 1306 reg = <0 0xe6c10000 0 0x0064>; 1307 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1308 clocks = <&cpg CPG_MOD 208>; 1309 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1310 dma-names = "tx", "rx"; 1311 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1312 resets = <&cpg 208>; 1313 #address-cells = <1>; 1314 #size-cells = <0>; 1315 status = "disabled"; 1316 }; 1317 1318 vin4: video@e6ef4000 { 1319 compatible = "renesas,vin-r8a77990"; 1320 reg = <0 0xe6ef4000 0 0x1000>; 1321 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1322 clocks = <&cpg CPG_MOD 807>; 1323 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1324 resets = <&cpg 807>; 1325 renesas,id = <4>; 1326 status = "disabled"; 1327 1328 ports { 1329 #address-cells = <1>; 1330 #size-cells = <0>; 1331 1332 port@1 { 1333 #address-cells = <1>; 1334 #size-cells = <0>; 1335 1336 reg = <1>; 1337 1338 vin4csi40: endpoint@2 { 1339 reg = <2>; 1340 remote-endpoint = <&csi40vin4>; 1341 }; 1342 }; 1343 }; 1344 }; 1345 1346 vin5: video@e6ef5000 { 1347 compatible = "renesas,vin-r8a77990"; 1348 reg = <0 0xe6ef5000 0 0x1000>; 1349 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1350 clocks = <&cpg CPG_MOD 806>; 1351 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1352 resets = <&cpg 806>; 1353 renesas,id = <5>; 1354 status = "disabled"; 1355 1356 ports { 1357 #address-cells = <1>; 1358 #size-cells = <0>; 1359 1360 port@1 { 1361 #address-cells = <1>; 1362 #size-cells = <0>; 1363 1364 reg = <1>; 1365 1366 vin5csi40: endpoint@2 { 1367 reg = <2>; 1368 remote-endpoint = <&csi40vin5>; 1369 }; 1370 }; 1371 }; 1372 }; 1373 1374 drif00: rif@e6f40000 { 1375 compatible = "renesas,r8a77990-drif", 1376 "renesas,rcar-gen3-drif"; 1377 reg = <0 0xe6f40000 0 0x84>; 1378 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1379 clocks = <&cpg CPG_MOD 515>; 1380 clock-names = "fck"; 1381 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1382 dma-names = "rx", "rx"; 1383 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1384 resets = <&cpg 515>; 1385 renesas,bonding = <&drif01>; 1386 status = "disabled"; 1387 }; 1388 1389 drif01: rif@e6f50000 { 1390 compatible = "renesas,r8a77990-drif", 1391 "renesas,rcar-gen3-drif"; 1392 reg = <0 0xe6f50000 0 0x84>; 1393 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1394 clocks = <&cpg CPG_MOD 514>; 1395 clock-names = "fck"; 1396 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1397 dma-names = "rx", "rx"; 1398 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1399 resets = <&cpg 514>; 1400 renesas,bonding = <&drif00>; 1401 status = "disabled"; 1402 }; 1403 1404 drif10: rif@e6f60000 { 1405 compatible = "renesas,r8a77990-drif", 1406 "renesas,rcar-gen3-drif"; 1407 reg = <0 0xe6f60000 0 0x84>; 1408 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1409 clocks = <&cpg CPG_MOD 513>; 1410 clock-names = "fck"; 1411 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1412 dma-names = "rx", "rx"; 1413 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1414 resets = <&cpg 513>; 1415 renesas,bonding = <&drif11>; 1416 status = "disabled"; 1417 }; 1418 1419 drif11: rif@e6f70000 { 1420 compatible = "renesas,r8a77990-drif", 1421 "renesas,rcar-gen3-drif"; 1422 reg = <0 0xe6f70000 0 0x84>; 1423 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1424 clocks = <&cpg CPG_MOD 512>; 1425 clock-names = "fck"; 1426 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1427 dma-names = "rx", "rx"; 1428 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1429 resets = <&cpg 512>; 1430 renesas,bonding = <&drif10>; 1431 status = "disabled"; 1432 }; 1433 1434 drif20: rif@e6f80000 { 1435 compatible = "renesas,r8a77990-drif", 1436 "renesas,rcar-gen3-drif"; 1437 reg = <0 0xe6f80000 0 0x84>; 1438 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1439 clocks = <&cpg CPG_MOD 511>; 1440 clock-names = "fck"; 1441 dmas = <&dmac0 0x28>; 1442 dma-names = "rx"; 1443 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1444 resets = <&cpg 511>; 1445 renesas,bonding = <&drif21>; 1446 status = "disabled"; 1447 }; 1448 1449 drif21: rif@e6f90000 { 1450 compatible = "renesas,r8a77990-drif", 1451 "renesas,rcar-gen3-drif"; 1452 reg = <0 0xe6f90000 0 0x84>; 1453 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1454 clocks = <&cpg CPG_MOD 510>; 1455 clock-names = "fck"; 1456 dmas = <&dmac0 0x2a>; 1457 dma-names = "rx"; 1458 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1459 resets = <&cpg 510>; 1460 renesas,bonding = <&drif20>; 1461 status = "disabled"; 1462 }; 1463 1464 drif30: rif@e6fa0000 { 1465 compatible = "renesas,r8a77990-drif", 1466 "renesas,rcar-gen3-drif"; 1467 reg = <0 0xe6fa0000 0 0x84>; 1468 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cpg CPG_MOD 509>; 1470 clock-names = "fck"; 1471 dmas = <&dmac0 0x2c>; 1472 dma-names = "rx"; 1473 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1474 resets = <&cpg 509>; 1475 renesas,bonding = <&drif31>; 1476 status = "disabled"; 1477 }; 1478 1479 drif31: rif@e6fb0000 { 1480 compatible = "renesas,r8a77990-drif", 1481 "renesas,rcar-gen3-drif"; 1482 reg = <0 0xe6fb0000 0 0x84>; 1483 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1484 clocks = <&cpg CPG_MOD 508>; 1485 clock-names = "fck"; 1486 dmas = <&dmac0 0x2e>; 1487 dma-names = "rx"; 1488 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1489 resets = <&cpg 508>; 1490 renesas,bonding = <&drif30>; 1491 status = "disabled"; 1492 }; 1493 1494 rcar_sound: sound@ec500000 { 1495 /* 1496 * #sound-dai-cells is required if simple-card 1497 * 1498 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1499 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1500 */ 1501 /* 1502 * #clock-cells is required for audio_clkout0/1/2/3 1503 * 1504 * clkout : #clock-cells = <0>; <&rcar_sound>; 1505 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1506 */ 1507 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1508 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1509 <0 0xec5a0000 0 0x100>, /* ADG */ 1510 <0 0xec540000 0 0x1000>, /* SSIU */ 1511 <0 0xec541000 0 0x280>, /* SSI */ 1512 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1513 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1514 1515 clocks = <&cpg CPG_MOD 1005>, 1516 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1517 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1518 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1519 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1520 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1521 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1522 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1523 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1524 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1525 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1526 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1527 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1528 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1529 <&audio_clk_a>, <&audio_clk_b>, 1530 <&audio_clk_c>, 1531 <&cpg CPG_MOD 922>; 1532 clock-names = "ssi-all", 1533 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1534 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1535 "ssi.1", "ssi.0", 1536 "src.9", "src.8", "src.7", "src.6", 1537 "src.5", "src.4", "src.3", "src.2", 1538 "src.1", "src.0", 1539 "mix.1", "mix.0", 1540 "ctu.1", "ctu.0", 1541 "dvc.0", "dvc.1", 1542 "clk_a", "clk_b", "clk_c", "clk_i"; 1543 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1544 resets = <&cpg 1005>, 1545 <&cpg 1006>, <&cpg 1007>, 1546 <&cpg 1008>, <&cpg 1009>, 1547 <&cpg 1010>, <&cpg 1011>, 1548 <&cpg 1012>, <&cpg 1013>, 1549 <&cpg 1014>, <&cpg 1015>; 1550 reset-names = "ssi-all", 1551 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1552 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1553 "ssi.1", "ssi.0"; 1554 status = "disabled"; 1555 1556 rcar_sound,ctu { 1557 ctu00: ctu-0 { }; 1558 ctu01: ctu-1 { }; 1559 ctu02: ctu-2 { }; 1560 ctu03: ctu-3 { }; 1561 ctu10: ctu-4 { }; 1562 ctu11: ctu-5 { }; 1563 ctu12: ctu-6 { }; 1564 ctu13: ctu-7 { }; 1565 }; 1566 1567 rcar_sound,dvc { 1568 dvc0: dvc-0 { 1569 dmas = <&audma0 0xbc>; 1570 dma-names = "tx"; 1571 }; 1572 dvc1: dvc-1 { 1573 dmas = <&audma0 0xbe>; 1574 dma-names = "tx"; 1575 }; 1576 }; 1577 1578 rcar_sound,mix { 1579 mix0: mix-0 { }; 1580 mix1: mix-1 { }; 1581 }; 1582 1583 rcar_sound,src { 1584 src0: src-0 { 1585 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1586 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1587 dma-names = "rx", "tx"; 1588 }; 1589 src1: src-1 { 1590 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1591 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1592 dma-names = "rx", "tx"; 1593 }; 1594 src2: src-2 { 1595 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1596 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1597 dma-names = "rx", "tx"; 1598 }; 1599 src3: src-3 { 1600 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1601 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1602 dma-names = "rx", "tx"; 1603 }; 1604 src4: src-4 { 1605 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1606 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1607 dma-names = "rx", "tx"; 1608 }; 1609 src5: src-5 { 1610 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1611 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1612 dma-names = "rx", "tx"; 1613 }; 1614 src6: src-6 { 1615 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1616 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1617 dma-names = "rx", "tx"; 1618 }; 1619 src7: src-7 { 1620 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1621 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1622 dma-names = "rx", "tx"; 1623 }; 1624 src8: src-8 { 1625 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1626 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1627 dma-names = "rx", "tx"; 1628 }; 1629 src9: src-9 { 1630 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1631 dmas = <&audma0 0x97>, <&audma0 0xba>; 1632 dma-names = "rx", "tx"; 1633 }; 1634 }; 1635 1636 rcar_sound,ssi { 1637 ssi0: ssi-0 { 1638 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1639 dmas = <&audma0 0x01>, <&audma0 0x02>, 1640 <&audma0 0x15>, <&audma0 0x16>; 1641 dma-names = "rx", "tx", "rxu", "txu"; 1642 }; 1643 ssi1: ssi-1 { 1644 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1645 dmas = <&audma0 0x03>, <&audma0 0x04>, 1646 <&audma0 0x49>, <&audma0 0x4a>; 1647 dma-names = "rx", "tx", "rxu", "txu"; 1648 }; 1649 ssi2: ssi-2 { 1650 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1651 dmas = <&audma0 0x05>, <&audma0 0x06>, 1652 <&audma0 0x63>, <&audma0 0x64>; 1653 dma-names = "rx", "tx", "rxu", "txu"; 1654 }; 1655 ssi3: ssi-3 { 1656 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1657 dmas = <&audma0 0x07>, <&audma0 0x08>, 1658 <&audma0 0x6f>, <&audma0 0x70>; 1659 dma-names = "rx", "tx", "rxu", "txu"; 1660 }; 1661 ssi4: ssi-4 { 1662 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1663 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1664 <&audma0 0x71>, <&audma0 0x72>; 1665 dma-names = "rx", "tx", "rxu", "txu"; 1666 }; 1667 ssi5: ssi-5 { 1668 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1669 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1670 <&audma0 0x73>, <&audma0 0x74>; 1671 dma-names = "rx", "tx", "rxu", "txu"; 1672 }; 1673 ssi6: ssi-6 { 1674 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1675 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1676 <&audma0 0x75>, <&audma0 0x76>; 1677 dma-names = "rx", "tx", "rxu", "txu"; 1678 }; 1679 ssi7: ssi-7 { 1680 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1681 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1682 <&audma0 0x79>, <&audma0 0x7a>; 1683 dma-names = "rx", "tx", "rxu", "txu"; 1684 }; 1685 ssi8: ssi-8 { 1686 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1687 dmas = <&audma0 0x11>, <&audma0 0x12>, 1688 <&audma0 0x7b>, <&audma0 0x7c>; 1689 dma-names = "rx", "tx", "rxu", "txu"; 1690 }; 1691 ssi9: ssi-9 { 1692 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1693 dmas = <&audma0 0x13>, <&audma0 0x14>, 1694 <&audma0 0x7d>, <&audma0 0x7e>; 1695 dma-names = "rx", "tx", "rxu", "txu"; 1696 }; 1697 }; 1698 }; 1699 1700 mlp: mlp@ec520000 { 1701 compatible = "renesas,r8a77990-mlp", 1702 "renesas,rcar-gen3-mlp"; 1703 reg = <0 0xec520000 0 0x800>; 1704 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 1705 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 1706 clocks = <&cpg CPG_MOD 802>; 1707 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1708 resets = <&cpg 802>; 1709 status = "disabled"; 1710 }; 1711 1712 audma0: dma-controller@ec700000 { 1713 compatible = "renesas,dmac-r8a77990", 1714 "renesas,rcar-dmac"; 1715 reg = <0 0xec700000 0 0x10000>; 1716 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1717 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1718 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1719 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1720 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1721 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1722 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1723 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1724 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1725 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1726 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1727 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1728 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1729 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1730 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1731 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1732 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1733 interrupt-names = "error", 1734 "ch0", "ch1", "ch2", "ch3", 1735 "ch4", "ch5", "ch6", "ch7", 1736 "ch8", "ch9", "ch10", "ch11", 1737 "ch12", "ch13", "ch14", "ch15"; 1738 clocks = <&cpg CPG_MOD 502>; 1739 clock-names = "fck"; 1740 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1741 resets = <&cpg 502>; 1742 #dma-cells = <1>; 1743 dma-channels = <16>; 1744 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1745 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1746 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1747 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1748 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1749 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1750 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1751 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1752 }; 1753 1754 xhci0: usb@ee000000 { 1755 compatible = "renesas,xhci-r8a77990", 1756 "renesas,rcar-gen3-xhci"; 1757 reg = <0 0xee000000 0 0xc00>; 1758 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1759 clocks = <&cpg CPG_MOD 328>; 1760 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1761 resets = <&cpg 328>; 1762 status = "disabled"; 1763 }; 1764 1765 usb3_peri0: usb@ee020000 { 1766 compatible = "renesas,r8a77990-usb3-peri", 1767 "renesas,rcar-gen3-usb3-peri"; 1768 reg = <0 0xee020000 0 0x400>; 1769 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1770 clocks = <&cpg CPG_MOD 328>; 1771 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1772 resets = <&cpg 328>; 1773 status = "disabled"; 1774 }; 1775 1776 ohci0: usb@ee080000 { 1777 compatible = "generic-ohci"; 1778 reg = <0 0xee080000 0 0x100>; 1779 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1780 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1781 phys = <&usb2_phy0 1>; 1782 phy-names = "usb"; 1783 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1784 resets = <&cpg 703>, <&cpg 704>; 1785 status = "disabled"; 1786 }; 1787 1788 ehci0: usb@ee080100 { 1789 compatible = "generic-ehci"; 1790 reg = <0 0xee080100 0 0x100>; 1791 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1792 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1793 phys = <&usb2_phy0 2>; 1794 phy-names = "usb"; 1795 companion = <&ohci0>; 1796 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1797 resets = <&cpg 703>, <&cpg 704>; 1798 status = "disabled"; 1799 }; 1800 1801 usb2_phy0: usb-phy@ee080200 { 1802 compatible = "renesas,usb2-phy-r8a77990", 1803 "renesas,rcar-gen3-usb2-phy"; 1804 reg = <0 0xee080200 0 0x700>; 1805 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1806 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1807 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1808 resets = <&cpg 703>, <&cpg 704>; 1809 #phy-cells = <1>; 1810 status = "disabled"; 1811 }; 1812 1813 sdhi0: mmc@ee100000 { 1814 compatible = "renesas,sdhi-r8a77990", 1815 "renesas,rcar-gen3-sdhi"; 1816 reg = <0 0xee100000 0 0x2000>; 1817 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1818 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; 1819 clock-names = "core", "clkh"; 1820 max-frequency = <200000000>; 1821 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1822 resets = <&cpg 314>; 1823 iommus = <&ipmmu_ds1 32>; 1824 status = "disabled"; 1825 }; 1826 1827 sdhi1: mmc@ee120000 { 1828 compatible = "renesas,sdhi-r8a77990", 1829 "renesas,rcar-gen3-sdhi"; 1830 reg = <0 0xee120000 0 0x2000>; 1831 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1832 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; 1833 clock-names = "core", "clkh"; 1834 max-frequency = <200000000>; 1835 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1836 resets = <&cpg 313>; 1837 iommus = <&ipmmu_ds1 33>; 1838 status = "disabled"; 1839 }; 1840 1841 sdhi3: mmc@ee160000 { 1842 compatible = "renesas,sdhi-r8a77990", 1843 "renesas,rcar-gen3-sdhi"; 1844 reg = <0 0xee160000 0 0x2000>; 1845 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1846 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; 1847 clock-names = "core", "clkh"; 1848 max-frequency = <200000000>; 1849 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1850 resets = <&cpg 311>; 1851 iommus = <&ipmmu_ds1 35>; 1852 status = "disabled"; 1853 }; 1854 1855 rpc: spi@ee200000 { 1856 compatible = "renesas,r8a77990-rpc-if", 1857 "renesas,rcar-gen3-rpc-if"; 1858 reg = <0 0xee200000 0 0x200>, 1859 <0 0x08000000 0 0x04000000>, 1860 <0 0xee208000 0 0x100>; 1861 reg-names = "regs", "dirmap", "wbuf"; 1862 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1863 clocks = <&cpg CPG_MOD 917>; 1864 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1865 resets = <&cpg 917>; 1866 #address-cells = <1>; 1867 #size-cells = <0>; 1868 status = "disabled"; 1869 }; 1870 1871 gic: interrupt-controller@f1010000 { 1872 compatible = "arm,gic-400"; 1873 #interrupt-cells = <3>; 1874 #address-cells = <0>; 1875 interrupt-controller; 1876 reg = <0x0 0xf1010000 0 0x1000>, 1877 <0x0 0xf1020000 0 0x20000>, 1878 <0x0 0xf1040000 0 0x20000>, 1879 <0x0 0xf1060000 0 0x20000>; 1880 interrupts = <GIC_PPI 9 1881 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1882 clocks = <&cpg CPG_MOD 408>; 1883 clock-names = "clk"; 1884 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1885 resets = <&cpg 408>; 1886 }; 1887 1888 pciec0: pcie@fe000000 { 1889 compatible = "renesas,pcie-r8a77990", 1890 "renesas,pcie-rcar-gen3"; 1891 reg = <0 0xfe000000 0 0x80000>; 1892 #address-cells = <3>; 1893 #size-cells = <2>; 1894 bus-range = <0x00 0xff>; 1895 device_type = "pci"; 1896 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1897 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1898 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1899 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1900 /* Map all possible DDR/IOMMU as inbound ranges */ 1901 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 1902 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1903 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1904 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1905 #interrupt-cells = <1>; 1906 interrupt-map-mask = <0 0 0 0>; 1907 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1908 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1909 clock-names = "pcie", "pcie_bus"; 1910 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1911 resets = <&cpg 319>; 1912 iommu-map = <0 &ipmmu_hc 0 1>; 1913 iommu-map-mask = <0>; 1914 status = "disabled"; 1915 }; 1916 1917 vspb0: vsp@fe960000 { 1918 compatible = "renesas,vsp2"; 1919 reg = <0 0xfe960000 0 0x8000>; 1920 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1921 clocks = <&cpg CPG_MOD 626>; 1922 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1923 resets = <&cpg 626>; 1924 renesas,fcp = <&fcpvb0>; 1925 }; 1926 1927 fcpvb0: fcp@fe96f000 { 1928 compatible = "renesas,fcpv"; 1929 reg = <0 0xfe96f000 0 0x200>; 1930 clocks = <&cpg CPG_MOD 607>; 1931 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1932 resets = <&cpg 607>; 1933 iommus = <&ipmmu_vp0 5>; 1934 }; 1935 1936 vspi0: vsp@fe9a0000 { 1937 compatible = "renesas,vsp2"; 1938 reg = <0 0xfe9a0000 0 0x8000>; 1939 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1940 clocks = <&cpg CPG_MOD 631>; 1941 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1942 resets = <&cpg 631>; 1943 renesas,fcp = <&fcpvi0>; 1944 }; 1945 1946 fcpvi0: fcp@fe9af000 { 1947 compatible = "renesas,fcpv"; 1948 reg = <0 0xfe9af000 0 0x200>; 1949 clocks = <&cpg CPG_MOD 611>; 1950 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1951 resets = <&cpg 611>; 1952 iommus = <&ipmmu_vp0 8>; 1953 }; 1954 1955 vspd0: vsp@fea20000 { 1956 compatible = "renesas,vsp2"; 1957 reg = <0 0xfea20000 0 0x7000>; 1958 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1959 clocks = <&cpg CPG_MOD 623>; 1960 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1961 resets = <&cpg 623>; 1962 renesas,fcp = <&fcpvd0>; 1963 }; 1964 1965 fcpvd0: fcp@fea27000 { 1966 compatible = "renesas,fcpv"; 1967 reg = <0 0xfea27000 0 0x200>; 1968 clocks = <&cpg CPG_MOD 603>; 1969 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1970 resets = <&cpg 603>; 1971 iommus = <&ipmmu_vi0 8>; 1972 }; 1973 1974 vspd1: vsp@fea28000 { 1975 compatible = "renesas,vsp2"; 1976 reg = <0 0xfea28000 0 0x7000>; 1977 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1978 clocks = <&cpg CPG_MOD 622>; 1979 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1980 resets = <&cpg 622>; 1981 renesas,fcp = <&fcpvd1>; 1982 }; 1983 1984 fcpvd1: fcp@fea2f000 { 1985 compatible = "renesas,fcpv"; 1986 reg = <0 0xfea2f000 0 0x200>; 1987 clocks = <&cpg CPG_MOD 602>; 1988 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1989 resets = <&cpg 602>; 1990 iommus = <&ipmmu_vi0 9>; 1991 }; 1992 1993 cmm0: cmm@fea40000 { 1994 compatible = "renesas,r8a77990-cmm", 1995 "renesas,rcar-gen3-cmm"; 1996 reg = <0 0xfea40000 0 0x1000>; 1997 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1998 clocks = <&cpg CPG_MOD 711>; 1999 resets = <&cpg 711>; 2000 }; 2001 2002 cmm1: cmm@fea50000 { 2003 compatible = "renesas,r8a77990-cmm", 2004 "renesas,rcar-gen3-cmm"; 2005 reg = <0 0xfea50000 0 0x1000>; 2006 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2007 clocks = <&cpg CPG_MOD 710>; 2008 resets = <&cpg 710>; 2009 }; 2010 2011 csi40: csi2@feaa0000 { 2012 compatible = "renesas,r8a77990-csi2"; 2013 reg = <0 0xfeaa0000 0 0x10000>; 2014 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2015 clocks = <&cpg CPG_MOD 716>; 2016 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2017 resets = <&cpg 716>; 2018 status = "disabled"; 2019 2020 ports { 2021 #address-cells = <1>; 2022 #size-cells = <0>; 2023 2024 port@0 { 2025 reg = <0>; 2026 }; 2027 2028 port@1 { 2029 #address-cells = <1>; 2030 #size-cells = <0>; 2031 2032 reg = <1>; 2033 2034 csi40vin4: endpoint@0 { 2035 reg = <0>; 2036 remote-endpoint = <&vin4csi40>; 2037 }; 2038 csi40vin5: endpoint@1 { 2039 reg = <1>; 2040 remote-endpoint = <&vin5csi40>; 2041 }; 2042 }; 2043 }; 2044 }; 2045 2046 du: display@feb00000 { 2047 compatible = "renesas,du-r8a77990"; 2048 reg = <0 0xfeb00000 0 0x40000>; 2049 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2050 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 2051 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 2052 clock-names = "du.0", "du.1"; 2053 resets = <&cpg 724>; 2054 reset-names = "du.0"; 2055 2056 renesas,cmms = <&cmm0>, <&cmm1>; 2057 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2058 2059 status = "disabled"; 2060 2061 ports { 2062 #address-cells = <1>; 2063 #size-cells = <0>; 2064 2065 port@0 { 2066 reg = <0>; 2067 }; 2068 2069 port@1 { 2070 reg = <1>; 2071 du_out_lvds0: endpoint { 2072 remote-endpoint = <&lvds0_in>; 2073 }; 2074 }; 2075 2076 port@2 { 2077 reg = <2>; 2078 du_out_lvds1: endpoint { 2079 remote-endpoint = <&lvds1_in>; 2080 }; 2081 }; 2082 }; 2083 }; 2084 2085 lvds0: lvds-encoder@feb90000 { 2086 compatible = "renesas,r8a77990-lvds"; 2087 reg = <0 0xfeb90000 0 0x20>; 2088 clocks = <&cpg CPG_MOD 727>; 2089 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2090 resets = <&cpg 727>; 2091 status = "disabled"; 2092 2093 renesas,companion = <&lvds1>; 2094 2095 ports { 2096 #address-cells = <1>; 2097 #size-cells = <0>; 2098 2099 port@0 { 2100 reg = <0>; 2101 lvds0_in: endpoint { 2102 remote-endpoint = <&du_out_lvds0>; 2103 }; 2104 }; 2105 2106 port@1 { 2107 reg = <1>; 2108 }; 2109 }; 2110 }; 2111 2112 lvds1: lvds-encoder@feb90100 { 2113 compatible = "renesas,r8a77990-lvds"; 2114 reg = <0 0xfeb90100 0 0x20>; 2115 clocks = <&cpg CPG_MOD 727>; 2116 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2117 resets = <&cpg 726>; 2118 status = "disabled"; 2119 2120 ports { 2121 #address-cells = <1>; 2122 #size-cells = <0>; 2123 2124 port@0 { 2125 reg = <0>; 2126 lvds1_in: endpoint { 2127 remote-endpoint = <&du_out_lvds1>; 2128 }; 2129 }; 2130 2131 port@1 { 2132 reg = <1>; 2133 }; 2134 }; 2135 }; 2136 2137 prr: chipid@fff00044 { 2138 compatible = "renesas,prr"; 2139 reg = <0 0xfff00044 0 4>; 2140 bootph-all; 2141 }; 2142 }; 2143 2144 thermal-zones { 2145 cpu-thermal { 2146 polling-delay-passive = <250>; 2147 polling-delay = <0>; 2148 thermal-sensors = <&thermal>; 2149 sustainable-power = <717>; 2150 2151 cooling-maps { 2152 map0 { 2153 trip = <&target>; 2154 cooling-device = <&a53_0 0 2>; 2155 contribution = <1024>; 2156 }; 2157 }; 2158 2159 trips { 2160 sensor1_crit: sensor1-crit { 2161 temperature = <120000>; 2162 hysteresis = <2000>; 2163 type = "critical"; 2164 }; 2165 2166 target: trip-point1 { 2167 temperature = <100000>; 2168 hysteresis = <2000>; 2169 type = "passive"; 2170 }; 2171 }; 2172 }; 2173 }; 2174 2175 timer { 2176 compatible = "arm,armv8-timer"; 2177 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2178 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2179 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2180 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2181 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2182 }; 2183}; 2184