xref: /linux/arch/arm64/boot/dts/renesas/r8a77970.dtsi (revision 2f24482304ebd32c5aa374f31465b9941a860b92)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8
9#include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/power/r8a77970-sysc.h>
13
14/ {
15	compatible = "renesas,r8a77970";
16	#address-cells = <2>;
17	#size-cells = <2>;
18
19	/* External CAN clock - to be overridden by boards that provide it */
20	can_clk: can {
21		compatible = "fixed-clock";
22		#clock-cells = <0>;
23		clock-frequency = <0>;
24	};
25
26	cpus {
27		#address-cells = <1>;
28		#size-cells = <0>;
29
30		a53_0: cpu@0 {
31			device_type = "cpu";
32			compatible = "arm,cortex-a53";
33			reg = <0>;
34			clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
35			power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
36			next-level-cache = <&L2_CA53>;
37			enable-method = "psci";
38		};
39
40		a53_1: cpu@1 {
41			device_type = "cpu";
42			compatible = "arm,cortex-a53";
43			reg = <1>;
44			clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
45			power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
46			next-level-cache = <&L2_CA53>;
47			enable-method = "psci";
48		};
49
50		L2_CA53: cache-controller {
51			compatible = "cache";
52			power-domains = <&sysc R8A77970_PD_CA53_SCU>;
53			cache-unified;
54			cache-level = <2>;
55		};
56	};
57
58	extal_clk: extal {
59		compatible = "fixed-clock";
60		#clock-cells = <0>;
61		/* This value must be overridden by the board */
62		clock-frequency = <0>;
63		bootph-all;
64	};
65
66	extalr_clk: extalr {
67		compatible = "fixed-clock";
68		#clock-cells = <0>;
69		/* This value must be overridden by the board */
70		clock-frequency = <0>;
71		bootph-all;
72	};
73
74	pmu_a53 {
75		compatible = "arm,cortex-a53-pmu";
76		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
77				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
78		interrupt-affinity = <&a53_0>, <&a53_1>;
79	};
80
81	psci {
82		compatible = "arm,psci-1.0", "arm,psci-0.2";
83		method = "smc";
84	};
85
86	/* External SCIF clock - to be overridden by boards that provide it */
87	scif_clk: scif {
88		compatible = "fixed-clock";
89		#clock-cells = <0>;
90		clock-frequency = <0>;
91	};
92
93	soc {
94		compatible = "simple-bus";
95		interrupt-parent = <&gic>;
96		bootph-all;
97
98		#address-cells = <2>;
99		#size-cells = <2>;
100		ranges;
101
102		rwdt: watchdog@e6020000 {
103			compatible = "renesas,r8a77970-wdt",
104				     "renesas,rcar-gen3-wdt";
105			reg = <0 0xe6020000 0 0x0c>;
106			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
107			clocks = <&cpg CPG_MOD 402>;
108			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
109			resets = <&cpg 402>;
110			status = "disabled";
111		};
112
113		gpio0: gpio@e6050000 {
114			compatible = "renesas,gpio-r8a77970",
115				     "renesas,rcar-gen3-gpio";
116			reg = <0 0xe6050000 0 0x50>;
117			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
118			#gpio-cells = <2>;
119			gpio-controller;
120			gpio-ranges = <&pfc 0 0 22>;
121			#interrupt-cells = <2>;
122			interrupt-controller;
123			clocks = <&cpg CPG_MOD 912>;
124			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
125			resets = <&cpg 912>;
126		};
127
128		gpio1: gpio@e6051000 {
129			compatible = "renesas,gpio-r8a77970",
130				     "renesas,rcar-gen3-gpio";
131			reg = <0 0xe6051000 0 0x50>;
132			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
133			#gpio-cells = <2>;
134			gpio-controller;
135			gpio-ranges = <&pfc 0 32 28>;
136			#interrupt-cells = <2>;
137			interrupt-controller;
138			clocks = <&cpg CPG_MOD 911>;
139			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
140			resets = <&cpg 911>;
141		};
142
143		gpio2: gpio@e6052000 {
144			compatible = "renesas,gpio-r8a77970",
145				     "renesas,rcar-gen3-gpio";
146			reg = <0 0xe6052000 0 0x50>;
147			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
148			#gpio-cells = <2>;
149			gpio-controller;
150			gpio-ranges = <&pfc 0 64 17>;
151			#interrupt-cells = <2>;
152			interrupt-controller;
153			clocks = <&cpg CPG_MOD 910>;
154			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
155			resets = <&cpg 910>;
156		};
157
158		gpio3: gpio@e6053000 {
159			compatible = "renesas,gpio-r8a77970",
160				     "renesas,rcar-gen3-gpio";
161			reg = <0 0xe6053000 0 0x50>;
162			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
163			#gpio-cells = <2>;
164			gpio-controller;
165			gpio-ranges = <&pfc 0 96 17>;
166			#interrupt-cells = <2>;
167			interrupt-controller;
168			clocks = <&cpg CPG_MOD 909>;
169			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
170			resets = <&cpg 909>;
171		};
172
173		gpio4: gpio@e6054000 {
174			compatible = "renesas,gpio-r8a77970",
175				     "renesas,rcar-gen3-gpio";
176			reg = <0 0xe6054000 0 0x50>;
177			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
178			#gpio-cells = <2>;
179			gpio-controller;
180			gpio-ranges = <&pfc 0 128 6>;
181			#interrupt-cells = <2>;
182			interrupt-controller;
183			clocks = <&cpg CPG_MOD 908>;
184			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
185			resets = <&cpg 908>;
186		};
187
188		gpio5: gpio@e6055000 {
189			compatible = "renesas,gpio-r8a77970",
190				     "renesas,rcar-gen3-gpio";
191			reg = <0 0xe6055000 0 0x50>;
192			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
193			#gpio-cells = <2>;
194			gpio-controller;
195			gpio-ranges = <&pfc 0 160 15>;
196			#interrupt-cells = <2>;
197			interrupt-controller;
198			clocks = <&cpg CPG_MOD 907>;
199			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
200			resets = <&cpg 907>;
201		};
202
203		pfc: pinctrl@e6060000 {
204			compatible = "renesas,pfc-r8a77970";
205			reg = <0 0xe6060000 0 0x504>;
206			bootph-all;
207		};
208
209		cmt0: timer@e60f0000 {
210			compatible = "renesas,r8a77970-cmt0",
211				     "renesas,rcar-gen3-cmt0";
212			reg = <0 0xe60f0000 0 0x1004>;
213			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
214				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
215			clocks = <&cpg CPG_MOD 303>;
216			clock-names = "fck";
217			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
218			resets = <&cpg 303>;
219			status = "disabled";
220		};
221
222		cmt1: timer@e6130000 {
223			compatible = "renesas,r8a77970-cmt1",
224				     "renesas,rcar-gen3-cmt1";
225			reg = <0 0xe6130000 0 0x1004>;
226			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
227				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
228				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
229				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
230				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
231				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
232				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
233				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
234			clocks = <&cpg CPG_MOD 302>;
235			clock-names = "fck";
236			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
237			resets = <&cpg 302>;
238			status = "disabled";
239		};
240
241		cmt2: timer@e6140000 {
242			compatible = "renesas,r8a77970-cmt1",
243				     "renesas,rcar-gen3-cmt1";
244			reg = <0 0xe6140000 0 0x1004>;
245			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
246				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
247				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
248				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
249				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
250				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
251				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
252				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
253			clocks = <&cpg CPG_MOD 301>;
254			clock-names = "fck";
255			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
256			resets = <&cpg 301>;
257			status = "disabled";
258		};
259
260		cmt3: timer@e6148000 {
261			compatible = "renesas,r8a77970-cmt1",
262				     "renesas,rcar-gen3-cmt1";
263			reg = <0 0xe6148000 0 0x1004>;
264			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
265				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
266				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
267				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
268				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
269				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
270				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
271				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
272			clocks = <&cpg CPG_MOD 300>;
273			clock-names = "fck";
274			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
275			resets = <&cpg 300>;
276			status = "disabled";
277		};
278
279		cpg: clock-controller@e6150000 {
280			compatible = "renesas,r8a77970-cpg-mssr";
281			reg = <0 0xe6150000 0 0x1000>;
282			clocks = <&extal_clk>, <&extalr_clk>;
283			clock-names = "extal", "extalr";
284			#clock-cells = <2>;
285			#power-domain-cells = <0>;
286			#reset-cells = <1>;
287			bootph-all;
288		};
289
290		rst: reset-controller@e6160000 {
291			compatible = "renesas,r8a77970-rst";
292			reg = <0 0xe6160000 0 0x200>;
293			bootph-all;
294		};
295
296		sysc: system-controller@e6180000 {
297			compatible = "renesas,r8a77970-sysc";
298			reg = <0 0xe6180000 0 0x440>;
299			#power-domain-cells = <1>;
300		};
301
302		thermal: thermal@e6190000 {
303			compatible = "renesas,thermal-r8a77970";
304			reg = <0 0xe6190000 0 0x10>,
305			      <0 0xe6190100 0 0x120>;
306			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
307				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
308				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
309			clocks = <&cpg CPG_MOD 522>;
310			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
311			resets = <&cpg 522>;
312			#thermal-sensor-cells = <0>;
313		};
314
315		intc_ex: interrupt-controller@e61c0000 {
316			compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
317			#interrupt-cells = <2>;
318			interrupt-controller;
319			reg = <0 0xe61c0000 0 0x200>;
320			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
321				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
322				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
323				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
324				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
325				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
326			clocks = <&cpg CPG_MOD 407>;
327			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
328			resets = <&cpg 407>;
329		};
330
331		tmu0: timer@e61e0000 {
332			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
333			reg = <0 0xe61e0000 0 0x30>;
334			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
335				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
336				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
337			interrupt-names = "tuni0", "tuni1", "tuni2";
338			clocks = <&cpg CPG_MOD 125>;
339			clock-names = "fck";
340			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
341			resets = <&cpg 125>;
342			status = "disabled";
343		};
344
345		tmu1: timer@e6fc0000 {
346			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
347			reg = <0 0xe6fc0000 0 0x30>;
348			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
349				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
350				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
351				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
352			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
353			clocks = <&cpg CPG_MOD 124>;
354			clock-names = "fck";
355			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
356			resets = <&cpg 124>;
357			status = "disabled";
358		};
359
360		tmu2: timer@e6fd0000 {
361			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
362			reg = <0 0xe6fd0000 0 0x30>;
363			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
364				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
365				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
366				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
367			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
368			clocks = <&cpg CPG_MOD 123>;
369			clock-names = "fck";
370			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
371			resets = <&cpg 123>;
372			status = "disabled";
373		};
374
375		tmu3: timer@e6fe0000 {
376			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
377			reg = <0 0xe6fe0000 0 0x30>;
378			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
379				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
380				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
381			interrupt-names = "tuni0", "tuni1", "tuni2";
382			clocks = <&cpg CPG_MOD 122>;
383			clock-names = "fck";
384			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
385			resets = <&cpg 122>;
386			status = "disabled";
387		};
388
389		tmu4: timer@ffc00000 {
390			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
391			reg = <0 0xffc00000 0 0x30>;
392			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
393				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
394				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
395			interrupt-names = "tuni0", "tuni1", "tuni2";
396			clocks = <&cpg CPG_MOD 121>;
397			clock-names = "fck";
398			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
399			resets = <&cpg 121>;
400			status = "disabled";
401		};
402
403		i2c0: i2c@e6500000 {
404			compatible = "renesas,i2c-r8a77970",
405				     "renesas,rcar-gen3-i2c";
406			reg = <0 0xe6500000 0 0x40>;
407			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
408			clocks = <&cpg CPG_MOD 931>;
409			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
410			resets = <&cpg 931>;
411			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
412			       <&dmac2 0x91>, <&dmac2 0x90>;
413			dma-names = "tx", "rx", "tx", "rx";
414			i2c-scl-internal-delay-ns = <6>;
415			#address-cells = <1>;
416			#size-cells = <0>;
417			status = "disabled";
418		};
419
420		i2c1: i2c@e6508000 {
421			compatible = "renesas,i2c-r8a77970",
422				     "renesas,rcar-gen3-i2c";
423			reg = <0 0xe6508000 0 0x40>;
424			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
425			clocks = <&cpg CPG_MOD 930>;
426			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
427			resets = <&cpg 930>;
428			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
429			       <&dmac2 0x93>, <&dmac2 0x92>;
430			dma-names = "tx", "rx", "tx", "rx";
431			i2c-scl-internal-delay-ns = <6>;
432			#address-cells = <1>;
433			#size-cells = <0>;
434			status = "disabled";
435		};
436
437		i2c2: i2c@e6510000 {
438			compatible = "renesas,i2c-r8a77970",
439				     "renesas,rcar-gen3-i2c";
440			reg = <0 0xe6510000 0 0x40>;
441			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
442			clocks = <&cpg CPG_MOD 929>;
443			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
444			resets = <&cpg 929>;
445			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
446			       <&dmac2 0x95>, <&dmac2 0x94>;
447			dma-names = "tx", "rx", "tx", "rx";
448			i2c-scl-internal-delay-ns = <6>;
449			#address-cells = <1>;
450			#size-cells = <0>;
451			status = "disabled";
452		};
453
454		i2c3: i2c@e66d0000 {
455			compatible = "renesas,i2c-r8a77970",
456				     "renesas,rcar-gen3-i2c";
457			reg = <0 0xe66d0000 0 0x40>;
458			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
459			clocks = <&cpg CPG_MOD 928>;
460			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
461			resets = <&cpg 928>;
462			dmas = <&dmac1 0x97>, <&dmac1 0x96>,
463			       <&dmac2 0x97>, <&dmac2 0x96>;
464			dma-names = "tx", "rx", "tx", "rx";
465			i2c-scl-internal-delay-ns = <6>;
466			#address-cells = <1>;
467			#size-cells = <0>;
468			status = "disabled";
469		};
470
471		i2c4: i2c@e66d8000 {
472			compatible = "renesas,i2c-r8a77970",
473				     "renesas,rcar-gen3-i2c";
474			reg = <0 0xe66d8000 0 0x40>;
475			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
476			clocks = <&cpg CPG_MOD 927>;
477			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
478			resets = <&cpg 927>;
479			dmas = <&dmac1 0x99>, <&dmac1 0x98>,
480			       <&dmac2 0x99>, <&dmac2 0x98>;
481			dma-names = "tx", "rx", "tx", "rx";
482			i2c-scl-internal-delay-ns = <6>;
483			#address-cells = <1>;
484			#size-cells = <0>;
485			status = "disabled";
486		};
487
488		hscif0: serial@e6540000 {
489			compatible = "renesas,hscif-r8a77970",
490				     "renesas,rcar-gen3-hscif",
491				     "renesas,hscif";
492			reg = <0 0xe6540000 0 96>;
493			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
494			clocks = <&cpg CPG_MOD 520>,
495				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
496				 <&scif_clk>;
497			clock-names = "fck", "brg_int", "scif_clk";
498			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
499			       <&dmac2 0x31>, <&dmac2 0x30>;
500			dma-names = "tx", "rx", "tx", "rx";
501			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
502			resets = <&cpg 520>;
503			status = "disabled";
504		};
505
506		hscif1: serial@e6550000 {
507			compatible = "renesas,hscif-r8a77970",
508				     "renesas,rcar-gen3-hscif",
509				     "renesas,hscif";
510			reg = <0 0xe6550000 0 96>;
511			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
512			clocks = <&cpg CPG_MOD 519>,
513				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
514				 <&scif_clk>;
515			clock-names = "fck", "brg_int", "scif_clk";
516			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
517			       <&dmac2 0x33>, <&dmac2 0x32>;
518			dma-names = "tx", "rx", "tx", "rx";
519			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
520			resets = <&cpg 519>;
521			status = "disabled";
522		};
523
524		hscif2: serial@e6560000 {
525			compatible = "renesas,hscif-r8a77970",
526				     "renesas,rcar-gen3-hscif",
527				     "renesas,hscif";
528			reg = <0 0xe6560000 0 96>;
529			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
530			clocks = <&cpg CPG_MOD 518>,
531				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
532				 <&scif_clk>;
533			clock-names = "fck", "brg_int", "scif_clk";
534			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
535			       <&dmac2 0x35>, <&dmac2 0x34>;
536			dma-names = "tx", "rx", "tx", "rx";
537			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
538			resets = <&cpg 518>;
539			status = "disabled";
540		};
541
542		hscif3: serial@e66a0000 {
543			compatible = "renesas,hscif-r8a77970",
544				     "renesas,rcar-gen3-hscif", "renesas,hscif";
545			reg = <0 0xe66a0000 0 96>;
546			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
547			clocks = <&cpg CPG_MOD 517>,
548				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
549				 <&scif_clk>;
550			clock-names = "fck", "brg_int", "scif_clk";
551			dmas = <&dmac1 0x37>, <&dmac1 0x36>,
552			       <&dmac2 0x37>, <&dmac2 0x36>;
553			dma-names = "tx", "rx", "tx", "rx";
554			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
555			resets = <&cpg 517>;
556			status = "disabled";
557		};
558
559		canfd: can@e66c0000 {
560			compatible = "renesas,r8a77970-canfd",
561				     "renesas,rcar-gen3-canfd";
562			reg = <0 0xe66c0000 0 0x8000>;
563			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
564				     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
565			interrupt-names = "ch_int", "g_int";
566			clocks = <&cpg CPG_MOD 914>,
567				 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
568				 <&can_clk>;
569			clock-names = "fck", "canfd", "can_clk";
570			assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
571			assigned-clock-rates = <40000000>;
572			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
573			resets = <&cpg 914>;
574			status = "disabled";
575
576			channel0 {
577				status = "disabled";
578			};
579
580			channel1 {
581				status = "disabled";
582			};
583		};
584
585		avb: ethernet@e6800000 {
586			compatible = "renesas,etheravb-r8a77970",
587				     "renesas,etheravb-rcar-gen3";
588			reg = <0 0xe6800000 0 0x800>;
589			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
590				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
591				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
592				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
593				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
594				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
595				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
596				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
597				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
598				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
599				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
600				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
601				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
602				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
603				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
604				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
605				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
606				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
607				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
608				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
609				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
610				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
611				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
612				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
613				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
614			interrupt-names = "ch0", "ch1", "ch2", "ch3",
615					  "ch4", "ch5", "ch6", "ch7",
616					  "ch8", "ch9", "ch10", "ch11",
617					  "ch12", "ch13", "ch14", "ch15",
618					  "ch16", "ch17", "ch18", "ch19",
619					  "ch20", "ch21", "ch22", "ch23",
620					  "ch24";
621			clocks = <&cpg CPG_MOD 812>;
622			clock-names = "fck";
623			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
624			resets = <&cpg 812>;
625			phy-mode = "rgmii";
626			rx-internal-delay-ps = <0>;
627			tx-internal-delay-ps = <0>;
628			iommus = <&ipmmu_rt 3>;
629			#address-cells = <1>;
630			#size-cells = <0>;
631			status = "disabled";
632		};
633
634		pwm0: pwm@e6e30000 {
635			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
636			reg = <0 0xe6e30000 0 8>;
637			#pwm-cells = <2>;
638			clocks = <&cpg CPG_MOD 523>;
639			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
640			resets = <&cpg 523>;
641			status = "disabled";
642		};
643
644		pwm1: pwm@e6e31000 {
645			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
646			reg = <0 0xe6e31000 0 8>;
647			#pwm-cells = <2>;
648			clocks = <&cpg CPG_MOD 523>;
649			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
650			resets = <&cpg 523>;
651			status = "disabled";
652		};
653
654		pwm2: pwm@e6e32000 {
655			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
656			reg = <0 0xe6e32000 0 8>;
657			#pwm-cells = <2>;
658			clocks = <&cpg CPG_MOD 523>;
659			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
660			resets = <&cpg 523>;
661			status = "disabled";
662		};
663
664		pwm3: pwm@e6e33000 {
665			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
666			reg = <0 0xe6e33000 0 8>;
667			#pwm-cells = <2>;
668			clocks = <&cpg CPG_MOD 523>;
669			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
670			resets = <&cpg 523>;
671			status = "disabled";
672		};
673
674		pwm4: pwm@e6e34000 {
675			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
676			reg = <0 0xe6e34000 0 8>;
677			#pwm-cells = <2>;
678			clocks = <&cpg CPG_MOD 523>;
679			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
680			resets = <&cpg 523>;
681			status = "disabled";
682		};
683
684		scif0: serial@e6e60000 {
685			compatible = "renesas,scif-r8a77970",
686				     "renesas,rcar-gen3-scif",
687				     "renesas,scif";
688			reg = <0 0xe6e60000 0 64>;
689			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
690			clocks = <&cpg CPG_MOD 207>,
691				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
692				 <&scif_clk>;
693			clock-names = "fck", "brg_int", "scif_clk";
694			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
695			       <&dmac2 0x51>, <&dmac2 0x50>;
696			dma-names = "tx", "rx", "tx", "rx";
697			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
698			resets = <&cpg 207>;
699			status = "disabled";
700		};
701
702		scif1: serial@e6e68000 {
703			compatible = "renesas,scif-r8a77970",
704				     "renesas,rcar-gen3-scif",
705				     "renesas,scif";
706			reg = <0 0xe6e68000 0 64>;
707			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
708			clocks = <&cpg CPG_MOD 206>,
709				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
710				 <&scif_clk>;
711			clock-names = "fck", "brg_int", "scif_clk";
712			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
713			       <&dmac2 0x53>, <&dmac2 0x52>;
714			dma-names = "tx", "rx", "tx", "rx";
715			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
716			resets = <&cpg 206>;
717			status = "disabled";
718		};
719
720		scif3: serial@e6c50000 {
721			compatible = "renesas,scif-r8a77970",
722				     "renesas,rcar-gen3-scif",
723				     "renesas,scif";
724			reg = <0 0xe6c50000 0 64>;
725			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
726			clocks = <&cpg CPG_MOD 204>,
727				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
728				 <&scif_clk>;
729			clock-names = "fck", "brg_int", "scif_clk";
730			dmas = <&dmac1 0x57>, <&dmac1 0x56>,
731			       <&dmac2 0x57>, <&dmac2 0x56>;
732			dma-names = "tx", "rx", "tx", "rx";
733			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
734			resets = <&cpg 204>;
735			status = "disabled";
736		};
737
738		scif4: serial@e6c40000 {
739			compatible = "renesas,scif-r8a77970",
740				     "renesas,rcar-gen3-scif", "renesas,scif";
741			reg = <0 0xe6c40000 0 64>;
742			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
743			clocks = <&cpg CPG_MOD 203>,
744				 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
745				 <&scif_clk>;
746			clock-names = "fck", "brg_int", "scif_clk";
747			dmas = <&dmac1 0x59>, <&dmac1 0x58>,
748			       <&dmac2 0x59>, <&dmac2 0x58>;
749			dma-names = "tx", "rx", "tx", "rx";
750			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
751			resets = <&cpg 203>;
752			status = "disabled";
753		};
754
755		tpu: pwm@e6e80000 {
756			compatible = "renesas,tpu-r8a77970", "renesas,tpu";
757			reg = <0 0xe6e80000 0 0x148>;
758			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
759			clocks = <&cpg CPG_MOD 304>;
760			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
761			resets = <&cpg 304>;
762			#pwm-cells = <3>;
763			status = "disabled";
764		};
765
766		msiof0: spi@e6e90000 {
767			compatible = "renesas,msiof-r8a77970",
768				     "renesas,rcar-gen3-msiof";
769			reg = <0 0xe6e90000 0 0x64>;
770			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
771			clocks = <&cpg CPG_MOD 211>;
772			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
773			resets = <&cpg 211>;
774			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
775			       <&dmac2 0x41>, <&dmac2 0x40>;
776			dma-names = "tx", "rx", "tx", "rx";
777			#address-cells = <1>;
778			#size-cells = <0>;
779			status = "disabled";
780		};
781
782		msiof1: spi@e6ea0000 {
783			compatible = "renesas,msiof-r8a77970",
784				     "renesas,rcar-gen3-msiof";
785			reg = <0 0xe6ea0000 0 0x0064>;
786			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
787			clocks = <&cpg CPG_MOD 210>;
788			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
789			resets = <&cpg 210>;
790			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
791			       <&dmac2 0x43>, <&dmac2 0x42>;
792			dma-names = "tx", "rx", "tx", "rx";
793			#address-cells = <1>;
794			#size-cells = <0>;
795			status = "disabled";
796		};
797
798		msiof2: spi@e6c00000 {
799			compatible = "renesas,msiof-r8a77970",
800				     "renesas,rcar-gen3-msiof";
801			reg = <0 0xe6c00000 0 0x0064>;
802			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
803			clocks = <&cpg CPG_MOD 209>;
804			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
805			resets = <&cpg 209>;
806			dmas = <&dmac1 0x45>, <&dmac1 0x44>,
807			       <&dmac2 0x45>, <&dmac2 0x44>;
808			dma-names = "tx", "rx", "tx", "rx";
809			#address-cells = <1>;
810			#size-cells = <0>;
811			status = "disabled";
812		};
813
814		msiof3: spi@e6c10000 {
815			compatible = "renesas,msiof-r8a77970",
816				     "renesas,rcar-gen3-msiof";
817			reg = <0 0xe6c10000 0 0x0064>;
818			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
819			clocks = <&cpg CPG_MOD 208>;
820			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
821			resets = <&cpg 208>;
822			dmas = <&dmac1 0x47>, <&dmac1 0x46>,
823			       <&dmac2 0x47>, <&dmac2 0x46>;
824			dma-names = "tx", "rx", "tx", "rx";
825			#address-cells = <1>;
826			#size-cells = <0>;
827			status = "disabled";
828		};
829
830		vin0: video@e6ef0000 {
831			compatible = "renesas,vin-r8a77970";
832			reg = <0 0xe6ef0000 0 0x1000>;
833			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
834			clocks = <&cpg CPG_MOD 811>;
835			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
836			resets = <&cpg 811>;
837			renesas,id = <0>;
838			status = "disabled";
839
840			ports {
841				#address-cells = <1>;
842				#size-cells = <0>;
843
844				port@1 {
845					#address-cells = <1>;
846					#size-cells = <0>;
847
848					reg = <1>;
849
850					vin0csi40: endpoint@2 {
851						reg = <2>;
852						remote-endpoint = <&csi40vin0>;
853					};
854				};
855			};
856		};
857
858		vin1: video@e6ef1000 {
859			compatible = "renesas,vin-r8a77970";
860			reg = <0 0xe6ef1000 0 0x1000>;
861			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
862			clocks = <&cpg CPG_MOD 810>;
863			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
864			resets = <&cpg 810>;
865			renesas,id = <1>;
866			status = "disabled";
867
868			ports {
869				#address-cells = <1>;
870				#size-cells = <0>;
871
872				port@1 {
873					#address-cells = <1>;
874					#size-cells = <0>;
875
876					reg = <1>;
877
878					vin1csi40: endpoint@2 {
879						reg = <2>;
880						remote-endpoint = <&csi40vin1>;
881					};
882				};
883			};
884		};
885
886		vin2: video@e6ef2000 {
887			compatible = "renesas,vin-r8a77970";
888			reg = <0 0xe6ef2000 0 0x1000>;
889			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
890			clocks = <&cpg CPG_MOD 809>;
891			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
892			resets = <&cpg 809>;
893			renesas,id = <2>;
894			status = "disabled";
895
896			ports {
897				#address-cells = <1>;
898				#size-cells = <0>;
899
900				port@1 {
901					#address-cells = <1>;
902					#size-cells = <0>;
903
904					reg = <1>;
905
906					vin2csi40: endpoint@2 {
907						reg = <2>;
908						remote-endpoint = <&csi40vin2>;
909					};
910				};
911			};
912		};
913
914		vin3: video@e6ef3000 {
915			compatible = "renesas,vin-r8a77970";
916			reg = <0 0xe6ef3000 0 0x1000>;
917			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
918			clocks = <&cpg CPG_MOD 808>;
919			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
920			resets = <&cpg 808>;
921			renesas,id = <3>;
922			status = "disabled";
923
924			ports {
925				#address-cells = <1>;
926				#size-cells = <0>;
927
928				port@1 {
929					#address-cells = <1>;
930					#size-cells = <0>;
931
932					reg = <1>;
933
934					vin3csi40: endpoint@2 {
935						reg = <2>;
936						remote-endpoint = <&csi40vin3>;
937					};
938				};
939			};
940		};
941
942		dmac1: dma-controller@e7300000 {
943			compatible = "renesas,dmac-r8a77970",
944				     "renesas,rcar-dmac";
945			reg = <0 0xe7300000 0 0x10000>;
946			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
947				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
948				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
949				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
950				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
951				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
952				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
953				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
954				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
955			interrupt-names = "error",
956					  "ch0", "ch1", "ch2", "ch3",
957					  "ch4", "ch5", "ch6", "ch7";
958			clocks = <&cpg CPG_MOD 218>;
959			clock-names = "fck";
960			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
961			resets = <&cpg 218>;
962			#dma-cells = <1>;
963			dma-channels = <8>;
964			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
965			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
966			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
967			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
968		};
969
970		dmac2: dma-controller@e7310000 {
971			compatible = "renesas,dmac-r8a77970",
972				     "renesas,rcar-dmac";
973			reg = <0 0xe7310000 0 0x10000>;
974			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
975				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
976				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
977				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
978				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
979				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
980				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
981				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
982				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
983			interrupt-names = "error",
984					  "ch0", "ch1", "ch2", "ch3",
985					  "ch4", "ch5", "ch6", "ch7";
986			clocks = <&cpg CPG_MOD 217>;
987			clock-names = "fck";
988			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
989			resets = <&cpg 217>;
990			#dma-cells = <1>;
991			dma-channels = <8>;
992			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
993			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
994			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
995			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
996		};
997
998		ipmmu_ds1: iommu@e7740000 {
999			compatible = "renesas,ipmmu-r8a77970";
1000			reg = <0 0xe7740000 0 0x1000>;
1001			renesas,ipmmu-main = <&ipmmu_mm 0>;
1002			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1003			#iommu-cells = <1>;
1004		};
1005
1006		ipmmu_ir: iommu@ff8b0000 {
1007			compatible = "renesas,ipmmu-r8a77970";
1008			reg = <0 0xff8b0000 0 0x1000>;
1009			renesas,ipmmu-main = <&ipmmu_mm 3>;
1010			power-domains = <&sysc R8A77970_PD_A3IR>;
1011			#iommu-cells = <1>;
1012		};
1013
1014		ipmmu_mm: iommu@e67b0000 {
1015			compatible = "renesas,ipmmu-r8a77970";
1016			reg = <0 0xe67b0000 0 0x1000>;
1017			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1018				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1019			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1020			#iommu-cells = <1>;
1021		};
1022
1023		ipmmu_rt: iommu@ffc80000 {
1024			compatible = "renesas,ipmmu-r8a77970";
1025			reg = <0 0xffc80000 0 0x1000>;
1026			renesas,ipmmu-main = <&ipmmu_mm 7>;
1027			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1028			#iommu-cells = <1>;
1029		};
1030
1031		ipmmu_vi0: iommu@febd0000 {
1032			compatible = "renesas,ipmmu-r8a77970";
1033			reg = <0 0xfebd0000 0 0x1000>;
1034			renesas,ipmmu-main = <&ipmmu_mm 9>;
1035			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1036			#iommu-cells = <1>;
1037		};
1038
1039		mmc0: mmc@ee140000 {
1040			compatible = "renesas,sdhi-r8a77970",
1041				     "renesas,rcar-gen3-sdhi";
1042			reg = <0 0xee140000 0 0x2000>;
1043			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1044			clocks = <&cpg CPG_MOD 314>;
1045			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1046			resets = <&cpg 314>;
1047			max-frequency = <200000000>;
1048			iommus = <&ipmmu_ds1 32>;
1049			status = "disabled";
1050		};
1051
1052		rpc: spi@ee200000 {
1053			compatible = "renesas,r8a77970-rpc-if",
1054				     "renesas,rcar-gen3-rpc-if";
1055			reg = <0 0xee200000 0 0x200>,
1056			      <0 0x08000000 0 0x4000000>,
1057			      <0 0xee208000 0 0x100>;
1058			reg-names = "regs", "dirmap", "wbuf";
1059			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1060			clocks = <&cpg CPG_MOD 917>;
1061			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1062			resets = <&cpg 917>;
1063			#address-cells = <1>;
1064			#size-cells = <0>;
1065			status = "disabled";
1066		};
1067
1068		gic: interrupt-controller@f1010000 {
1069			compatible = "arm,gic-400";
1070			#interrupt-cells = <3>;
1071			#address-cells = <0>;
1072			interrupt-controller;
1073			reg = <0 0xf1010000 0 0x1000>,
1074			      <0 0xf1020000 0 0x20000>,
1075			      <0 0xf1040000 0 0x20000>,
1076			      <0 0xf1060000 0 0x20000>;
1077			interrupts = <GIC_PPI 9	(GIC_CPU_MASK_SIMPLE(2) |
1078				      IRQ_TYPE_LEVEL_HIGH)>;
1079			clocks = <&cpg CPG_MOD 408>;
1080			clock-names = "clk";
1081			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1082			resets = <&cpg 408>;
1083		};
1084
1085		vspd0: vsp@fea20000 {
1086			compatible = "renesas,vsp2";
1087			reg = <0 0xfea20000 0 0x5000>;
1088			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1089			clocks = <&cpg CPG_MOD 623>;
1090			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1091			resets = <&cpg 623>;
1092			renesas,fcp = <&fcpvd0>;
1093		};
1094
1095		fcpvd0: fcp@fea27000 {
1096			compatible = "renesas,fcpv";
1097			reg = <0 0xfea27000 0 0x200>;
1098			clocks = <&cpg CPG_MOD 603>;
1099			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1100			resets = <&cpg 603>;
1101			iommus = <&ipmmu_vi0 8>;
1102		};
1103
1104		csi40: csi2@feaa0000 {
1105			compatible = "renesas,r8a77970-csi2";
1106			reg = <0 0xfeaa0000 0 0x10000>;
1107			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1108			clocks = <&cpg CPG_MOD 716>;
1109			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1110			resets = <&cpg 716>;
1111			status = "disabled";
1112
1113			ports {
1114				#address-cells = <1>;
1115				#size-cells = <0>;
1116
1117				port@0 {
1118					reg = <0>;
1119				};
1120
1121				port@1 {
1122					#address-cells = <1>;
1123					#size-cells = <0>;
1124
1125					reg = <1>;
1126
1127					csi40vin0: endpoint@0 {
1128						reg = <0>;
1129						remote-endpoint = <&vin0csi40>;
1130					};
1131					csi40vin1: endpoint@1 {
1132						reg = <1>;
1133						remote-endpoint = <&vin1csi40>;
1134					};
1135					csi40vin2: endpoint@2 {
1136						reg = <2>;
1137						remote-endpoint = <&vin2csi40>;
1138					};
1139					csi40vin3: endpoint@3 {
1140						reg = <3>;
1141						remote-endpoint = <&vin3csi40>;
1142					};
1143				};
1144			};
1145		};
1146
1147		du: display@feb00000 {
1148			compatible = "renesas,du-r8a77970";
1149			reg = <0 0xfeb00000 0 0x80000>;
1150			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1151			clocks = <&cpg CPG_MOD 724>;
1152			clock-names = "du.0";
1153			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1154			resets = <&cpg 724>;
1155			reset-names = "du.0";
1156			renesas,vsps = <&vspd0 0>;
1157
1158			status = "disabled";
1159
1160			ports {
1161				#address-cells = <1>;
1162				#size-cells = <0>;
1163
1164				port@0 {
1165					reg = <0>;
1166				};
1167
1168				port@1 {
1169					reg = <1>;
1170					du_out_lvds0: endpoint {
1171						remote-endpoint = <&lvds0_in>;
1172					};
1173				};
1174			};
1175		};
1176
1177		lvds0: lvds-encoder@feb90000 {
1178			compatible = "renesas,r8a77970-lvds";
1179			reg = <0 0xfeb90000 0 0x14>;
1180			clocks = <&cpg CPG_MOD 727>;
1181			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1182			resets = <&cpg 727>;
1183			status = "disabled";
1184
1185			ports {
1186				#address-cells = <1>;
1187				#size-cells = <0>;
1188
1189				port@0 {
1190					reg = <0>;
1191					lvds0_in: endpoint {
1192						remote-endpoint =
1193							<&du_out_lvds0>;
1194					};
1195				};
1196				port@1 {
1197					reg = <1>;
1198				};
1199			};
1200		};
1201
1202		prr: chipid@fff00044 {
1203			compatible = "renesas,prr";
1204			reg = <0 0xfff00044 0 4>;
1205			bootph-all;
1206		};
1207	};
1208
1209	thermal-zones {
1210		cpu-thermal {
1211			polling-delay-passive = <250>;
1212			polling-delay = <1000>;
1213			thermal-sensors = <&thermal>;
1214
1215			cooling-maps {
1216			};
1217
1218			trips {
1219				cpu-crit {
1220					temperature = <120000>;
1221					hysteresis = <2000>;
1222					type = "critical";
1223				};
1224			};
1225		};
1226	};
1227
1228	timer {
1229		compatible = "arm,armv8-timer";
1230		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1231				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1232				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1233				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1234		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
1235	};
1236};
1237