1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define SOC_HAS_SATA 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 /* 23 * The external audio clocks are configured as 0 Hz fixed frequency 24 * clocks by default. 25 * Boards that provide audio clocks should override them. 26 */ 27 audio_clk_a: audio_clk_a { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <0>; 31 }; 32 33 audio_clk_b: audio_clk_b { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_c: audio_clk_c { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 /* External CAN clock - to be overridden by boards that provide it */ 46 can_clk: can { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 52 cluster0_opp: opp-table-0 { 53 compatible = "operating-points-v2"; 54 opp-shared; 55 56 opp-500000000 { 57 opp-hz = /bits/ 64 <500000000>; 58 opp-microvolt = <830000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1000000000 { 62 opp-hz = /bits/ 64 <1000000000>; 63 opp-microvolt = <830000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1500000000 { 67 opp-hz = /bits/ 64 <1500000000>; 68 opp-microvolt = <830000>; 69 clock-latency-ns = <300000>; 70 opp-suspend; 71 }; 72 opp-1600000000 { 73 opp-hz = /bits/ 64 <1600000000>; 74 opp-microvolt = <900000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1700000000 { 78 opp-hz = /bits/ 64 <1700000000>; 79 opp-microvolt = <900000>; 80 clock-latency-ns = <300000>; 81 }; 82 opp-1800000000 { 83 opp-hz = /bits/ 64 <1800000000>; 84 opp-microvolt = <960000>; 85 clock-latency-ns = <300000>; 86 turbo-mode; 87 }; 88 }; 89 90 cpus { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 94 a57_0: cpu@0 { 95 compatible = "arm,cortex-a57"; 96 reg = <0x0>; 97 device_type = "cpu"; 98 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 99 next-level-cache = <&L2_CA57>; 100 enable-method = "psci"; 101 cpu-idle-states = <&CPU_SLEEP_0>; 102 #cooling-cells = <2>; 103 dynamic-power-coefficient = <854>; 104 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 105 operating-points-v2 = <&cluster0_opp>; 106 }; 107 108 a57_1: cpu@1 { 109 compatible = "arm,cortex-a57"; 110 reg = <0x1>; 111 device_type = "cpu"; 112 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 113 next-level-cache = <&L2_CA57>; 114 enable-method = "psci"; 115 cpu-idle-states = <&CPU_SLEEP_0>; 116 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 117 operating-points-v2 = <&cluster0_opp>; 118 }; 119 120 L2_CA57: cache-controller-0 { 121 compatible = "cache"; 122 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 123 cache-unified; 124 cache-level = <2>; 125 }; 126 127 idle-states { 128 entry-method = "psci"; 129 130 CPU_SLEEP_0: cpu-sleep-0 { 131 compatible = "arm,idle-state"; 132 arm,psci-suspend-param = <0x0010000>; 133 local-timer-stop; 134 entry-latency-us = <400>; 135 exit-latency-us = <500>; 136 min-residency-us = <4000>; 137 }; 138 }; 139 }; 140 141 extal_clk: extal { 142 compatible = "fixed-clock"; 143 #clock-cells = <0>; 144 /* This value must be overridden by the board */ 145 clock-frequency = <0>; 146 bootph-all; 147 }; 148 149 extalr_clk: extalr { 150 compatible = "fixed-clock"; 151 #clock-cells = <0>; 152 /* This value must be overridden by the board */ 153 clock-frequency = <0>; 154 bootph-all; 155 }; 156 157 /* External PCIe clock - can be overridden by the board */ 158 pcie_bus_clk: pcie_bus { 159 compatible = "fixed-clock"; 160 #clock-cells = <0>; 161 clock-frequency = <0>; 162 }; 163 164 pmu_a57 { 165 compatible = "arm,cortex-a57-pmu"; 166 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 167 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 168 interrupt-affinity = <&a57_0>, 169 <&a57_1>; 170 }; 171 172 psci { 173 compatible = "arm,psci-1.0", "arm,psci-0.2"; 174 method = "smc"; 175 }; 176 177 /* External SCIF clock - to be overridden by boards that provide it */ 178 scif_clk: scif { 179 compatible = "fixed-clock"; 180 #clock-cells = <0>; 181 clock-frequency = <0>; 182 }; 183 184 soc { 185 compatible = "simple-bus"; 186 interrupt-parent = <&gic>; 187 bootph-all; 188 189 #address-cells = <2>; 190 #size-cells = <2>; 191 ranges; 192 193 rwdt: watchdog@e6020000 { 194 compatible = "renesas,r8a77965-wdt", 195 "renesas,rcar-gen3-wdt"; 196 reg = <0 0xe6020000 0 0x0c>; 197 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 198 clocks = <&cpg CPG_MOD 402>; 199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 200 resets = <&cpg 402>; 201 status = "disabled"; 202 }; 203 204 gpio0: gpio@e6050000 { 205 compatible = "renesas,gpio-r8a77965", 206 "renesas,rcar-gen3-gpio"; 207 reg = <0 0xe6050000 0 0x50>; 208 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 209 #gpio-cells = <2>; 210 gpio-controller; 211 gpio-ranges = <&pfc 0 0 16>; 212 #interrupt-cells = <2>; 213 interrupt-controller; 214 clocks = <&cpg CPG_MOD 912>; 215 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 216 resets = <&cpg 912>; 217 }; 218 219 gpio1: gpio@e6051000 { 220 compatible = "renesas,gpio-r8a77965", 221 "renesas,rcar-gen3-gpio"; 222 reg = <0 0xe6051000 0 0x50>; 223 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 224 #gpio-cells = <2>; 225 gpio-controller; 226 gpio-ranges = <&pfc 0 32 29>; 227 #interrupt-cells = <2>; 228 interrupt-controller; 229 clocks = <&cpg CPG_MOD 911>; 230 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 231 resets = <&cpg 911>; 232 }; 233 234 gpio2: gpio@e6052000 { 235 compatible = "renesas,gpio-r8a77965", 236 "renesas,rcar-gen3-gpio"; 237 reg = <0 0xe6052000 0 0x50>; 238 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 239 #gpio-cells = <2>; 240 gpio-controller; 241 gpio-ranges = <&pfc 0 64 15>; 242 #interrupt-cells = <2>; 243 interrupt-controller; 244 clocks = <&cpg CPG_MOD 910>; 245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 246 resets = <&cpg 910>; 247 }; 248 249 gpio3: gpio@e6053000 { 250 compatible = "renesas,gpio-r8a77965", 251 "renesas,rcar-gen3-gpio"; 252 reg = <0 0xe6053000 0 0x50>; 253 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 254 #gpio-cells = <2>; 255 gpio-controller; 256 gpio-ranges = <&pfc 0 96 16>; 257 #interrupt-cells = <2>; 258 interrupt-controller; 259 clocks = <&cpg CPG_MOD 909>; 260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 261 resets = <&cpg 909>; 262 }; 263 264 gpio4: gpio@e6054000 { 265 compatible = "renesas,gpio-r8a77965", 266 "renesas,rcar-gen3-gpio"; 267 reg = <0 0xe6054000 0 0x50>; 268 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 269 #gpio-cells = <2>; 270 gpio-controller; 271 gpio-ranges = <&pfc 0 128 18>; 272 #interrupt-cells = <2>; 273 interrupt-controller; 274 clocks = <&cpg CPG_MOD 908>; 275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 276 resets = <&cpg 908>; 277 }; 278 279 gpio5: gpio@e6055000 { 280 compatible = "renesas,gpio-r8a77965", 281 "renesas,rcar-gen3-gpio"; 282 reg = <0 0xe6055000 0 0x50>; 283 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 284 #gpio-cells = <2>; 285 gpio-controller; 286 gpio-ranges = <&pfc 0 160 26>; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 clocks = <&cpg CPG_MOD 907>; 290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 291 resets = <&cpg 907>; 292 }; 293 294 gpio6: gpio@e6055400 { 295 compatible = "renesas,gpio-r8a77965", 296 "renesas,rcar-gen3-gpio"; 297 reg = <0 0xe6055400 0 0x50>; 298 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 299 #gpio-cells = <2>; 300 gpio-controller; 301 gpio-ranges = <&pfc 0 192 32>; 302 #interrupt-cells = <2>; 303 interrupt-controller; 304 clocks = <&cpg CPG_MOD 906>; 305 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 306 resets = <&cpg 906>; 307 }; 308 309 gpio7: gpio@e6055800 { 310 compatible = "renesas,gpio-r8a77965", 311 "renesas,rcar-gen3-gpio"; 312 reg = <0 0xe6055800 0 0x50>; 313 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 314 #gpio-cells = <2>; 315 gpio-controller; 316 gpio-ranges = <&pfc 0 224 4>; 317 #interrupt-cells = <2>; 318 interrupt-controller; 319 clocks = <&cpg CPG_MOD 905>; 320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 321 resets = <&cpg 905>; 322 }; 323 324 pfc: pinctrl@e6060000 { 325 compatible = "renesas,pfc-r8a77965"; 326 reg = <0 0xe6060000 0 0x50c>; 327 bootph-all; 328 }; 329 330 cmt0: timer@e60f0000 { 331 compatible = "renesas,r8a77965-cmt0", 332 "renesas,rcar-gen3-cmt0"; 333 reg = <0 0xe60f0000 0 0x1004>; 334 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 336 clocks = <&cpg CPG_MOD 303>; 337 clock-names = "fck"; 338 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 339 resets = <&cpg 303>; 340 status = "disabled"; 341 }; 342 343 cmt1: timer@e6130000 { 344 compatible = "renesas,r8a77965-cmt1", 345 "renesas,rcar-gen3-cmt1"; 346 reg = <0 0xe6130000 0 0x1004>; 347 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 355 clocks = <&cpg CPG_MOD 302>; 356 clock-names = "fck"; 357 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 358 resets = <&cpg 302>; 359 status = "disabled"; 360 }; 361 362 cmt2: timer@e6140000 { 363 compatible = "renesas,r8a77965-cmt1", 364 "renesas,rcar-gen3-cmt1"; 365 reg = <0 0xe6140000 0 0x1004>; 366 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 372 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 373 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 374 clocks = <&cpg CPG_MOD 301>; 375 clock-names = "fck"; 376 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 377 resets = <&cpg 301>; 378 status = "disabled"; 379 }; 380 381 cmt3: timer@e6148000 { 382 compatible = "renesas,r8a77965-cmt1", 383 "renesas,rcar-gen3-cmt1"; 384 reg = <0 0xe6148000 0 0x1004>; 385 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 390 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 391 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 392 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 393 clocks = <&cpg CPG_MOD 300>; 394 clock-names = "fck"; 395 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 396 resets = <&cpg 300>; 397 status = "disabled"; 398 }; 399 400 cpg: clock-controller@e6150000 { 401 compatible = "renesas,r8a77965-cpg-mssr"; 402 reg = <0 0xe6150000 0 0x1000>; 403 clocks = <&extal_clk>, <&extalr_clk>; 404 clock-names = "extal", "extalr"; 405 #clock-cells = <2>; 406 #power-domain-cells = <0>; 407 #reset-cells = <1>; 408 bootph-all; 409 }; 410 411 rst: reset-controller@e6160000 { 412 compatible = "renesas,r8a77965-rst"; 413 reg = <0 0xe6160000 0 0x0200>; 414 bootph-all; 415 }; 416 417 sysc: system-controller@e6180000 { 418 compatible = "renesas,r8a77965-sysc"; 419 reg = <0 0xe6180000 0 0x0400>; 420 #power-domain-cells = <1>; 421 }; 422 423 tsc: thermal@e6198000 { 424 compatible = "renesas,r8a77965-thermal"; 425 reg = <0 0xe6198000 0 0x100>, 426 <0 0xe61a0000 0 0x100>, 427 <0 0xe61a8000 0 0x100>; 428 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 429 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 430 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 431 clocks = <&cpg CPG_MOD 522>; 432 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 433 resets = <&cpg 522>; 434 #thermal-sensor-cells = <1>; 435 }; 436 437 intc_ex: interrupt-controller@e61c0000 { 438 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 439 #interrupt-cells = <2>; 440 interrupt-controller; 441 reg = <0 0xe61c0000 0 0x200>; 442 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 444 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 445 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 446 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 447 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 448 clocks = <&cpg CPG_MOD 407>; 449 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 450 resets = <&cpg 407>; 451 }; 452 453 tmu0: timer@e61e0000 { 454 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 455 reg = <0 0xe61e0000 0 0x30>; 456 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 457 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 458 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 459 interrupt-names = "tuni0", "tuni1", "tuni2"; 460 clocks = <&cpg CPG_MOD 125>; 461 clock-names = "fck"; 462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 463 resets = <&cpg 125>; 464 status = "disabled"; 465 }; 466 467 tmu1: timer@e6fc0000 { 468 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 469 reg = <0 0xe6fc0000 0 0x30>; 470 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 471 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 473 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 474 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 475 clocks = <&cpg CPG_MOD 124>; 476 clock-names = "fck"; 477 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 478 resets = <&cpg 124>; 479 status = "disabled"; 480 }; 481 482 tmu2: timer@e6fd0000 { 483 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 484 reg = <0 0xe6fd0000 0 0x30>; 485 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 489 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 490 clocks = <&cpg CPG_MOD 123>; 491 clock-names = "fck"; 492 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 493 resets = <&cpg 123>; 494 status = "disabled"; 495 }; 496 497 tmu3: timer@e6fe0000 { 498 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 499 reg = <0 0xe6fe0000 0 0x30>; 500 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 503 interrupt-names = "tuni0", "tuni1", "tuni2"; 504 clocks = <&cpg CPG_MOD 122>; 505 clock-names = "fck"; 506 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 507 resets = <&cpg 122>; 508 status = "disabled"; 509 }; 510 511 tmu4: timer@ffc00000 { 512 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 513 reg = <0 0xffc00000 0 0x30>; 514 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 517 interrupt-names = "tuni0", "tuni1", "tuni2"; 518 clocks = <&cpg CPG_MOD 121>; 519 clock-names = "fck"; 520 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 521 resets = <&cpg 121>; 522 status = "disabled"; 523 }; 524 525 i2c0: i2c@e6500000 { 526 #address-cells = <1>; 527 #size-cells = <0>; 528 compatible = "renesas,i2c-r8a77965", 529 "renesas,rcar-gen3-i2c"; 530 reg = <0 0xe6500000 0 0x40>; 531 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&cpg CPG_MOD 931>; 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 534 resets = <&cpg 931>; 535 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 536 <&dmac2 0x91>, <&dmac2 0x90>; 537 dma-names = "tx", "rx", "tx", "rx"; 538 i2c-scl-internal-delay-ns = <110>; 539 status = "disabled"; 540 }; 541 542 i2c1: i2c@e6508000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "renesas,i2c-r8a77965", 546 "renesas,rcar-gen3-i2c"; 547 reg = <0 0xe6508000 0 0x40>; 548 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&cpg CPG_MOD 930>; 550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 551 resets = <&cpg 930>; 552 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 553 <&dmac2 0x93>, <&dmac2 0x92>; 554 dma-names = "tx", "rx", "tx", "rx"; 555 i2c-scl-internal-delay-ns = <6>; 556 status = "disabled"; 557 }; 558 559 i2c2: i2c@e6510000 { 560 #address-cells = <1>; 561 #size-cells = <0>; 562 compatible = "renesas,i2c-r8a77965", 563 "renesas,rcar-gen3-i2c"; 564 reg = <0 0xe6510000 0 0x40>; 565 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 929>; 567 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 568 resets = <&cpg 929>; 569 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 570 <&dmac2 0x95>, <&dmac2 0x94>; 571 dma-names = "tx", "rx", "tx", "rx"; 572 i2c-scl-internal-delay-ns = <6>; 573 status = "disabled"; 574 }; 575 576 i2c3: i2c@e66d0000 { 577 #address-cells = <1>; 578 #size-cells = <0>; 579 compatible = "renesas,i2c-r8a77965", 580 "renesas,rcar-gen3-i2c"; 581 reg = <0 0xe66d0000 0 0x40>; 582 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 928>; 584 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 585 resets = <&cpg 928>; 586 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 587 dma-names = "tx", "rx"; 588 i2c-scl-internal-delay-ns = <110>; 589 status = "disabled"; 590 }; 591 592 i2c4: i2c@e66d8000 { 593 #address-cells = <1>; 594 #size-cells = <0>; 595 compatible = "renesas,i2c-r8a77965", 596 "renesas,rcar-gen3-i2c"; 597 reg = <0 0xe66d8000 0 0x40>; 598 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&cpg CPG_MOD 927>; 600 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 601 resets = <&cpg 927>; 602 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 603 dma-names = "tx", "rx"; 604 i2c-scl-internal-delay-ns = <110>; 605 status = "disabled"; 606 }; 607 608 i2c5: i2c@e66e0000 { 609 #address-cells = <1>; 610 #size-cells = <0>; 611 compatible = "renesas,i2c-r8a77965", 612 "renesas,rcar-gen3-i2c"; 613 reg = <0 0xe66e0000 0 0x40>; 614 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 615 clocks = <&cpg CPG_MOD 919>; 616 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 617 resets = <&cpg 919>; 618 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 619 dma-names = "tx", "rx"; 620 i2c-scl-internal-delay-ns = <110>; 621 status = "disabled"; 622 }; 623 624 i2c6: i2c@e66e8000 { 625 #address-cells = <1>; 626 #size-cells = <0>; 627 compatible = "renesas,i2c-r8a77965", 628 "renesas,rcar-gen3-i2c"; 629 reg = <0 0xe66e8000 0 0x40>; 630 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 918>; 632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 633 resets = <&cpg 918>; 634 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 635 dma-names = "tx", "rx"; 636 i2c-scl-internal-delay-ns = <6>; 637 status = "disabled"; 638 }; 639 640 i2c_dvfs: i2c@e60b0000 { 641 #address-cells = <1>; 642 #size-cells = <0>; 643 compatible = "renesas,iic-r8a77965", 644 "renesas,rcar-gen3-iic", 645 "renesas,rmobile-iic"; 646 reg = <0 0xe60b0000 0 0x425>; 647 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 926>; 649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 650 resets = <&cpg 926>; 651 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 652 dma-names = "tx", "rx"; 653 status = "disabled"; 654 }; 655 656 hscif0: serial@e6540000 { 657 compatible = "renesas,hscif-r8a77965", 658 "renesas,rcar-gen3-hscif", 659 "renesas,hscif"; 660 reg = <0 0xe6540000 0 0x60>; 661 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 520>, 663 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 664 <&scif_clk>; 665 clock-names = "fck", "brg_int", "scif_clk"; 666 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 667 <&dmac2 0x31>, <&dmac2 0x30>; 668 dma-names = "tx", "rx", "tx", "rx"; 669 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 670 resets = <&cpg 520>; 671 status = "disabled"; 672 }; 673 674 hscif1: serial@e6550000 { 675 compatible = "renesas,hscif-r8a77965", 676 "renesas,rcar-gen3-hscif", 677 "renesas,hscif"; 678 reg = <0 0xe6550000 0 0x60>; 679 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 680 clocks = <&cpg CPG_MOD 519>, 681 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 682 <&scif_clk>; 683 clock-names = "fck", "brg_int", "scif_clk"; 684 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 685 <&dmac2 0x33>, <&dmac2 0x32>; 686 dma-names = "tx", "rx", "tx", "rx"; 687 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 688 resets = <&cpg 519>; 689 status = "disabled"; 690 }; 691 692 hscif2: serial@e6560000 { 693 compatible = "renesas,hscif-r8a77965", 694 "renesas,rcar-gen3-hscif", 695 "renesas,hscif"; 696 reg = <0 0xe6560000 0 0x60>; 697 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 698 clocks = <&cpg CPG_MOD 518>, 699 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 700 <&scif_clk>; 701 clock-names = "fck", "brg_int", "scif_clk"; 702 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 703 <&dmac2 0x35>, <&dmac2 0x34>; 704 dma-names = "tx", "rx", "tx", "rx"; 705 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 706 resets = <&cpg 518>; 707 status = "disabled"; 708 }; 709 710 hscif3: serial@e66a0000 { 711 compatible = "renesas,hscif-r8a77965", 712 "renesas,rcar-gen3-hscif", 713 "renesas,hscif"; 714 reg = <0 0xe66a0000 0 0x60>; 715 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&cpg CPG_MOD 517>, 717 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 718 <&scif_clk>; 719 clock-names = "fck", "brg_int", "scif_clk"; 720 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 721 dma-names = "tx", "rx"; 722 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 723 resets = <&cpg 517>; 724 status = "disabled"; 725 }; 726 727 hscif4: serial@e66b0000 { 728 compatible = "renesas,hscif-r8a77965", 729 "renesas,rcar-gen3-hscif", 730 "renesas,hscif"; 731 reg = <0 0xe66b0000 0 0x60>; 732 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 733 clocks = <&cpg CPG_MOD 516>, 734 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 735 <&scif_clk>; 736 clock-names = "fck", "brg_int", "scif_clk"; 737 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 738 dma-names = "tx", "rx"; 739 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 740 resets = <&cpg 516>; 741 status = "disabled"; 742 }; 743 744 hsusb: usb@e6590000 { 745 compatible = "renesas,usbhs-r8a77965", 746 "renesas,rcar-gen3-usbhs"; 747 reg = <0 0xe6590000 0 0x200>; 748 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 749 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 750 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 751 <&usb_dmac1 0>, <&usb_dmac1 1>; 752 dma-names = "ch0", "ch1", "ch2", "ch3"; 753 renesas,buswait = <11>; 754 phys = <&usb2_phy0 3>; 755 phy-names = "usb"; 756 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 757 resets = <&cpg 704>, <&cpg 703>; 758 status = "disabled"; 759 }; 760 761 usb_dmac0: dma-controller@e65a0000 { 762 compatible = "renesas,r8a77965-usb-dmac", 763 "renesas,usb-dmac"; 764 reg = <0 0xe65a0000 0 0x100>; 765 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 767 interrupt-names = "ch0", "ch1"; 768 clocks = <&cpg CPG_MOD 330>; 769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 770 resets = <&cpg 330>; 771 #dma-cells = <1>; 772 dma-channels = <2>; 773 }; 774 775 usb_dmac1: dma-controller@e65b0000 { 776 compatible = "renesas,r8a77965-usb-dmac", 777 "renesas,usb-dmac"; 778 reg = <0 0xe65b0000 0 0x100>; 779 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 781 interrupt-names = "ch0", "ch1"; 782 clocks = <&cpg CPG_MOD 331>; 783 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 784 resets = <&cpg 331>; 785 #dma-cells = <1>; 786 dma-channels = <2>; 787 }; 788 789 usb3_phy0: usb-phy@e65ee000 { 790 compatible = "renesas,r8a77965-usb3-phy", 791 "renesas,rcar-gen3-usb3-phy"; 792 reg = <0 0xe65ee000 0 0x90>; 793 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 794 <&usb_extal_clk>; 795 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 797 resets = <&cpg 328>; 798 #phy-cells = <0>; 799 status = "disabled"; 800 }; 801 802 arm_cc630p: crypto@e6601000 { 803 compatible = "arm,cryptocell-630p-ree"; 804 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 805 reg = <0x0 0xe6601000 0 0x1000>; 806 clocks = <&cpg CPG_MOD 229>; 807 resets = <&cpg 229>; 808 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 809 }; 810 811 dmac0: dma-controller@e6700000 { 812 compatible = "renesas,dmac-r8a77965", 813 "renesas,rcar-dmac"; 814 reg = <0 0xe6700000 0 0x10000>; 815 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 832 interrupt-names = "error", 833 "ch0", "ch1", "ch2", "ch3", 834 "ch4", "ch5", "ch6", "ch7", 835 "ch8", "ch9", "ch10", "ch11", 836 "ch12", "ch13", "ch14", "ch15"; 837 clocks = <&cpg CPG_MOD 219>; 838 clock-names = "fck"; 839 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 840 resets = <&cpg 219>; 841 #dma-cells = <1>; 842 dma-channels = <16>; 843 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 844 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 845 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 846 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 847 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 848 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 849 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 850 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 851 }; 852 853 dmac1: dma-controller@e7300000 { 854 compatible = "renesas,dmac-r8a77965", 855 "renesas,rcar-dmac"; 856 reg = <0 0xe7300000 0 0x10000>; 857 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 874 interrupt-names = "error", 875 "ch0", "ch1", "ch2", "ch3", 876 "ch4", "ch5", "ch6", "ch7", 877 "ch8", "ch9", "ch10", "ch11", 878 "ch12", "ch13", "ch14", "ch15"; 879 clocks = <&cpg CPG_MOD 218>; 880 clock-names = "fck"; 881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 882 resets = <&cpg 218>; 883 #dma-cells = <1>; 884 dma-channels = <16>; 885 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 886 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 887 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 888 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 889 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 890 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 891 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 892 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 893 }; 894 895 dmac2: dma-controller@e7310000 { 896 compatible = "renesas,dmac-r8a77965", 897 "renesas,rcar-dmac"; 898 reg = <0 0xe7310000 0 0x10000>; 899 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 916 interrupt-names = "error", 917 "ch0", "ch1", "ch2", "ch3", 918 "ch4", "ch5", "ch6", "ch7", 919 "ch8", "ch9", "ch10", "ch11", 920 "ch12", "ch13", "ch14", "ch15"; 921 clocks = <&cpg CPG_MOD 217>; 922 clock-names = "fck"; 923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 924 resets = <&cpg 217>; 925 #dma-cells = <1>; 926 dma-channels = <16>; 927 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 928 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 929 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 930 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 931 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 932 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 933 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 934 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 935 }; 936 937 ipmmu_ds0: iommu@e6740000 { 938 compatible = "renesas,ipmmu-r8a77965"; 939 reg = <0 0xe6740000 0 0x1000>; 940 renesas,ipmmu-main = <&ipmmu_mm 0>; 941 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 942 #iommu-cells = <1>; 943 }; 944 945 ipmmu_ds1: iommu@e7740000 { 946 compatible = "renesas,ipmmu-r8a77965"; 947 reg = <0 0xe7740000 0 0x1000>; 948 renesas,ipmmu-main = <&ipmmu_mm 1>; 949 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 950 #iommu-cells = <1>; 951 }; 952 953 ipmmu_hc: iommu@e6570000 { 954 compatible = "renesas,ipmmu-r8a77965"; 955 reg = <0 0xe6570000 0 0x1000>; 956 renesas,ipmmu-main = <&ipmmu_mm 2>; 957 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 958 #iommu-cells = <1>; 959 }; 960 961 ipmmu_mm: iommu@e67b0000 { 962 compatible = "renesas,ipmmu-r8a77965"; 963 reg = <0 0xe67b0000 0 0x1000>; 964 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 966 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 967 #iommu-cells = <1>; 968 }; 969 970 ipmmu_mp: iommu@ec670000 { 971 compatible = "renesas,ipmmu-r8a77965"; 972 reg = <0 0xec670000 0 0x1000>; 973 renesas,ipmmu-main = <&ipmmu_mm 4>; 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 975 #iommu-cells = <1>; 976 }; 977 978 ipmmu_pv0: iommu@fd800000 { 979 compatible = "renesas,ipmmu-r8a77965"; 980 reg = <0 0xfd800000 0 0x1000>; 981 renesas,ipmmu-main = <&ipmmu_mm 6>; 982 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 983 #iommu-cells = <1>; 984 }; 985 986 ipmmu_rt: iommu@ffc80000 { 987 compatible = "renesas,ipmmu-r8a77965"; 988 reg = <0 0xffc80000 0 0x1000>; 989 renesas,ipmmu-main = <&ipmmu_mm 10>; 990 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 991 #iommu-cells = <1>; 992 }; 993 994 ipmmu_vc0: iommu@fe6b0000 { 995 compatible = "renesas,ipmmu-r8a77965"; 996 reg = <0 0xfe6b0000 0 0x1000>; 997 renesas,ipmmu-main = <&ipmmu_mm 12>; 998 power-domains = <&sysc R8A77965_PD_A3VC>; 999 #iommu-cells = <1>; 1000 }; 1001 1002 ipmmu_vi0: iommu@febd0000 { 1003 compatible = "renesas,ipmmu-r8a77965"; 1004 reg = <0 0xfebd0000 0 0x1000>; 1005 renesas,ipmmu-main = <&ipmmu_mm 14>; 1006 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1007 #iommu-cells = <1>; 1008 }; 1009 1010 ipmmu_vp0: iommu@fe990000 { 1011 compatible = "renesas,ipmmu-r8a77965"; 1012 reg = <0 0xfe990000 0 0x1000>; 1013 renesas,ipmmu-main = <&ipmmu_mm 16>; 1014 power-domains = <&sysc R8A77965_PD_A3VP>; 1015 #iommu-cells = <1>; 1016 }; 1017 1018 avb: ethernet@e6800000 { 1019 compatible = "renesas,etheravb-r8a77965", 1020 "renesas,etheravb-rcar-gen3"; 1021 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1022 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1047 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1048 "ch4", "ch5", "ch6", "ch7", 1049 "ch8", "ch9", "ch10", "ch11", 1050 "ch12", "ch13", "ch14", "ch15", 1051 "ch16", "ch17", "ch18", "ch19", 1052 "ch20", "ch21", "ch22", "ch23", 1053 "ch24"; 1054 clocks = <&cpg CPG_MOD 812>; 1055 clock-names = "fck"; 1056 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1057 resets = <&cpg 812>; 1058 phy-mode = "rgmii"; 1059 rx-internal-delay-ps = <0>; 1060 tx-internal-delay-ps = <0>; 1061 iommus = <&ipmmu_ds0 16>; 1062 #address-cells = <1>; 1063 #size-cells = <0>; 1064 status = "disabled"; 1065 }; 1066 1067 can0: can@e6c30000 { 1068 compatible = "renesas,can-r8a77965", 1069 "renesas,rcar-gen3-can"; 1070 reg = <0 0xe6c30000 0 0x1000>; 1071 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1072 clocks = <&cpg CPG_MOD 916>, 1073 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1074 <&can_clk>; 1075 clock-names = "clkp1", "clkp2", "can_clk"; 1076 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1077 assigned-clock-rates = <40000000>; 1078 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1079 resets = <&cpg 916>; 1080 status = "disabled"; 1081 }; 1082 1083 can1: can@e6c38000 { 1084 compatible = "renesas,can-r8a77965", 1085 "renesas,rcar-gen3-can"; 1086 reg = <0 0xe6c38000 0 0x1000>; 1087 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1088 clocks = <&cpg CPG_MOD 915>, 1089 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1090 <&can_clk>; 1091 clock-names = "clkp1", "clkp2", "can_clk"; 1092 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1093 assigned-clock-rates = <40000000>; 1094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1095 resets = <&cpg 915>; 1096 status = "disabled"; 1097 }; 1098 1099 canfd: can@e66c0000 { 1100 compatible = "renesas,r8a77965-canfd", 1101 "renesas,rcar-gen3-canfd"; 1102 reg = <0 0xe66c0000 0 0x8000>; 1103 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1104 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1105 interrupt-names = "ch_int", "g_int"; 1106 clocks = <&cpg CPG_MOD 914>, 1107 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1108 <&can_clk>; 1109 clock-names = "fck", "canfd", "can_clk"; 1110 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1111 assigned-clock-rates = <40000000>; 1112 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1113 resets = <&cpg 914>; 1114 status = "disabled"; 1115 1116 channel0 { 1117 status = "disabled"; 1118 }; 1119 1120 channel1 { 1121 status = "disabled"; 1122 }; 1123 }; 1124 1125 pwm0: pwm@e6e30000 { 1126 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1127 reg = <0 0xe6e30000 0 8>; 1128 #pwm-cells = <2>; 1129 clocks = <&cpg CPG_MOD 523>; 1130 resets = <&cpg 523>; 1131 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1132 status = "disabled"; 1133 }; 1134 1135 pwm1: pwm@e6e31000 { 1136 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1137 reg = <0 0xe6e31000 0 8>; 1138 #pwm-cells = <2>; 1139 clocks = <&cpg CPG_MOD 523>; 1140 resets = <&cpg 523>; 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1142 status = "disabled"; 1143 }; 1144 1145 pwm2: pwm@e6e32000 { 1146 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1147 reg = <0 0xe6e32000 0 8>; 1148 #pwm-cells = <2>; 1149 clocks = <&cpg CPG_MOD 523>; 1150 resets = <&cpg 523>; 1151 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1152 status = "disabled"; 1153 }; 1154 1155 pwm3: pwm@e6e33000 { 1156 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1157 reg = <0 0xe6e33000 0 8>; 1158 #pwm-cells = <2>; 1159 clocks = <&cpg CPG_MOD 523>; 1160 resets = <&cpg 523>; 1161 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1162 status = "disabled"; 1163 }; 1164 1165 pwm4: pwm@e6e34000 { 1166 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1167 reg = <0 0xe6e34000 0 8>; 1168 #pwm-cells = <2>; 1169 clocks = <&cpg CPG_MOD 523>; 1170 resets = <&cpg 523>; 1171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1172 status = "disabled"; 1173 }; 1174 1175 pwm5: pwm@e6e35000 { 1176 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1177 reg = <0 0xe6e35000 0 8>; 1178 #pwm-cells = <2>; 1179 clocks = <&cpg CPG_MOD 523>; 1180 resets = <&cpg 523>; 1181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1182 status = "disabled"; 1183 }; 1184 1185 pwm6: pwm@e6e36000 { 1186 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1187 reg = <0 0xe6e36000 0 8>; 1188 #pwm-cells = <2>; 1189 clocks = <&cpg CPG_MOD 523>; 1190 resets = <&cpg 523>; 1191 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1192 status = "disabled"; 1193 }; 1194 1195 scif0: serial@e6e60000 { 1196 compatible = "renesas,scif-r8a77965", 1197 "renesas,rcar-gen3-scif", "renesas,scif"; 1198 reg = <0 0xe6e60000 0 64>; 1199 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1200 clocks = <&cpg CPG_MOD 207>, 1201 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1202 <&scif_clk>; 1203 clock-names = "fck", "brg_int", "scif_clk"; 1204 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1205 <&dmac2 0x51>, <&dmac2 0x50>; 1206 dma-names = "tx", "rx", "tx", "rx"; 1207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1208 resets = <&cpg 207>; 1209 status = "disabled"; 1210 }; 1211 1212 scif1: serial@e6e68000 { 1213 compatible = "renesas,scif-r8a77965", 1214 "renesas,rcar-gen3-scif", "renesas,scif"; 1215 reg = <0 0xe6e68000 0 64>; 1216 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1217 clocks = <&cpg CPG_MOD 206>, 1218 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1219 <&scif_clk>; 1220 clock-names = "fck", "brg_int", "scif_clk"; 1221 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1222 <&dmac2 0x53>, <&dmac2 0x52>; 1223 dma-names = "tx", "rx", "tx", "rx"; 1224 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1225 resets = <&cpg 206>; 1226 status = "disabled"; 1227 }; 1228 1229 scif2: serial@e6e88000 { 1230 compatible = "renesas,scif-r8a77965", 1231 "renesas,rcar-gen3-scif", "renesas,scif"; 1232 reg = <0 0xe6e88000 0 64>; 1233 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1234 clocks = <&cpg CPG_MOD 310>, 1235 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1236 <&scif_clk>; 1237 clock-names = "fck", "brg_int", "scif_clk"; 1238 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1239 <&dmac2 0x13>, <&dmac2 0x12>; 1240 dma-names = "tx", "rx", "tx", "rx"; 1241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1242 resets = <&cpg 310>; 1243 status = "disabled"; 1244 }; 1245 1246 scif3: serial@e6c50000 { 1247 compatible = "renesas,scif-r8a77965", 1248 "renesas,rcar-gen3-scif", "renesas,scif"; 1249 reg = <0 0xe6c50000 0 64>; 1250 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1251 clocks = <&cpg CPG_MOD 204>, 1252 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1253 <&scif_clk>; 1254 clock-names = "fck", "brg_int", "scif_clk"; 1255 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1256 dma-names = "tx", "rx"; 1257 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1258 resets = <&cpg 204>; 1259 status = "disabled"; 1260 }; 1261 1262 scif4: serial@e6c40000 { 1263 compatible = "renesas,scif-r8a77965", 1264 "renesas,rcar-gen3-scif", "renesas,scif"; 1265 reg = <0 0xe6c40000 0 64>; 1266 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1267 clocks = <&cpg CPG_MOD 203>, 1268 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1269 <&scif_clk>; 1270 clock-names = "fck", "brg_int", "scif_clk"; 1271 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1272 dma-names = "tx", "rx"; 1273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1274 resets = <&cpg 203>; 1275 status = "disabled"; 1276 }; 1277 1278 scif5: serial@e6f30000 { 1279 compatible = "renesas,scif-r8a77965", 1280 "renesas,rcar-gen3-scif", "renesas,scif"; 1281 reg = <0 0xe6f30000 0 64>; 1282 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 202>, 1284 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1285 <&scif_clk>; 1286 clock-names = "fck", "brg_int", "scif_clk"; 1287 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1288 <&dmac2 0x5b>, <&dmac2 0x5a>; 1289 dma-names = "tx", "rx", "tx", "rx"; 1290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1291 resets = <&cpg 202>; 1292 status = "disabled"; 1293 }; 1294 1295 tpu: pwm@e6e80000 { 1296 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1297 reg = <0 0xe6e80000 0 0x148>; 1298 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1299 clocks = <&cpg CPG_MOD 304>; 1300 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1301 resets = <&cpg 304>; 1302 #pwm-cells = <3>; 1303 status = "disabled"; 1304 }; 1305 1306 msiof0: spi@e6e90000 { 1307 compatible = "renesas,msiof-r8a77965", 1308 "renesas,rcar-gen3-msiof"; 1309 reg = <0 0xe6e90000 0 0x0064>; 1310 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1311 clocks = <&cpg CPG_MOD 211>; 1312 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1313 <&dmac2 0x41>, <&dmac2 0x40>; 1314 dma-names = "tx", "rx", "tx", "rx"; 1315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1316 resets = <&cpg 211>; 1317 #address-cells = <1>; 1318 #size-cells = <0>; 1319 status = "disabled"; 1320 }; 1321 1322 msiof1: spi@e6ea0000 { 1323 compatible = "renesas,msiof-r8a77965", 1324 "renesas,rcar-gen3-msiof"; 1325 reg = <0 0xe6ea0000 0 0x0064>; 1326 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1327 clocks = <&cpg CPG_MOD 210>; 1328 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1329 <&dmac2 0x43>, <&dmac2 0x42>; 1330 dma-names = "tx", "rx", "tx", "rx"; 1331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1332 resets = <&cpg 210>; 1333 #address-cells = <1>; 1334 #size-cells = <0>; 1335 status = "disabled"; 1336 }; 1337 1338 msiof2: spi@e6c00000 { 1339 compatible = "renesas,msiof-r8a77965", 1340 "renesas,rcar-gen3-msiof"; 1341 reg = <0 0xe6c00000 0 0x0064>; 1342 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1343 clocks = <&cpg CPG_MOD 209>; 1344 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1345 dma-names = "tx", "rx"; 1346 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1347 resets = <&cpg 209>; 1348 #address-cells = <1>; 1349 #size-cells = <0>; 1350 status = "disabled"; 1351 }; 1352 1353 msiof3: spi@e6c10000 { 1354 compatible = "renesas,msiof-r8a77965", 1355 "renesas,rcar-gen3-msiof"; 1356 reg = <0 0xe6c10000 0 0x0064>; 1357 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1358 clocks = <&cpg CPG_MOD 208>; 1359 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1360 dma-names = "tx", "rx"; 1361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1362 resets = <&cpg 208>; 1363 #address-cells = <1>; 1364 #size-cells = <0>; 1365 status = "disabled"; 1366 }; 1367 1368 vin0: video@e6ef0000 { 1369 compatible = "renesas,vin-r8a77965"; 1370 reg = <0 0xe6ef0000 0 0x1000>; 1371 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1372 clocks = <&cpg CPG_MOD 811>; 1373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1374 resets = <&cpg 811>; 1375 renesas,id = <0>; 1376 status = "disabled"; 1377 1378 ports { 1379 #address-cells = <1>; 1380 #size-cells = <0>; 1381 1382 port@1 { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 reg = <1>; 1387 1388 vin0csi20: endpoint@0 { 1389 reg = <0>; 1390 remote-endpoint = <&csi20vin0>; 1391 }; 1392 vin0csi40: endpoint@2 { 1393 reg = <2>; 1394 remote-endpoint = <&csi40vin0>; 1395 }; 1396 }; 1397 }; 1398 }; 1399 1400 vin1: video@e6ef1000 { 1401 compatible = "renesas,vin-r8a77965"; 1402 reg = <0 0xe6ef1000 0 0x1000>; 1403 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 810>; 1405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1406 resets = <&cpg 810>; 1407 renesas,id = <1>; 1408 status = "disabled"; 1409 1410 ports { 1411 #address-cells = <1>; 1412 #size-cells = <0>; 1413 1414 port@1 { 1415 #address-cells = <1>; 1416 #size-cells = <0>; 1417 1418 reg = <1>; 1419 1420 vin1csi20: endpoint@0 { 1421 reg = <0>; 1422 remote-endpoint = <&csi20vin1>; 1423 }; 1424 vin1csi40: endpoint@2 { 1425 reg = <2>; 1426 remote-endpoint = <&csi40vin1>; 1427 }; 1428 }; 1429 }; 1430 }; 1431 1432 vin2: video@e6ef2000 { 1433 compatible = "renesas,vin-r8a77965"; 1434 reg = <0 0xe6ef2000 0 0x1000>; 1435 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1436 clocks = <&cpg CPG_MOD 809>; 1437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1438 resets = <&cpg 809>; 1439 renesas,id = <2>; 1440 status = "disabled"; 1441 1442 ports { 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 1446 port@1 { 1447 #address-cells = <1>; 1448 #size-cells = <0>; 1449 1450 reg = <1>; 1451 1452 vin2csi20: endpoint@0 { 1453 reg = <0>; 1454 remote-endpoint = <&csi20vin2>; 1455 }; 1456 vin2csi40: endpoint@2 { 1457 reg = <2>; 1458 remote-endpoint = <&csi40vin2>; 1459 }; 1460 }; 1461 }; 1462 }; 1463 1464 vin3: video@e6ef3000 { 1465 compatible = "renesas,vin-r8a77965"; 1466 reg = <0 0xe6ef3000 0 0x1000>; 1467 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1468 clocks = <&cpg CPG_MOD 808>; 1469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1470 resets = <&cpg 808>; 1471 renesas,id = <3>; 1472 status = "disabled"; 1473 1474 ports { 1475 #address-cells = <1>; 1476 #size-cells = <0>; 1477 1478 port@1 { 1479 #address-cells = <1>; 1480 #size-cells = <0>; 1481 1482 reg = <1>; 1483 1484 vin3csi20: endpoint@0 { 1485 reg = <0>; 1486 remote-endpoint = <&csi20vin3>; 1487 }; 1488 vin3csi40: endpoint@2 { 1489 reg = <2>; 1490 remote-endpoint = <&csi40vin3>; 1491 }; 1492 }; 1493 }; 1494 }; 1495 1496 vin4: video@e6ef4000 { 1497 compatible = "renesas,vin-r8a77965"; 1498 reg = <0 0xe6ef4000 0 0x1000>; 1499 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1500 clocks = <&cpg CPG_MOD 807>; 1501 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1502 resets = <&cpg 807>; 1503 renesas,id = <4>; 1504 status = "disabled"; 1505 1506 ports { 1507 #address-cells = <1>; 1508 #size-cells = <0>; 1509 1510 port@1 { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 reg = <1>; 1515 1516 vin4csi20: endpoint@0 { 1517 reg = <0>; 1518 remote-endpoint = <&csi20vin4>; 1519 }; 1520 vin4csi40: endpoint@2 { 1521 reg = <2>; 1522 remote-endpoint = <&csi40vin4>; 1523 }; 1524 }; 1525 }; 1526 }; 1527 1528 vin5: video@e6ef5000 { 1529 compatible = "renesas,vin-r8a77965"; 1530 reg = <0 0xe6ef5000 0 0x1000>; 1531 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 806>; 1533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1534 resets = <&cpg 806>; 1535 renesas,id = <5>; 1536 status = "disabled"; 1537 1538 ports { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 port@1 { 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 1546 reg = <1>; 1547 1548 vin5csi20: endpoint@0 { 1549 reg = <0>; 1550 remote-endpoint = <&csi20vin5>; 1551 }; 1552 vin5csi40: endpoint@2 { 1553 reg = <2>; 1554 remote-endpoint = <&csi40vin5>; 1555 }; 1556 }; 1557 }; 1558 }; 1559 1560 vin6: video@e6ef6000 { 1561 compatible = "renesas,vin-r8a77965"; 1562 reg = <0 0xe6ef6000 0 0x1000>; 1563 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1564 clocks = <&cpg CPG_MOD 805>; 1565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1566 resets = <&cpg 805>; 1567 renesas,id = <6>; 1568 status = "disabled"; 1569 1570 ports { 1571 #address-cells = <1>; 1572 #size-cells = <0>; 1573 1574 port@1 { 1575 #address-cells = <1>; 1576 #size-cells = <0>; 1577 1578 reg = <1>; 1579 1580 vin6csi20: endpoint@0 { 1581 reg = <0>; 1582 remote-endpoint = <&csi20vin6>; 1583 }; 1584 vin6csi40: endpoint@2 { 1585 reg = <2>; 1586 remote-endpoint = <&csi40vin6>; 1587 }; 1588 }; 1589 }; 1590 }; 1591 1592 vin7: video@e6ef7000 { 1593 compatible = "renesas,vin-r8a77965"; 1594 reg = <0 0xe6ef7000 0 0x1000>; 1595 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1596 clocks = <&cpg CPG_MOD 804>; 1597 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1598 resets = <&cpg 804>; 1599 renesas,id = <7>; 1600 status = "disabled"; 1601 1602 ports { 1603 #address-cells = <1>; 1604 #size-cells = <0>; 1605 1606 port@1 { 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 1610 reg = <1>; 1611 1612 vin7csi20: endpoint@0 { 1613 reg = <0>; 1614 remote-endpoint = <&csi20vin7>; 1615 }; 1616 vin7csi40: endpoint@2 { 1617 reg = <2>; 1618 remote-endpoint = <&csi40vin7>; 1619 }; 1620 }; 1621 }; 1622 }; 1623 1624 drif00: rif@e6f40000 { 1625 compatible = "renesas,r8a77965-drif", 1626 "renesas,rcar-gen3-drif"; 1627 reg = <0 0xe6f40000 0 0x84>; 1628 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1629 clocks = <&cpg CPG_MOD 515>; 1630 clock-names = "fck"; 1631 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1632 dma-names = "rx", "rx"; 1633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1634 resets = <&cpg 515>; 1635 renesas,bonding = <&drif01>; 1636 status = "disabled"; 1637 }; 1638 1639 drif01: rif@e6f50000 { 1640 compatible = "renesas,r8a77965-drif", 1641 "renesas,rcar-gen3-drif"; 1642 reg = <0 0xe6f50000 0 0x84>; 1643 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1644 clocks = <&cpg CPG_MOD 514>; 1645 clock-names = "fck"; 1646 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1647 dma-names = "rx", "rx"; 1648 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1649 resets = <&cpg 514>; 1650 renesas,bonding = <&drif00>; 1651 status = "disabled"; 1652 }; 1653 1654 drif10: rif@e6f60000 { 1655 compatible = "renesas,r8a77965-drif", 1656 "renesas,rcar-gen3-drif"; 1657 reg = <0 0xe6f60000 0 0x84>; 1658 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1659 clocks = <&cpg CPG_MOD 513>; 1660 clock-names = "fck"; 1661 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1662 dma-names = "rx", "rx"; 1663 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1664 resets = <&cpg 513>; 1665 renesas,bonding = <&drif11>; 1666 status = "disabled"; 1667 }; 1668 1669 drif11: rif@e6f70000 { 1670 compatible = "renesas,r8a77965-drif", 1671 "renesas,rcar-gen3-drif"; 1672 reg = <0 0xe6f70000 0 0x84>; 1673 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 512>; 1675 clock-names = "fck"; 1676 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1677 dma-names = "rx", "rx"; 1678 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1679 resets = <&cpg 512>; 1680 renesas,bonding = <&drif10>; 1681 status = "disabled"; 1682 }; 1683 1684 drif20: rif@e6f80000 { 1685 compatible = "renesas,r8a77965-drif", 1686 "renesas,rcar-gen3-drif"; 1687 reg = <0 0xe6f80000 0 0x84>; 1688 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1689 clocks = <&cpg CPG_MOD 511>; 1690 clock-names = "fck"; 1691 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1692 dma-names = "rx", "rx"; 1693 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1694 resets = <&cpg 511>; 1695 renesas,bonding = <&drif21>; 1696 status = "disabled"; 1697 }; 1698 1699 drif21: rif@e6f90000 { 1700 compatible = "renesas,r8a77965-drif", 1701 "renesas,rcar-gen3-drif"; 1702 reg = <0 0xe6f90000 0 0x84>; 1703 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1704 clocks = <&cpg CPG_MOD 510>; 1705 clock-names = "fck"; 1706 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1707 dma-names = "rx", "rx"; 1708 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1709 resets = <&cpg 510>; 1710 renesas,bonding = <&drif20>; 1711 status = "disabled"; 1712 }; 1713 1714 drif30: rif@e6fa0000 { 1715 compatible = "renesas,r8a77965-drif", 1716 "renesas,rcar-gen3-drif"; 1717 reg = <0 0xe6fa0000 0 0x84>; 1718 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 509>; 1720 clock-names = "fck"; 1721 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1722 dma-names = "rx", "rx"; 1723 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1724 resets = <&cpg 509>; 1725 renesas,bonding = <&drif31>; 1726 status = "disabled"; 1727 }; 1728 1729 drif31: rif@e6fb0000 { 1730 compatible = "renesas,r8a77965-drif", 1731 "renesas,rcar-gen3-drif"; 1732 reg = <0 0xe6fb0000 0 0x84>; 1733 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1734 clocks = <&cpg CPG_MOD 508>; 1735 clock-names = "fck"; 1736 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1737 dma-names = "rx", "rx"; 1738 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1739 resets = <&cpg 508>; 1740 renesas,bonding = <&drif30>; 1741 status = "disabled"; 1742 }; 1743 1744 rcar_sound: sound@ec500000 { 1745 /* 1746 * #sound-dai-cells is required if simple-card 1747 * 1748 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1749 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1750 */ 1751 /* 1752 * #clock-cells is required for audio_clkout0/1/2/3 1753 * 1754 * clkout : #clock-cells = <0>; <&rcar_sound>; 1755 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1756 */ 1757 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1758 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1759 <0 0xec5a0000 0 0x100>, /* ADG */ 1760 <0 0xec540000 0 0x1000>, /* SSIU */ 1761 <0 0xec541000 0 0x280>, /* SSI */ 1762 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1763 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1764 1765 clocks = <&cpg CPG_MOD 1005>, 1766 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1767 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1768 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1769 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1770 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1771 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1772 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1773 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1774 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1775 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1776 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1777 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1778 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1779 <&audio_clk_a>, <&audio_clk_b>, 1780 <&audio_clk_c>, 1781 <&cpg CPG_MOD 922>; 1782 clock-names = "ssi-all", 1783 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1784 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1785 "ssi.1", "ssi.0", 1786 "src.9", "src.8", "src.7", "src.6", 1787 "src.5", "src.4", "src.3", "src.2", 1788 "src.1", "src.0", 1789 "mix.1", "mix.0", 1790 "ctu.1", "ctu.0", 1791 "dvc.0", "dvc.1", 1792 "clk_a", "clk_b", "clk_c", "clk_i"; 1793 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1794 resets = <&cpg 1005>, 1795 <&cpg 1006>, <&cpg 1007>, 1796 <&cpg 1008>, <&cpg 1009>, 1797 <&cpg 1010>, <&cpg 1011>, 1798 <&cpg 1012>, <&cpg 1013>, 1799 <&cpg 1014>, <&cpg 1015>; 1800 reset-names = "ssi-all", 1801 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1802 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1803 "ssi.1", "ssi.0"; 1804 status = "disabled"; 1805 1806 rcar_sound,dvc { 1807 dvc0: dvc-0 { 1808 dmas = <&audma1 0xbc>; 1809 dma-names = "tx"; 1810 }; 1811 dvc1: dvc-1 { 1812 dmas = <&audma1 0xbe>; 1813 dma-names = "tx"; 1814 }; 1815 }; 1816 1817 rcar_sound,mix { 1818 mix0: mix-0 { }; 1819 mix1: mix-1 { }; 1820 }; 1821 1822 rcar_sound,ctu { 1823 ctu00: ctu-0 { }; 1824 ctu01: ctu-1 { }; 1825 ctu02: ctu-2 { }; 1826 ctu03: ctu-3 { }; 1827 ctu10: ctu-4 { }; 1828 ctu11: ctu-5 { }; 1829 ctu12: ctu-6 { }; 1830 ctu13: ctu-7 { }; 1831 }; 1832 1833 rcar_sound,src { 1834 src0: src-0 { 1835 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1836 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1837 dma-names = "rx", "tx"; 1838 }; 1839 src1: src-1 { 1840 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1841 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1842 dma-names = "rx", "tx"; 1843 }; 1844 src2: src-2 { 1845 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1846 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1847 dma-names = "rx", "tx"; 1848 }; 1849 src3: src-3 { 1850 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1851 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1852 dma-names = "rx", "tx"; 1853 }; 1854 src4: src-4 { 1855 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1856 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1857 dma-names = "rx", "tx"; 1858 }; 1859 src5: src-5 { 1860 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1861 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1862 dma-names = "rx", "tx"; 1863 }; 1864 src6: src-6 { 1865 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1866 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 src7: src-7 { 1870 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1871 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 src8: src-8 { 1875 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1876 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 src9: src-9 { 1880 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1881 dmas = <&audma0 0x97>, <&audma1 0xba>; 1882 dma-names = "rx", "tx"; 1883 }; 1884 }; 1885 1886 rcar_sound,ssiu { 1887 ssiu00: ssiu-0 { 1888 dmas = <&audma0 0x15>, <&audma1 0x16>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 ssiu01: ssiu-1 { 1892 dmas = <&audma0 0x35>, <&audma1 0x36>; 1893 dma-names = "rx", "tx"; 1894 }; 1895 ssiu02: ssiu-2 { 1896 dmas = <&audma0 0x37>, <&audma1 0x38>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 ssiu03: ssiu-3 { 1900 dmas = <&audma0 0x47>, <&audma1 0x48>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssiu04: ssiu-4 { 1904 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 ssiu05: ssiu-5 { 1908 dmas = <&audma0 0x43>, <&audma1 0x44>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 ssiu06: ssiu-6 { 1912 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1913 dma-names = "rx", "tx"; 1914 }; 1915 ssiu07: ssiu-7 { 1916 dmas = <&audma0 0x53>, <&audma1 0x54>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssiu10: ssiu-8 { 1920 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssiu11: ssiu-9 { 1924 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssiu12: ssiu-10 { 1928 dmas = <&audma0 0x57>, <&audma1 0x58>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 ssiu13: ssiu-11 { 1932 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1933 dma-names = "rx", "tx"; 1934 }; 1935 ssiu14: ssiu-12 { 1936 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssiu15: ssiu-13 { 1940 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1941 dma-names = "rx", "tx"; 1942 }; 1943 ssiu16: ssiu-14 { 1944 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssiu17: ssiu-15 { 1948 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 ssiu20: ssiu-16 { 1952 dmas = <&audma0 0x63>, <&audma1 0x64>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssiu21: ssiu-17 { 1956 dmas = <&audma0 0x67>, <&audma1 0x68>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssiu22: ssiu-18 { 1960 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1961 dma-names = "rx", "tx"; 1962 }; 1963 ssiu23: ssiu-19 { 1964 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 ssiu24: ssiu-20 { 1968 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1969 dma-names = "rx", "tx"; 1970 }; 1971 ssiu25: ssiu-21 { 1972 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssiu26: ssiu-22 { 1976 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 ssiu27: ssiu-23 { 1980 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1981 dma-names = "rx", "tx"; 1982 }; 1983 ssiu30: ssiu-24 { 1984 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1985 dma-names = "rx", "tx"; 1986 }; 1987 ssiu31: ssiu-25 { 1988 dmas = <&audma0 0x21>, <&audma1 0x22>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 ssiu32: ssiu-26 { 1992 dmas = <&audma0 0x23>, <&audma1 0x24>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 ssiu33: ssiu-27 { 1996 dmas = <&audma0 0x25>, <&audma1 0x26>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 ssiu34: ssiu-28 { 2000 dmas = <&audma0 0x27>, <&audma1 0x28>; 2001 dma-names = "rx", "tx"; 2002 }; 2003 ssiu35: ssiu-29 { 2004 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2005 dma-names = "rx", "tx"; 2006 }; 2007 ssiu36: ssiu-30 { 2008 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 ssiu37: ssiu-31 { 2012 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2013 dma-names = "rx", "tx"; 2014 }; 2015 ssiu40: ssiu-32 { 2016 dmas = <&audma0 0x71>, <&audma1 0x72>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 ssiu41: ssiu-33 { 2020 dmas = <&audma0 0x17>, <&audma1 0x18>; 2021 dma-names = "rx", "tx"; 2022 }; 2023 ssiu42: ssiu-34 { 2024 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssiu43: ssiu-35 { 2028 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 ssiu44: ssiu-36 { 2032 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2033 dma-names = "rx", "tx"; 2034 }; 2035 ssiu45: ssiu-37 { 2036 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssiu46: ssiu-38 { 2040 dmas = <&audma0 0x31>, <&audma1 0x32>; 2041 dma-names = "rx", "tx"; 2042 }; 2043 ssiu47: ssiu-39 { 2044 dmas = <&audma0 0x33>, <&audma1 0x34>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssiu50: ssiu-40 { 2048 dmas = <&audma0 0x73>, <&audma1 0x74>; 2049 dma-names = "rx", "tx"; 2050 }; 2051 ssiu60: ssiu-41 { 2052 dmas = <&audma0 0x75>, <&audma1 0x76>; 2053 dma-names = "rx", "tx"; 2054 }; 2055 ssiu70: ssiu-42 { 2056 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssiu80: ssiu-43 { 2060 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2061 dma-names = "rx", "tx"; 2062 }; 2063 ssiu90: ssiu-44 { 2064 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssiu91: ssiu-45 { 2068 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2069 dma-names = "rx", "tx"; 2070 }; 2071 ssiu92: ssiu-46 { 2072 dmas = <&audma0 0x81>, <&audma1 0x82>; 2073 dma-names = "rx", "tx"; 2074 }; 2075 ssiu93: ssiu-47 { 2076 dmas = <&audma0 0x83>, <&audma1 0x84>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu94: ssiu-48 { 2080 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 ssiu95: ssiu-49 { 2084 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2085 dma-names = "rx", "tx"; 2086 }; 2087 ssiu96: ssiu-50 { 2088 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 ssiu97: ssiu-51 { 2092 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2093 dma-names = "rx", "tx"; 2094 }; 2095 }; 2096 2097 rcar_sound,ssi { 2098 ssi0: ssi-0 { 2099 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2100 dmas = <&audma0 0x01>, <&audma1 0x02>; 2101 dma-names = "rx", "tx"; 2102 }; 2103 ssi1: ssi-1 { 2104 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2105 dmas = <&audma0 0x03>, <&audma1 0x04>; 2106 dma-names = "rx", "tx"; 2107 }; 2108 ssi2: ssi-2 { 2109 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2110 dmas = <&audma0 0x05>, <&audma1 0x06>; 2111 dma-names = "rx", "tx"; 2112 }; 2113 ssi3: ssi-3 { 2114 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2115 dmas = <&audma0 0x07>, <&audma1 0x08>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssi4: ssi-4 { 2119 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2120 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssi5: ssi-5 { 2124 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2125 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2126 dma-names = "rx", "tx"; 2127 }; 2128 ssi6: ssi-6 { 2129 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2130 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2131 dma-names = "rx", "tx"; 2132 }; 2133 ssi7: ssi-7 { 2134 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2135 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 ssi8: ssi-8 { 2139 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2140 dmas = <&audma0 0x11>, <&audma1 0x12>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssi9: ssi-9 { 2144 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2145 dmas = <&audma0 0x13>, <&audma1 0x14>; 2146 dma-names = "rx", "tx"; 2147 }; 2148 }; 2149 }; 2150 2151 mlp: mlp@ec520000 { 2152 compatible = "renesas,r8a77965-mlp", 2153 "renesas,rcar-gen3-mlp"; 2154 reg = <0 0xec520000 0 0x800>; 2155 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2156 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2157 clocks = <&cpg CPG_MOD 802>; 2158 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2159 resets = <&cpg 802>; 2160 status = "disabled"; 2161 }; 2162 2163 audma0: dma-controller@ec700000 { 2164 compatible = "renesas,dmac-r8a77965", 2165 "renesas,rcar-dmac"; 2166 reg = <0 0xec700000 0 0x10000>; 2167 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2168 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2169 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2170 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2171 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2172 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2173 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2174 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2175 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2176 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2177 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2178 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2179 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2180 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2181 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2182 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2183 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2184 interrupt-names = "error", 2185 "ch0", "ch1", "ch2", "ch3", 2186 "ch4", "ch5", "ch6", "ch7", 2187 "ch8", "ch9", "ch10", "ch11", 2188 "ch12", "ch13", "ch14", "ch15"; 2189 clocks = <&cpg CPG_MOD 502>; 2190 clock-names = "fck"; 2191 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2192 resets = <&cpg 502>; 2193 #dma-cells = <1>; 2194 dma-channels = <16>; 2195 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2196 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2197 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2198 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2199 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2200 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2201 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2202 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2203 }; 2204 2205 audma1: dma-controller@ec720000 { 2206 compatible = "renesas,dmac-r8a77965", 2207 "renesas,rcar-dmac"; 2208 reg = <0 0xec720000 0 0x10000>; 2209 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2210 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2211 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2212 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2213 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2214 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2215 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2216 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2217 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2218 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2219 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2220 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2221 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2222 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2223 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2224 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2225 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2226 interrupt-names = "error", 2227 "ch0", "ch1", "ch2", "ch3", 2228 "ch4", "ch5", "ch6", "ch7", 2229 "ch8", "ch9", "ch10", "ch11", 2230 "ch12", "ch13", "ch14", "ch15"; 2231 clocks = <&cpg CPG_MOD 501>; 2232 clock-names = "fck"; 2233 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2234 resets = <&cpg 501>; 2235 #dma-cells = <1>; 2236 dma-channels = <16>; 2237 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2238 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2239 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2240 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2241 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2242 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2243 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2244 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2245 }; 2246 2247 xhci0: usb@ee000000 { 2248 compatible = "renesas,xhci-r8a77965", 2249 "renesas,rcar-gen3-xhci"; 2250 reg = <0 0xee000000 0 0xc00>; 2251 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2252 clocks = <&cpg CPG_MOD 328>; 2253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2254 resets = <&cpg 328>; 2255 status = "disabled"; 2256 }; 2257 2258 usb3_peri0: usb@ee020000 { 2259 compatible = "renesas,r8a77965-usb3-peri", 2260 "renesas,rcar-gen3-usb3-peri"; 2261 reg = <0 0xee020000 0 0x400>; 2262 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2263 clocks = <&cpg CPG_MOD 328>; 2264 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2265 resets = <&cpg 328>; 2266 status = "disabled"; 2267 }; 2268 2269 ohci0: usb@ee080000 { 2270 compatible = "generic-ohci"; 2271 reg = <0 0xee080000 0 0x100>; 2272 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2273 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2274 phys = <&usb2_phy0 1>; 2275 phy-names = "usb"; 2276 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2277 resets = <&cpg 703>, <&cpg 704>; 2278 status = "disabled"; 2279 }; 2280 2281 ohci1: usb@ee0a0000 { 2282 compatible = "generic-ohci"; 2283 reg = <0 0xee0a0000 0 0x100>; 2284 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2285 clocks = <&cpg CPG_MOD 702>; 2286 phys = <&usb2_phy1 1>; 2287 phy-names = "usb"; 2288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2289 resets = <&cpg 702>; 2290 status = "disabled"; 2291 }; 2292 2293 ehci0: usb@ee080100 { 2294 compatible = "generic-ehci"; 2295 reg = <0 0xee080100 0 0x100>; 2296 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2297 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2298 phys = <&usb2_phy0 2>; 2299 phy-names = "usb"; 2300 companion = <&ohci0>; 2301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2302 resets = <&cpg 703>, <&cpg 704>; 2303 status = "disabled"; 2304 }; 2305 2306 ehci1: usb@ee0a0100 { 2307 compatible = "generic-ehci"; 2308 reg = <0 0xee0a0100 0 0x100>; 2309 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2310 clocks = <&cpg CPG_MOD 702>; 2311 phys = <&usb2_phy1 2>; 2312 phy-names = "usb"; 2313 companion = <&ohci1>; 2314 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2315 resets = <&cpg 702>; 2316 status = "disabled"; 2317 }; 2318 2319 usb2_phy0: usb-phy@ee080200 { 2320 compatible = "renesas,usb2-phy-r8a77965", 2321 "renesas,rcar-gen3-usb2-phy"; 2322 reg = <0 0xee080200 0 0x700>; 2323 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2324 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2325 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2326 resets = <&cpg 703>, <&cpg 704>; 2327 #phy-cells = <1>; 2328 status = "disabled"; 2329 }; 2330 2331 usb2_phy1: usb-phy@ee0a0200 { 2332 compatible = "renesas,usb2-phy-r8a77965", 2333 "renesas,rcar-gen3-usb2-phy"; 2334 reg = <0 0xee0a0200 0 0x700>; 2335 clocks = <&cpg CPG_MOD 702>; 2336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2337 resets = <&cpg 702>; 2338 #phy-cells = <1>; 2339 status = "disabled"; 2340 }; 2341 2342 sdhi0: mmc@ee100000 { 2343 compatible = "renesas,sdhi-r8a77965", 2344 "renesas,rcar-gen3-sdhi"; 2345 reg = <0 0xee100000 0 0x2000>; 2346 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2347 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; 2348 clock-names = "core", "clkh"; 2349 max-frequency = <200000000>; 2350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2351 resets = <&cpg 314>; 2352 iommus = <&ipmmu_ds1 32>; 2353 status = "disabled"; 2354 }; 2355 2356 sdhi1: mmc@ee120000 { 2357 compatible = "renesas,sdhi-r8a77965", 2358 "renesas,rcar-gen3-sdhi"; 2359 reg = <0 0xee120000 0 0x2000>; 2360 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2361 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; 2362 clock-names = "core", "clkh"; 2363 max-frequency = <200000000>; 2364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2365 resets = <&cpg 313>; 2366 iommus = <&ipmmu_ds1 33>; 2367 status = "disabled"; 2368 }; 2369 2370 sdhi2: mmc@ee140000 { 2371 compatible = "renesas,sdhi-r8a77965", 2372 "renesas,rcar-gen3-sdhi"; 2373 reg = <0 0xee140000 0 0x2000>; 2374 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2375 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; 2376 clock-names = "core", "clkh"; 2377 max-frequency = <200000000>; 2378 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2379 resets = <&cpg 312>; 2380 iommus = <&ipmmu_ds1 34>; 2381 status = "disabled"; 2382 }; 2383 2384 sdhi3: mmc@ee160000 { 2385 compatible = "renesas,sdhi-r8a77965", 2386 "renesas,rcar-gen3-sdhi"; 2387 reg = <0 0xee160000 0 0x2000>; 2388 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2389 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; 2390 clock-names = "core", "clkh"; 2391 max-frequency = <200000000>; 2392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2393 resets = <&cpg 311>; 2394 iommus = <&ipmmu_ds1 35>; 2395 status = "disabled"; 2396 }; 2397 2398 rpc: spi@ee200000 { 2399 compatible = "renesas,r8a77965-rpc-if", 2400 "renesas,rcar-gen3-rpc-if"; 2401 reg = <0 0xee200000 0 0x200>, 2402 <0 0x08000000 0 0x04000000>, 2403 <0 0xee208000 0 0x100>; 2404 reg-names = "regs", "dirmap", "wbuf"; 2405 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2406 clocks = <&cpg CPG_MOD 917>; 2407 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2408 resets = <&cpg 917>; 2409 #address-cells = <1>; 2410 #size-cells = <0>; 2411 status = "disabled"; 2412 }; 2413 2414 sata: sata@ee300000 { 2415 compatible = "renesas,sata-r8a77965", 2416 "renesas,rcar-gen3-sata"; 2417 reg = <0 0xee300000 0 0x200000>; 2418 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2419 clocks = <&cpg CPG_MOD 815>; 2420 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2421 resets = <&cpg 815>; 2422 iommus = <&ipmmu_hc 2>; 2423 status = "disabled"; 2424 }; 2425 2426 gic: interrupt-controller@f1010000 { 2427 compatible = "arm,gic-400"; 2428 #interrupt-cells = <3>; 2429 #address-cells = <0>; 2430 interrupt-controller; 2431 reg = <0x0 0xf1010000 0 0x1000>, 2432 <0x0 0xf1020000 0 0x20000>, 2433 <0x0 0xf1040000 0 0x20000>, 2434 <0x0 0xf1060000 0 0x20000>; 2435 interrupts = <GIC_PPI 9 2436 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2437 clocks = <&cpg CPG_MOD 408>; 2438 clock-names = "clk"; 2439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2440 resets = <&cpg 408>; 2441 }; 2442 2443 pciec0: pcie@fe000000 { 2444 compatible = "renesas,pcie-r8a77965", 2445 "renesas,pcie-rcar-gen3"; 2446 reg = <0 0xfe000000 0 0x80000>; 2447 #address-cells = <3>; 2448 #size-cells = <2>; 2449 bus-range = <0x00 0xff>; 2450 device_type = "pci"; 2451 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2452 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2453 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2454 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2455 /* Map all possible DDR/IOMMU as inbound ranges */ 2456 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2457 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2458 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2459 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2460 #interrupt-cells = <1>; 2461 interrupt-map-mask = <0 0 0 0>; 2462 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2463 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2464 clock-names = "pcie", "pcie_bus"; 2465 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2466 resets = <&cpg 319>; 2467 iommu-map = <0 &ipmmu_hc 0 1>; 2468 iommu-map-mask = <0>; 2469 status = "disabled"; 2470 }; 2471 2472 pciec1: pcie@ee800000 { 2473 compatible = "renesas,pcie-r8a77965", 2474 "renesas,pcie-rcar-gen3"; 2475 reg = <0 0xee800000 0 0x80000>; 2476 #address-cells = <3>; 2477 #size-cells = <2>; 2478 bus-range = <0x00 0xff>; 2479 device_type = "pci"; 2480 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2481 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2482 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2483 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2484 /* Map all possible DDR/IOMMU as inbound ranges */ 2485 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2486 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2487 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2488 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2489 #interrupt-cells = <1>; 2490 interrupt-map-mask = <0 0 0 0>; 2491 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2492 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2493 clock-names = "pcie", "pcie_bus"; 2494 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2495 resets = <&cpg 318>; 2496 iommu-map = <0 &ipmmu_hc 1 1>; 2497 iommu-map-mask = <0>; 2498 status = "disabled"; 2499 }; 2500 2501 fdp1@fe940000 { 2502 compatible = "renesas,fdp1"; 2503 reg = <0 0xfe940000 0 0x2400>; 2504 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2505 clocks = <&cpg CPG_MOD 119>; 2506 power-domains = <&sysc R8A77965_PD_A3VP>; 2507 resets = <&cpg 119>; 2508 renesas,fcp = <&fcpf0>; 2509 }; 2510 2511 fcpf0: fcp@fe950000 { 2512 compatible = "renesas,fcpf"; 2513 reg = <0 0xfe950000 0 0x200>; 2514 clocks = <&cpg CPG_MOD 615>; 2515 power-domains = <&sysc R8A77965_PD_A3VP>; 2516 resets = <&cpg 615>; 2517 iommus = <&ipmmu_vp0 0>; 2518 }; 2519 2520 vspb: vsp@fe960000 { 2521 compatible = "renesas,vsp2"; 2522 reg = <0 0xfe960000 0 0x8000>; 2523 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2524 clocks = <&cpg CPG_MOD 626>; 2525 power-domains = <&sysc R8A77965_PD_A3VP>; 2526 resets = <&cpg 626>; 2527 2528 renesas,fcp = <&fcpvb0>; 2529 }; 2530 2531 vspi0: vsp@fe9a0000 { 2532 compatible = "renesas,vsp2"; 2533 reg = <0 0xfe9a0000 0 0x8000>; 2534 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2535 clocks = <&cpg CPG_MOD 631>; 2536 power-domains = <&sysc R8A77965_PD_A3VP>; 2537 resets = <&cpg 631>; 2538 2539 renesas,fcp = <&fcpvi0>; 2540 }; 2541 2542 vspd0: vsp@fea20000 { 2543 compatible = "renesas,vsp2"; 2544 reg = <0 0xfea20000 0 0x5000>; 2545 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2546 clocks = <&cpg CPG_MOD 623>; 2547 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2548 resets = <&cpg 623>; 2549 2550 renesas,fcp = <&fcpvd0>; 2551 }; 2552 2553 vspd1: vsp@fea28000 { 2554 compatible = "renesas,vsp2"; 2555 reg = <0 0xfea28000 0 0x5000>; 2556 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2557 clocks = <&cpg CPG_MOD 622>; 2558 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2559 resets = <&cpg 622>; 2560 2561 renesas,fcp = <&fcpvd1>; 2562 }; 2563 2564 fcpvb0: fcp@fe96f000 { 2565 compatible = "renesas,fcpv"; 2566 reg = <0 0xfe96f000 0 0x200>; 2567 clocks = <&cpg CPG_MOD 607>; 2568 power-domains = <&sysc R8A77965_PD_A3VP>; 2569 resets = <&cpg 607>; 2570 iommus = <&ipmmu_vp0 5>; 2571 }; 2572 2573 fcpvd0: fcp@fea27000 { 2574 compatible = "renesas,fcpv"; 2575 reg = <0 0xfea27000 0 0x200>; 2576 clocks = <&cpg CPG_MOD 603>; 2577 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2578 resets = <&cpg 603>; 2579 iommus = <&ipmmu_vi0 8>; 2580 }; 2581 2582 fcpvd1: fcp@fea2f000 { 2583 compatible = "renesas,fcpv"; 2584 reg = <0 0xfea2f000 0 0x200>; 2585 clocks = <&cpg CPG_MOD 602>; 2586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2587 resets = <&cpg 602>; 2588 iommus = <&ipmmu_vi0 9>; 2589 }; 2590 2591 fcpvi0: fcp@fe9af000 { 2592 compatible = "renesas,fcpv"; 2593 reg = <0 0xfe9af000 0 0x200>; 2594 clocks = <&cpg CPG_MOD 611>; 2595 power-domains = <&sysc R8A77965_PD_A3VP>; 2596 resets = <&cpg 611>; 2597 iommus = <&ipmmu_vp0 8>; 2598 }; 2599 2600 cmm0: cmm@fea40000 { 2601 compatible = "renesas,r8a77965-cmm", 2602 "renesas,rcar-gen3-cmm"; 2603 reg = <0 0xfea40000 0 0x1000>; 2604 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2605 clocks = <&cpg CPG_MOD 711>; 2606 resets = <&cpg 711>; 2607 }; 2608 2609 cmm1: cmm@fea50000 { 2610 compatible = "renesas,r8a77965-cmm", 2611 "renesas,rcar-gen3-cmm"; 2612 reg = <0 0xfea50000 0 0x1000>; 2613 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2614 clocks = <&cpg CPG_MOD 710>; 2615 resets = <&cpg 710>; 2616 }; 2617 2618 cmm3: cmm@fea70000 { 2619 compatible = "renesas,r8a77965-cmm", 2620 "renesas,rcar-gen3-cmm"; 2621 reg = <0 0xfea70000 0 0x1000>; 2622 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2623 clocks = <&cpg CPG_MOD 708>; 2624 resets = <&cpg 708>; 2625 }; 2626 2627 csi20: csi2@fea80000 { 2628 compatible = "renesas,r8a77965-csi2"; 2629 reg = <0 0xfea80000 0 0x10000>; 2630 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2631 clocks = <&cpg CPG_MOD 714>; 2632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2633 resets = <&cpg 714>; 2634 status = "disabled"; 2635 2636 ports { 2637 #address-cells = <1>; 2638 #size-cells = <0>; 2639 2640 port@0 { 2641 reg = <0>; 2642 }; 2643 2644 port@1 { 2645 #address-cells = <1>; 2646 #size-cells = <0>; 2647 2648 reg = <1>; 2649 2650 csi20vin0: endpoint@0 { 2651 reg = <0>; 2652 remote-endpoint = <&vin0csi20>; 2653 }; 2654 csi20vin1: endpoint@1 { 2655 reg = <1>; 2656 remote-endpoint = <&vin1csi20>; 2657 }; 2658 csi20vin2: endpoint@2 { 2659 reg = <2>; 2660 remote-endpoint = <&vin2csi20>; 2661 }; 2662 csi20vin3: endpoint@3 { 2663 reg = <3>; 2664 remote-endpoint = <&vin3csi20>; 2665 }; 2666 csi20vin4: endpoint@4 { 2667 reg = <4>; 2668 remote-endpoint = <&vin4csi20>; 2669 }; 2670 csi20vin5: endpoint@5 { 2671 reg = <5>; 2672 remote-endpoint = <&vin5csi20>; 2673 }; 2674 csi20vin6: endpoint@6 { 2675 reg = <6>; 2676 remote-endpoint = <&vin6csi20>; 2677 }; 2678 csi20vin7: endpoint@7 { 2679 reg = <7>; 2680 remote-endpoint = <&vin7csi20>; 2681 }; 2682 }; 2683 }; 2684 }; 2685 2686 csi40: csi2@feaa0000 { 2687 compatible = "renesas,r8a77965-csi2"; 2688 reg = <0 0xfeaa0000 0 0x10000>; 2689 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2690 clocks = <&cpg CPG_MOD 716>; 2691 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2692 resets = <&cpg 716>; 2693 status = "disabled"; 2694 2695 ports { 2696 #address-cells = <1>; 2697 #size-cells = <0>; 2698 2699 port@0 { 2700 reg = <0>; 2701 }; 2702 2703 port@1 { 2704 #address-cells = <1>; 2705 #size-cells = <0>; 2706 2707 reg = <1>; 2708 2709 csi40vin0: endpoint@0 { 2710 reg = <0>; 2711 remote-endpoint = <&vin0csi40>; 2712 }; 2713 csi40vin1: endpoint@1 { 2714 reg = <1>; 2715 remote-endpoint = <&vin1csi40>; 2716 }; 2717 csi40vin2: endpoint@2 { 2718 reg = <2>; 2719 remote-endpoint = <&vin2csi40>; 2720 }; 2721 csi40vin3: endpoint@3 { 2722 reg = <3>; 2723 remote-endpoint = <&vin3csi40>; 2724 }; 2725 csi40vin4: endpoint@4 { 2726 reg = <4>; 2727 remote-endpoint = <&vin4csi40>; 2728 }; 2729 csi40vin5: endpoint@5 { 2730 reg = <5>; 2731 remote-endpoint = <&vin5csi40>; 2732 }; 2733 csi40vin6: endpoint@6 { 2734 reg = <6>; 2735 remote-endpoint = <&vin6csi40>; 2736 }; 2737 csi40vin7: endpoint@7 { 2738 reg = <7>; 2739 remote-endpoint = <&vin7csi40>; 2740 }; 2741 }; 2742 }; 2743 }; 2744 2745 hdmi0: hdmi@fead0000 { 2746 compatible = "renesas,r8a77965-hdmi", 2747 "renesas,rcar-gen3-hdmi"; 2748 reg = <0 0xfead0000 0 0x10000>; 2749 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2750 clocks = <&cpg CPG_MOD 729>, 2751 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2752 clock-names = "iahb", "isfr"; 2753 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2754 resets = <&cpg 729>; 2755 status = "disabled"; 2756 2757 ports { 2758 #address-cells = <1>; 2759 #size-cells = <0>; 2760 port@0 { 2761 reg = <0>; 2762 dw_hdmi0_in: endpoint { 2763 remote-endpoint = <&du_out_hdmi0>; 2764 }; 2765 }; 2766 port@1 { 2767 reg = <1>; 2768 }; 2769 }; 2770 }; 2771 2772 du: display@feb00000 { 2773 compatible = "renesas,du-r8a77965"; 2774 reg = <0 0xfeb00000 0 0x80000>; 2775 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2776 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2777 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2778 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2779 <&cpg CPG_MOD 721>; 2780 clock-names = "du.0", "du.1", "du.3"; 2781 resets = <&cpg 724>, <&cpg 722>; 2782 reset-names = "du.0", "du.3"; 2783 2784 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2785 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2786 2787 status = "disabled"; 2788 2789 ports { 2790 #address-cells = <1>; 2791 #size-cells = <0>; 2792 2793 port@0 { 2794 reg = <0>; 2795 }; 2796 port@1 { 2797 reg = <1>; 2798 du_out_hdmi0: endpoint { 2799 remote-endpoint = <&dw_hdmi0_in>; 2800 }; 2801 }; 2802 port@2 { 2803 reg = <2>; 2804 du_out_lvds0: endpoint { 2805 remote-endpoint = <&lvds0_in>; 2806 }; 2807 }; 2808 }; 2809 }; 2810 2811 lvds0: lvds@feb90000 { 2812 compatible = "renesas,r8a77965-lvds"; 2813 reg = <0 0xfeb90000 0 0x14>; 2814 clocks = <&cpg CPG_MOD 727>; 2815 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2816 resets = <&cpg 727>; 2817 status = "disabled"; 2818 2819 ports { 2820 #address-cells = <1>; 2821 #size-cells = <0>; 2822 2823 port@0 { 2824 reg = <0>; 2825 lvds0_in: endpoint { 2826 remote-endpoint = <&du_out_lvds0>; 2827 }; 2828 }; 2829 port@1 { 2830 reg = <1>; 2831 }; 2832 }; 2833 }; 2834 2835 prr: chipid@fff00044 { 2836 compatible = "renesas,prr"; 2837 reg = <0 0xfff00044 0 4>; 2838 bootph-all; 2839 }; 2840 }; 2841 2842 thermal-zones { 2843 sensor1_thermal: sensor1-thermal { 2844 polling-delay-passive = <250>; 2845 polling-delay = <1000>; 2846 thermal-sensors = <&tsc 0>; 2847 sustainable-power = <2439>; 2848 2849 trips { 2850 sensor1_crit: sensor1-crit { 2851 temperature = <120000>; 2852 hysteresis = <1000>; 2853 type = "critical"; 2854 }; 2855 }; 2856 }; 2857 2858 sensor2_thermal: sensor2-thermal { 2859 polling-delay-passive = <250>; 2860 polling-delay = <1000>; 2861 thermal-sensors = <&tsc 1>; 2862 sustainable-power = <2439>; 2863 2864 trips { 2865 sensor2_crit: sensor2-crit { 2866 temperature = <120000>; 2867 hysteresis = <1000>; 2868 type = "critical"; 2869 }; 2870 }; 2871 }; 2872 2873 sensor3_thermal: sensor3-thermal { 2874 polling-delay-passive = <250>; 2875 polling-delay = <1000>; 2876 thermal-sensors = <&tsc 2>; 2877 sustainable-power = <2439>; 2878 2879 trips { 2880 target: trip-point1 { 2881 /* miliCelsius */ 2882 temperature = <100000>; 2883 hysteresis = <1000>; 2884 type = "passive"; 2885 }; 2886 2887 sensor3_crit: sensor3-crit { 2888 temperature = <120000>; 2889 hysteresis = <1000>; 2890 type = "critical"; 2891 }; 2892 }; 2893 2894 cooling-maps { 2895 map0 { 2896 trip = <&target>; 2897 cooling-device = <&a57_0 2 4>; 2898 contribution = <1024>; 2899 }; 2900 }; 2901 }; 2902 }; 2903 2904 timer { 2905 compatible = "arm,armv8-timer"; 2906 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2907 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2908 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2909 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2910 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2911 }; 2912 2913 /* External USB clocks - can be overridden by the board */ 2914 usb3s0_clk: usb3s0 { 2915 compatible = "fixed-clock"; 2916 #clock-cells = <0>; 2917 clock-frequency = <0>; 2918 }; 2919 2920 usb_extal_clk: usb_extal { 2921 compatible = "fixed-clock"; 2922 #clock-cells = <0>; 2923 clock-frequency = <0>; 2924 }; 2925}; 2926