1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC 4 * 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2014 Cogent Embedded Inc. 8 */ 9 10#include <dt-bindings/clock/r8a7791-cpg-mssr.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/power/r8a7791-sysc.h> 14 15/ { 16 compatible = "renesas,r8a7791"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &i2c4; 26 i2c5 = &i2c5; 27 i2c6 = &i2c6; 28 i2c7 = &i2c7; 29 i2c8 = &i2c8; 30 spi0 = &qspi; 31 spi1 = &msiof0; 32 spi2 = &msiof1; 33 spi3 = &msiof2; 34 vin0 = &vin0; 35 vin1 = &vin1; 36 vin2 = &vin2; 37 }; 38 39 /* 40 * The external audio clocks are configured as 0 Hz fixed frequency 41 * clocks by default. 42 * Boards that provide audio clocks should override them. 43 */ 44 audio_clk_a: audio_clk_a { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 audio_clk_b: audio_clk_b { 50 compatible = "fixed-clock"; 51 #clock-cells = <0>; 52 clock-frequency = <0>; 53 }; 54 audio_clk_c: audio_clk_c { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 /* External CAN clock */ 61 can_clk: can { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 /* This value must be overridden by the board. */ 65 clock-frequency = <0>; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 cpu0: cpu@0 { 73 device_type = "cpu"; 74 compatible = "arm,cortex-a15"; 75 reg = <0>; 76 clock-frequency = <1500000000>; 77 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 78 power-domains = <&sysc R8A7791_PD_CA15_CPU0>; 79 enable-method = "renesas,apmu"; 80 next-level-cache = <&L2_CA15>; 81 voltage-tolerance = <1>; /* 1% */ 82 clock-latency = <300000>; /* 300 us */ 83 84 /* kHz - uV - OPPs unknown yet */ 85 operating-points = <1500000 1000000>, 86 <1312500 1000000>, 87 <1125000 1000000>, 88 < 937500 1000000>, 89 < 750000 1000000>, 90 < 375000 1000000>; 91 }; 92 93 cpu1: cpu@1 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a15"; 96 reg = <1>; 97 clock-frequency = <1500000000>; 98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 99 power-domains = <&sysc R8A7791_PD_CA15_CPU1>; 100 enable-method = "renesas,apmu"; 101 next-level-cache = <&L2_CA15>; 102 voltage-tolerance = <1>; /* 1% */ 103 clock-latency = <300000>; /* 300 us */ 104 105 /* kHz - uV - OPPs unknown yet */ 106 operating-points = <1500000 1000000>, 107 <1312500 1000000>, 108 <1125000 1000000>, 109 < 937500 1000000>, 110 < 750000 1000000>, 111 < 375000 1000000>; 112 }; 113 114 L2_CA15: cache-controller-0 { 115 compatible = "cache"; 116 power-domains = <&sysc R8A7791_PD_CA15_SCU>; 117 cache-unified; 118 cache-level = <2>; 119 }; 120 }; 121 122 /* External root clock */ 123 extal_clk: extal { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 /* This value must be overridden by the board. */ 127 clock-frequency = <0>; 128 bootph-all; 129 }; 130 131 /* External PCIe clock - can be overridden by the board */ 132 pcie_bus_clk: pcie_bus { 133 compatible = "fixed-clock"; 134 #clock-cells = <0>; 135 clock-frequency = <0>; 136 }; 137 138 pmu { 139 compatible = "arm,cortex-a15-pmu"; 140 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 141 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 142 interrupt-affinity = <&cpu0>, <&cpu1>; 143 }; 144 145 /* External SCIF clock */ 146 scif_clk: scif { 147 compatible = "fixed-clock"; 148 #clock-cells = <0>; 149 /* This value must be overridden by the board. */ 150 clock-frequency = <0>; 151 }; 152 153 soc { 154 compatible = "simple-bus"; 155 interrupt-parent = <&gic>; 156 bootph-all; 157 158 #address-cells = <2>; 159 #size-cells = <2>; 160 ranges; 161 162 rwdt: watchdog@e6020000 { 163 compatible = "renesas,r8a7791-wdt", 164 "renesas,rcar-gen2-wdt"; 165 reg = <0 0xe6020000 0 0x0c>; 166 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 167 clocks = <&cpg CPG_MOD 402>; 168 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 169 resets = <&cpg 402>; 170 status = "disabled"; 171 }; 172 173 gpio0: gpio@e6050000 { 174 compatible = "renesas,gpio-r8a7791", 175 "renesas,rcar-gen2-gpio"; 176 reg = <0 0xe6050000 0 0x50>; 177 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 178 #gpio-cells = <2>; 179 gpio-controller; 180 gpio-ranges = <&pfc 0 0 32>; 181 #interrupt-cells = <2>; 182 interrupt-controller; 183 clocks = <&cpg CPG_MOD 912>; 184 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 185 resets = <&cpg 912>; 186 }; 187 188 gpio1: gpio@e6051000 { 189 compatible = "renesas,gpio-r8a7791", 190 "renesas,rcar-gen2-gpio"; 191 reg = <0 0xe6051000 0 0x50>; 192 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 193 #gpio-cells = <2>; 194 gpio-controller; 195 gpio-ranges = <&pfc 0 32 26>; 196 #interrupt-cells = <2>; 197 interrupt-controller; 198 clocks = <&cpg CPG_MOD 911>; 199 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 200 resets = <&cpg 911>; 201 }; 202 203 gpio2: gpio@e6052000 { 204 compatible = "renesas,gpio-r8a7791", 205 "renesas,rcar-gen2-gpio"; 206 reg = <0 0xe6052000 0 0x50>; 207 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 208 #gpio-cells = <2>; 209 gpio-controller; 210 gpio-ranges = <&pfc 0 64 32>; 211 #interrupt-cells = <2>; 212 interrupt-controller; 213 clocks = <&cpg CPG_MOD 910>; 214 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 215 resets = <&cpg 910>; 216 }; 217 218 gpio3: gpio@e6053000 { 219 compatible = "renesas,gpio-r8a7791", 220 "renesas,rcar-gen2-gpio"; 221 reg = <0 0xe6053000 0 0x50>; 222 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 223 #gpio-cells = <2>; 224 gpio-controller; 225 gpio-ranges = <&pfc 0 96 32>; 226 #interrupt-cells = <2>; 227 interrupt-controller; 228 clocks = <&cpg CPG_MOD 909>; 229 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 230 resets = <&cpg 909>; 231 }; 232 233 gpio4: gpio@e6054000 { 234 compatible = "renesas,gpio-r8a7791", 235 "renesas,rcar-gen2-gpio"; 236 reg = <0 0xe6054000 0 0x50>; 237 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 238 #gpio-cells = <2>; 239 gpio-controller; 240 gpio-ranges = <&pfc 0 128 32>; 241 #interrupt-cells = <2>; 242 interrupt-controller; 243 clocks = <&cpg CPG_MOD 908>; 244 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 245 resets = <&cpg 908>; 246 }; 247 248 gpio5: gpio@e6055000 { 249 compatible = "renesas,gpio-r8a7791", 250 "renesas,rcar-gen2-gpio"; 251 reg = <0 0xe6055000 0 0x50>; 252 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 253 #gpio-cells = <2>; 254 gpio-controller; 255 gpio-ranges = <&pfc 0 160 32>; 256 #interrupt-cells = <2>; 257 interrupt-controller; 258 clocks = <&cpg CPG_MOD 907>; 259 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 260 resets = <&cpg 907>; 261 }; 262 263 gpio6: gpio@e6055400 { 264 compatible = "renesas,gpio-r8a7791", 265 "renesas,rcar-gen2-gpio"; 266 reg = <0 0xe6055400 0 0x50>; 267 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 268 #gpio-cells = <2>; 269 gpio-controller; 270 gpio-ranges = <&pfc 0 192 32>; 271 #interrupt-cells = <2>; 272 interrupt-controller; 273 clocks = <&cpg CPG_MOD 905>; 274 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 275 resets = <&cpg 905>; 276 }; 277 278 gpio7: gpio@e6055800 { 279 compatible = "renesas,gpio-r8a7791", 280 "renesas,rcar-gen2-gpio"; 281 reg = <0 0xe6055800 0 0x50>; 282 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 283 #gpio-cells = <2>; 284 gpio-controller; 285 gpio-ranges = <&pfc 0 224 26>; 286 #interrupt-cells = <2>; 287 interrupt-controller; 288 clocks = <&cpg CPG_MOD 904>; 289 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 290 resets = <&cpg 904>; 291 }; 292 293 pfc: pinctrl@e6060000 { 294 compatible = "renesas,pfc-r8a7791"; 295 reg = <0 0xe6060000 0 0x250>; 296 bootph-all; 297 }; 298 299 tpu: pwm@e60f0000 { 300 compatible = "renesas,tpu-r8a7791", "renesas,tpu"; 301 reg = <0 0xe60f0000 0 0x148>; 302 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 303 clocks = <&cpg CPG_MOD 304>; 304 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 305 resets = <&cpg 304>; 306 #pwm-cells = <3>; 307 status = "disabled"; 308 }; 309 310 cpg: clock-controller@e6150000 { 311 compatible = "renesas,r8a7791-cpg-mssr"; 312 reg = <0 0xe6150000 0 0x1000>; 313 clocks = <&extal_clk>, <&usb_extal_clk>; 314 clock-names = "extal", "usb_extal"; 315 #clock-cells = <2>; 316 #power-domain-cells = <0>; 317 #reset-cells = <1>; 318 bootph-all; 319 }; 320 321 apmu@e6152000 { 322 compatible = "renesas,r8a7791-apmu", "renesas,apmu"; 323 reg = <0 0xe6152000 0 0x188>; 324 cpus = <&cpu0>, <&cpu1>; 325 }; 326 327 rst: reset-controller@e6160000 { 328 compatible = "renesas,r8a7791-rst"; 329 reg = <0 0xe6160000 0 0x0100>; 330 bootph-all; 331 }; 332 333 sysc: system-controller@e6180000 { 334 compatible = "renesas,r8a7791-sysc"; 335 reg = <0 0xe6180000 0 0x0200>; 336 #power-domain-cells = <1>; 337 }; 338 339 irqc0: interrupt-controller@e61c0000 { 340 compatible = "renesas,irqc-r8a7791", "renesas,irqc"; 341 #interrupt-cells = <2>; 342 interrupt-controller; 343 reg = <0 0xe61c0000 0 0x200>; 344 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 354 clocks = <&cpg CPG_MOD 407>; 355 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 356 resets = <&cpg 407>; 357 }; 358 359 tmu0: timer@e61e0000 { 360 compatible = "renesas,tmu-r8a7791", "renesas,tmu"; 361 reg = <0 0xe61e0000 0 0x30>; 362 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 365 interrupt-names = "tuni0", "tuni1", "tuni2"; 366 clocks = <&cpg CPG_MOD 125>; 367 clock-names = "fck"; 368 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 369 resets = <&cpg 125>; 370 status = "disabled"; 371 }; 372 373 tmu1: timer@fff60000 { 374 compatible = "renesas,tmu-r8a7791", "renesas,tmu"; 375 reg = <0 0xfff60000 0 0x30>; 376 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 380 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 381 clocks = <&cpg CPG_MOD 111>; 382 clock-names = "fck"; 383 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 384 resets = <&cpg 111>; 385 status = "disabled"; 386 }; 387 388 tmu2: timer@fff70000 { 389 compatible = "renesas,tmu-r8a7791", "renesas,tmu"; 390 reg = <0 0xfff70000 0 0x30>; 391 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 392 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 393 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 395 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 396 clocks = <&cpg CPG_MOD 122>; 397 clock-names = "fck"; 398 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 399 resets = <&cpg 122>; 400 status = "disabled"; 401 }; 402 403 tmu3: timer@fff80000 { 404 compatible = "renesas,tmu-r8a7791", "renesas,tmu"; 405 reg = <0 0xfff80000 0 0x30>; 406 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 407 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 409 interrupt-names = "tuni0", "tuni1", "tuni2"; 410 clocks = <&cpg CPG_MOD 121>; 411 clock-names = "fck"; 412 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 413 resets = <&cpg 121>; 414 status = "disabled"; 415 }; 416 417 thermal: thermal@e61f0000 { 418 compatible = "renesas,thermal-r8a7791", 419 "renesas,rcar-gen2-thermal", 420 "renesas,rcar-thermal"; 421 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 422 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 423 clocks = <&cpg CPG_MOD 522>; 424 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 425 resets = <&cpg 522>; 426 #thermal-sensor-cells = <0>; 427 }; 428 429 ipmmu_sy0: iommu@e6280000 { 430 compatible = "renesas,ipmmu-r8a7791", 431 "renesas,ipmmu-vmsa"; 432 reg = <0 0xe6280000 0 0x1000>; 433 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 435 #iommu-cells = <1>; 436 status = "disabled"; 437 }; 438 439 ipmmu_sy1: iommu@e6290000 { 440 compatible = "renesas,ipmmu-r8a7791", 441 "renesas,ipmmu-vmsa"; 442 reg = <0 0xe6290000 0 0x1000>; 443 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 444 #iommu-cells = <1>; 445 status = "disabled"; 446 }; 447 448 ipmmu_ds: iommu@e6740000 { 449 compatible = "renesas,ipmmu-r8a7791", 450 "renesas,ipmmu-vmsa"; 451 reg = <0 0xe6740000 0 0x1000>; 452 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 454 #iommu-cells = <1>; 455 status = "disabled"; 456 }; 457 458 ipmmu_mp: iommu@ec680000 { 459 compatible = "renesas,ipmmu-r8a7791", 460 "renesas,ipmmu-vmsa"; 461 reg = <0 0xec680000 0 0x1000>; 462 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 463 #iommu-cells = <1>; 464 status = "disabled"; 465 }; 466 467 ipmmu_mx: iommu@fe951000 { 468 compatible = "renesas,ipmmu-r8a7791", 469 "renesas,ipmmu-vmsa"; 470 reg = <0 0xfe951000 0 0x1000>; 471 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 473 #iommu-cells = <1>; 474 status = "disabled"; 475 }; 476 477 ipmmu_rt: iommu@ffc80000 { 478 compatible = "renesas,ipmmu-r8a7791", 479 "renesas,ipmmu-vmsa"; 480 reg = <0 0xffc80000 0 0x1000>; 481 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 482 #iommu-cells = <1>; 483 status = "disabled"; 484 }; 485 486 ipmmu_gp: iommu@e62a0000 { 487 compatible = "renesas,ipmmu-r8a7791", 488 "renesas,ipmmu-vmsa"; 489 reg = <0 0xe62a0000 0 0x1000>; 490 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 492 #iommu-cells = <1>; 493 status = "disabled"; 494 }; 495 496 icram0: sram@e63a0000 { 497 compatible = "mmio-sram"; 498 reg = <0 0xe63a0000 0 0x12000>; 499 #address-cells = <1>; 500 #size-cells = <1>; 501 ranges = <0 0 0xe63a0000 0x12000>; 502 }; 503 504 icram1: sram@e63c0000 { 505 compatible = "mmio-sram"; 506 reg = <0 0xe63c0000 0 0x1000>; 507 #address-cells = <1>; 508 #size-cells = <1>; 509 ranges = <0 0 0xe63c0000 0x1000>; 510 511 smp-sram@0 { 512 compatible = "renesas,smp-sram"; 513 reg = <0 0x100>; 514 }; 515 }; 516 517 /* The memory map in the User's Manual maps the cores to 518 * bus numbers 519 */ 520 i2c0: i2c@e6508000 { 521 #address-cells = <1>; 522 #size-cells = <0>; 523 compatible = "renesas,i2c-r8a7791", 524 "renesas,rcar-gen2-i2c"; 525 reg = <0 0xe6508000 0 0x40>; 526 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 527 clocks = <&cpg CPG_MOD 931>; 528 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 529 resets = <&cpg 931>; 530 i2c-scl-internal-delay-ns = <6>; 531 status = "disabled"; 532 }; 533 534 i2c1: i2c@e6518000 { 535 #address-cells = <1>; 536 #size-cells = <0>; 537 compatible = "renesas,i2c-r8a7791", 538 "renesas,rcar-gen2-i2c"; 539 reg = <0 0xe6518000 0 0x40>; 540 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 541 clocks = <&cpg CPG_MOD 930>; 542 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 543 resets = <&cpg 930>; 544 i2c-scl-internal-delay-ns = <6>; 545 status = "disabled"; 546 }; 547 548 i2c2: i2c@e6530000 { 549 #address-cells = <1>; 550 #size-cells = <0>; 551 compatible = "renesas,i2c-r8a7791", 552 "renesas,rcar-gen2-i2c"; 553 reg = <0 0xe6530000 0 0x40>; 554 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 555 clocks = <&cpg CPG_MOD 929>; 556 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 557 resets = <&cpg 929>; 558 i2c-scl-internal-delay-ns = <6>; 559 status = "disabled"; 560 }; 561 562 i2c3: i2c@e6540000 { 563 #address-cells = <1>; 564 #size-cells = <0>; 565 compatible = "renesas,i2c-r8a7791", 566 "renesas,rcar-gen2-i2c"; 567 reg = <0 0xe6540000 0 0x40>; 568 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 569 clocks = <&cpg CPG_MOD 928>; 570 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 571 resets = <&cpg 928>; 572 i2c-scl-internal-delay-ns = <6>; 573 status = "disabled"; 574 }; 575 576 i2c4: i2c@e6520000 { 577 #address-cells = <1>; 578 #size-cells = <0>; 579 compatible = "renesas,i2c-r8a7791", 580 "renesas,rcar-gen2-i2c"; 581 reg = <0 0xe6520000 0 0x40>; 582 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 927>; 584 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 585 resets = <&cpg 927>; 586 i2c-scl-internal-delay-ns = <6>; 587 status = "disabled"; 588 }; 589 590 i2c5: i2c@e6528000 { 591 /* doesn't need pinmux */ 592 #address-cells = <1>; 593 #size-cells = <0>; 594 compatible = "renesas,i2c-r8a7791", 595 "renesas,rcar-gen2-i2c"; 596 reg = <0 0xe6528000 0 0x40>; 597 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 598 clocks = <&cpg CPG_MOD 925>; 599 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 600 resets = <&cpg 925>; 601 i2c-scl-internal-delay-ns = <110>; 602 status = "disabled"; 603 }; 604 605 i2c6: i2c@e60b0000 { 606 /* doesn't need pinmux */ 607 #address-cells = <1>; 608 #size-cells = <0>; 609 compatible = "renesas,iic-r8a7791", 610 "renesas,rcar-gen2-iic", 611 "renesas,rmobile-iic"; 612 reg = <0 0xe60b0000 0 0x425>; 613 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 926>; 615 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 616 <&dmac1 0x77>, <&dmac1 0x78>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 619 resets = <&cpg 926>; 620 status = "disabled"; 621 }; 622 623 i2c7: i2c@e6500000 { 624 #address-cells = <1>; 625 #size-cells = <0>; 626 compatible = "renesas,iic-r8a7791", 627 "renesas,rcar-gen2-iic", 628 "renesas,rmobile-iic"; 629 reg = <0 0xe6500000 0 0x425>; 630 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 318>; 632 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 633 <&dmac1 0x61>, <&dmac1 0x62>; 634 dma-names = "tx", "rx", "tx", "rx"; 635 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 636 resets = <&cpg 318>; 637 status = "disabled"; 638 }; 639 640 i2c8: i2c@e6510000 { 641 #address-cells = <1>; 642 #size-cells = <0>; 643 compatible = "renesas,iic-r8a7791", 644 "renesas,rcar-gen2-iic", 645 "renesas,rmobile-iic"; 646 reg = <0 0xe6510000 0 0x425>; 647 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 323>; 649 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 650 <&dmac1 0x65>, <&dmac1 0x66>; 651 dma-names = "tx", "rx", "tx", "rx"; 652 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 653 resets = <&cpg 323>; 654 status = "disabled"; 655 }; 656 657 hsusb: usb@e6590000 { 658 compatible = "renesas,usbhs-r8a7791", 659 "renesas,rcar-gen2-usbhs"; 660 reg = <0 0xe6590000 0 0x100>; 661 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 704>; 663 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 664 <&usb_dmac1 0>, <&usb_dmac1 1>; 665 dma-names = "ch0", "ch1", "ch2", "ch3"; 666 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 667 resets = <&cpg 704>; 668 renesas,buswait = <4>; 669 phys = <&usb0 1>; 670 phy-names = "usb"; 671 status = "disabled"; 672 }; 673 674 usbphy: usb-phy-controller@e6590100 { 675 compatible = "renesas,usb-phy-r8a7791", 676 "renesas,rcar-gen2-usb-phy"; 677 reg = <0 0xe6590100 0 0x100>; 678 #address-cells = <1>; 679 #size-cells = <0>; 680 clocks = <&cpg CPG_MOD 704>; 681 clock-names = "usbhs"; 682 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 683 resets = <&cpg 704>; 684 status = "disabled"; 685 686 usb0: usb-phy@0 { 687 reg = <0>; 688 #phy-cells = <1>; 689 }; 690 usb2: usb-phy@2 { 691 reg = <2>; 692 #phy-cells = <1>; 693 }; 694 }; 695 696 usb_dmac0: dma-controller@e65a0000 { 697 compatible = "renesas,r8a7791-usb-dmac", 698 "renesas,usb-dmac"; 699 reg = <0 0xe65a0000 0 0x100>; 700 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 701 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 702 interrupt-names = "ch0", "ch1"; 703 clocks = <&cpg CPG_MOD 330>; 704 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 705 resets = <&cpg 330>; 706 #dma-cells = <1>; 707 dma-channels = <2>; 708 }; 709 710 usb_dmac1: dma-controller@e65b0000 { 711 compatible = "renesas,r8a7791-usb-dmac", 712 "renesas,usb-dmac"; 713 reg = <0 0xe65b0000 0 0x100>; 714 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 716 interrupt-names = "ch0", "ch1"; 717 clocks = <&cpg CPG_MOD 331>; 718 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 719 resets = <&cpg 331>; 720 #dma-cells = <1>; 721 dma-channels = <2>; 722 }; 723 724 dmac0: dma-controller@e6700000 { 725 compatible = "renesas,dmac-r8a7791", 726 "renesas,rcar-dmac"; 727 reg = <0 0xe6700000 0 0x20000>; 728 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 744 interrupt-names = "error", 745 "ch0", "ch1", "ch2", "ch3", 746 "ch4", "ch5", "ch6", "ch7", 747 "ch8", "ch9", "ch10", "ch11", 748 "ch12", "ch13", "ch14"; 749 clocks = <&cpg CPG_MOD 219>; 750 clock-names = "fck"; 751 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 752 resets = <&cpg 219>; 753 #dma-cells = <1>; 754 dma-channels = <15>; 755 }; 756 757 dmac1: dma-controller@e6720000 { 758 compatible = "renesas,dmac-r8a7791", 759 "renesas,rcar-dmac"; 760 reg = <0 0xe6720000 0 0x20000>; 761 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 777 interrupt-names = "error", 778 "ch0", "ch1", "ch2", "ch3", 779 "ch4", "ch5", "ch6", "ch7", 780 "ch8", "ch9", "ch10", "ch11", 781 "ch12", "ch13", "ch14"; 782 clocks = <&cpg CPG_MOD 218>; 783 clock-names = "fck"; 784 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 785 resets = <&cpg 218>; 786 #dma-cells = <1>; 787 dma-channels = <15>; 788 }; 789 790 avb: ethernet@e6800000 { 791 compatible = "renesas,etheravb-r8a7791", 792 "renesas,etheravb-rcar-gen2"; 793 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 794 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 795 clocks = <&cpg CPG_MOD 812>; 796 clock-names = "fck"; 797 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 798 resets = <&cpg 812>; 799 #address-cells = <1>; 800 #size-cells = <0>; 801 status = "disabled"; 802 }; 803 804 qspi: spi@e6b10000 { 805 compatible = "renesas,qspi-r8a7791", "renesas,qspi"; 806 reg = <0 0xe6b10000 0 0x2c>; 807 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 808 clocks = <&cpg CPG_MOD 917>; 809 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 810 <&dmac1 0x17>, <&dmac1 0x18>; 811 dma-names = "tx", "rx", "tx", "rx"; 812 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 813 resets = <&cpg 917>; 814 num-cs = <1>; 815 #address-cells = <1>; 816 #size-cells = <0>; 817 status = "disabled"; 818 }; 819 820 scifa0: serial@e6c40000 { 821 compatible = "renesas,scifa-r8a7791", 822 "renesas,rcar-gen2-scifa", "renesas,scifa"; 823 reg = <0 0xe6c40000 0 64>; 824 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 825 clocks = <&cpg CPG_MOD 204>; 826 clock-names = "fck"; 827 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 828 <&dmac1 0x21>, <&dmac1 0x22>; 829 dma-names = "tx", "rx", "tx", "rx"; 830 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 831 resets = <&cpg 204>; 832 status = "disabled"; 833 }; 834 835 scifa1: serial@e6c50000 { 836 compatible = "renesas,scifa-r8a7791", 837 "renesas,rcar-gen2-scifa", "renesas,scifa"; 838 reg = <0 0xe6c50000 0 64>; 839 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 840 clocks = <&cpg CPG_MOD 203>; 841 clock-names = "fck"; 842 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 843 <&dmac1 0x25>, <&dmac1 0x26>; 844 dma-names = "tx", "rx", "tx", "rx"; 845 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 846 resets = <&cpg 203>; 847 status = "disabled"; 848 }; 849 850 scifa2: serial@e6c60000 { 851 compatible = "renesas,scifa-r8a7791", 852 "renesas,rcar-gen2-scifa", "renesas,scifa"; 853 reg = <0 0xe6c60000 0 64>; 854 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 855 clocks = <&cpg CPG_MOD 202>; 856 clock-names = "fck"; 857 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 858 <&dmac1 0x27>, <&dmac1 0x28>; 859 dma-names = "tx", "rx", "tx", "rx"; 860 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 861 resets = <&cpg 202>; 862 status = "disabled"; 863 }; 864 865 scifa3: serial@e6c70000 { 866 compatible = "renesas,scifa-r8a7791", 867 "renesas,rcar-gen2-scifa", "renesas,scifa"; 868 reg = <0 0xe6c70000 0 64>; 869 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 870 clocks = <&cpg CPG_MOD 1106>; 871 clock-names = "fck"; 872 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 873 <&dmac1 0x1b>, <&dmac1 0x1c>; 874 dma-names = "tx", "rx", "tx", "rx"; 875 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 876 resets = <&cpg 1106>; 877 status = "disabled"; 878 }; 879 880 scifa4: serial@e6c78000 { 881 compatible = "renesas,scifa-r8a7791", 882 "renesas,rcar-gen2-scifa", "renesas,scifa"; 883 reg = <0 0xe6c78000 0 64>; 884 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 885 clocks = <&cpg CPG_MOD 1107>; 886 clock-names = "fck"; 887 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 888 <&dmac1 0x1f>, <&dmac1 0x20>; 889 dma-names = "tx", "rx", "tx", "rx"; 890 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 891 resets = <&cpg 1107>; 892 status = "disabled"; 893 }; 894 895 scifa5: serial@e6c80000 { 896 compatible = "renesas,scifa-r8a7791", 897 "renesas,rcar-gen2-scifa", "renesas,scifa"; 898 reg = <0 0xe6c80000 0 64>; 899 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 900 clocks = <&cpg CPG_MOD 1108>; 901 clock-names = "fck"; 902 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 903 <&dmac1 0x23>, <&dmac1 0x24>; 904 dma-names = "tx", "rx", "tx", "rx"; 905 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 906 resets = <&cpg 1108>; 907 status = "disabled"; 908 }; 909 910 scifb0: serial@e6c20000 { 911 compatible = "renesas,scifb-r8a7791", 912 "renesas,rcar-gen2-scifb", "renesas,scifb"; 913 reg = <0 0xe6c20000 0 0x100>; 914 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 915 clocks = <&cpg CPG_MOD 206>; 916 clock-names = "fck"; 917 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 918 <&dmac1 0x3d>, <&dmac1 0x3e>; 919 dma-names = "tx", "rx", "tx", "rx"; 920 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 921 resets = <&cpg 206>; 922 status = "disabled"; 923 }; 924 925 scifb1: serial@e6c30000 { 926 compatible = "renesas,scifb-r8a7791", 927 "renesas,rcar-gen2-scifb", "renesas,scifb"; 928 reg = <0 0xe6c30000 0 0x100>; 929 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 930 clocks = <&cpg CPG_MOD 207>; 931 clock-names = "fck"; 932 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 933 <&dmac1 0x19>, <&dmac1 0x1a>; 934 dma-names = "tx", "rx", "tx", "rx"; 935 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 936 resets = <&cpg 207>; 937 status = "disabled"; 938 }; 939 940 scifb2: serial@e6ce0000 { 941 compatible = "renesas,scifb-r8a7791", 942 "renesas,rcar-gen2-scifb", "renesas,scifb"; 943 reg = <0 0xe6ce0000 0 0x100>; 944 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 945 clocks = <&cpg CPG_MOD 216>; 946 clock-names = "fck"; 947 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 948 <&dmac1 0x1d>, <&dmac1 0x1e>; 949 dma-names = "tx", "rx", "tx", "rx"; 950 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 951 resets = <&cpg 216>; 952 status = "disabled"; 953 }; 954 955 scif0: serial@e6e60000 { 956 compatible = "renesas,scif-r8a7791", 957 "renesas,rcar-gen2-scif", "renesas,scif"; 958 reg = <0 0xe6e60000 0 64>; 959 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 960 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 961 <&scif_clk>; 962 clock-names = "fck", "brg_int", "scif_clk"; 963 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 964 <&dmac1 0x29>, <&dmac1 0x2a>; 965 dma-names = "tx", "rx", "tx", "rx"; 966 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 967 resets = <&cpg 721>; 968 status = "disabled"; 969 }; 970 971 scif1: serial@e6e68000 { 972 compatible = "renesas,scif-r8a7791", 973 "renesas,rcar-gen2-scif", "renesas,scif"; 974 reg = <0 0xe6e68000 0 64>; 975 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 977 <&scif_clk>; 978 clock-names = "fck", "brg_int", "scif_clk"; 979 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 980 <&dmac1 0x2d>, <&dmac1 0x2e>; 981 dma-names = "tx", "rx", "tx", "rx"; 982 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 983 resets = <&cpg 720>; 984 status = "disabled"; 985 }; 986 987 scif2: serial@e6e58000 { 988 compatible = "renesas,scif-r8a7791", 989 "renesas,rcar-gen2-scif", "renesas,scif"; 990 reg = <0 0xe6e58000 0 64>; 991 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 992 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 993 <&scif_clk>; 994 clock-names = "fck", "brg_int", "scif_clk"; 995 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 996 <&dmac1 0x2b>, <&dmac1 0x2c>; 997 dma-names = "tx", "rx", "tx", "rx"; 998 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 999 resets = <&cpg 719>; 1000 status = "disabled"; 1001 }; 1002 1003 scif3: serial@e6ea8000 { 1004 compatible = "renesas,scif-r8a7791", 1005 "renesas,rcar-gen2-scif", "renesas,scif"; 1006 reg = <0 0xe6ea8000 0 64>; 1007 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1008 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1009 <&scif_clk>; 1010 clock-names = "fck", "brg_int", "scif_clk"; 1011 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 1012 <&dmac1 0x2f>, <&dmac1 0x30>; 1013 dma-names = "tx", "rx", "tx", "rx"; 1014 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1015 resets = <&cpg 718>; 1016 status = "disabled"; 1017 }; 1018 1019 scif4: serial@e6ee0000 { 1020 compatible = "renesas,scif-r8a7791", 1021 "renesas,rcar-gen2-scif", "renesas,scif"; 1022 reg = <0 0xe6ee0000 0 64>; 1023 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1025 <&scif_clk>; 1026 clock-names = "fck", "brg_int", "scif_clk"; 1027 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 1028 <&dmac1 0xfb>, <&dmac1 0xfc>; 1029 dma-names = "tx", "rx", "tx", "rx"; 1030 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1031 resets = <&cpg 715>; 1032 status = "disabled"; 1033 }; 1034 1035 scif5: serial@e6ee8000 { 1036 compatible = "renesas,scif-r8a7791", 1037 "renesas,rcar-gen2-scif", "renesas,scif"; 1038 reg = <0 0xe6ee8000 0 64>; 1039 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1041 <&scif_clk>; 1042 clock-names = "fck", "brg_int", "scif_clk"; 1043 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 1044 <&dmac1 0xfd>, <&dmac1 0xfe>; 1045 dma-names = "tx", "rx", "tx", "rx"; 1046 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1047 resets = <&cpg 714>; 1048 status = "disabled"; 1049 }; 1050 1051 hscif0: serial@e62c0000 { 1052 compatible = "renesas,hscif-r8a7791", 1053 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1054 reg = <0 0xe62c0000 0 96>; 1055 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 1056 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1057 <&scif_clk>; 1058 clock-names = "fck", "brg_int", "scif_clk"; 1059 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 1060 <&dmac1 0x39>, <&dmac1 0x3a>; 1061 dma-names = "tx", "rx", "tx", "rx"; 1062 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1063 resets = <&cpg 717>; 1064 status = "disabled"; 1065 }; 1066 1067 hscif1: serial@e62c8000 { 1068 compatible = "renesas,hscif-r8a7791", 1069 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1070 reg = <0 0xe62c8000 0 96>; 1071 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 1072 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1073 <&scif_clk>; 1074 clock-names = "fck", "brg_int", "scif_clk"; 1075 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 1076 <&dmac1 0x4d>, <&dmac1 0x4e>; 1077 dma-names = "tx", "rx", "tx", "rx"; 1078 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1079 resets = <&cpg 716>; 1080 status = "disabled"; 1081 }; 1082 1083 hscif2: serial@e62d0000 { 1084 compatible = "renesas,hscif-r8a7791", 1085 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1086 reg = <0 0xe62d0000 0 96>; 1087 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1088 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1089 <&scif_clk>; 1090 clock-names = "fck", "brg_int", "scif_clk"; 1091 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1092 <&dmac1 0x3b>, <&dmac1 0x3c>; 1093 dma-names = "tx", "rx", "tx", "rx"; 1094 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1095 resets = <&cpg 713>; 1096 status = "disabled"; 1097 }; 1098 1099 msiof0: spi@e6e20000 { 1100 compatible = "renesas,msiof-r8a7791", 1101 "renesas,rcar-gen2-msiof"; 1102 reg = <0 0xe6e20000 0 0x0064>; 1103 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1104 clocks = <&cpg CPG_MOD 000>; 1105 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1106 <&dmac1 0x51>, <&dmac1 0x52>; 1107 dma-names = "tx", "rx", "tx", "rx"; 1108 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1109 resets = <&cpg 0>; 1110 #address-cells = <1>; 1111 #size-cells = <0>; 1112 status = "disabled"; 1113 }; 1114 1115 msiof1: spi@e6e10000 { 1116 compatible = "renesas,msiof-r8a7791", 1117 "renesas,rcar-gen2-msiof"; 1118 reg = <0 0xe6e10000 0 0x0064>; 1119 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1120 clocks = <&cpg CPG_MOD 208>; 1121 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1122 <&dmac1 0x55>, <&dmac1 0x56>; 1123 dma-names = "tx", "rx", "tx", "rx"; 1124 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1125 resets = <&cpg 208>; 1126 #address-cells = <1>; 1127 #size-cells = <0>; 1128 status = "disabled"; 1129 }; 1130 1131 msiof2: spi@e6e00000 { 1132 compatible = "renesas,msiof-r8a7791", 1133 "renesas,rcar-gen2-msiof"; 1134 reg = <0 0xe6e00000 0 0x0064>; 1135 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1136 clocks = <&cpg CPG_MOD 205>; 1137 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1138 <&dmac1 0x41>, <&dmac1 0x42>; 1139 dma-names = "tx", "rx", "tx", "rx"; 1140 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1141 resets = <&cpg 205>; 1142 #address-cells = <1>; 1143 #size-cells = <0>; 1144 status = "disabled"; 1145 }; 1146 1147 pwm0: pwm@e6e30000 { 1148 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1149 reg = <0 0xe6e30000 0 0x8>; 1150 clocks = <&cpg CPG_MOD 523>; 1151 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1152 resets = <&cpg 523>; 1153 #pwm-cells = <2>; 1154 status = "disabled"; 1155 }; 1156 1157 pwm1: pwm@e6e31000 { 1158 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1159 reg = <0 0xe6e31000 0 0x8>; 1160 clocks = <&cpg CPG_MOD 523>; 1161 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1162 resets = <&cpg 523>; 1163 #pwm-cells = <2>; 1164 status = "disabled"; 1165 }; 1166 1167 pwm2: pwm@e6e32000 { 1168 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1169 reg = <0 0xe6e32000 0 0x8>; 1170 clocks = <&cpg CPG_MOD 523>; 1171 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1172 resets = <&cpg 523>; 1173 #pwm-cells = <2>; 1174 status = "disabled"; 1175 }; 1176 1177 pwm3: pwm@e6e33000 { 1178 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1179 reg = <0 0xe6e33000 0 0x8>; 1180 clocks = <&cpg CPG_MOD 523>; 1181 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1182 resets = <&cpg 523>; 1183 #pwm-cells = <2>; 1184 status = "disabled"; 1185 }; 1186 1187 pwm4: pwm@e6e34000 { 1188 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1189 reg = <0 0xe6e34000 0 0x8>; 1190 clocks = <&cpg CPG_MOD 523>; 1191 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1192 resets = <&cpg 523>; 1193 #pwm-cells = <2>; 1194 status = "disabled"; 1195 }; 1196 1197 pwm5: pwm@e6e35000 { 1198 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1199 reg = <0 0xe6e35000 0 0x8>; 1200 clocks = <&cpg CPG_MOD 523>; 1201 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1202 resets = <&cpg 523>; 1203 #pwm-cells = <2>; 1204 status = "disabled"; 1205 }; 1206 1207 pwm6: pwm@e6e36000 { 1208 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1209 reg = <0 0xe6e36000 0 0x8>; 1210 clocks = <&cpg CPG_MOD 523>; 1211 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1212 resets = <&cpg 523>; 1213 #pwm-cells = <2>; 1214 status = "disabled"; 1215 }; 1216 1217 adc: adc@e6e54000 { 1218 compatible = "renesas,r8a7791-gyroadc", 1219 "renesas,rcar-gyroadc"; 1220 reg = <0 0xe6e54000 0 64>; 1221 clocks = <&cpg CPG_MOD 901>; 1222 clock-names = "fck"; 1223 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1224 resets = <&cpg 901>; 1225 status = "disabled"; 1226 }; 1227 1228 can0: can@e6e80000 { 1229 compatible = "renesas,can-r8a7791", 1230 "renesas,rcar-gen2-can"; 1231 reg = <0 0xe6e80000 0 0x1000>; 1232 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1233 clocks = <&cpg CPG_MOD 916>, 1234 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1235 clock-names = "clkp1", "clkp2", "can_clk"; 1236 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1237 resets = <&cpg 916>; 1238 status = "disabled"; 1239 }; 1240 1241 can1: can@e6e88000 { 1242 compatible = "renesas,can-r8a7791", 1243 "renesas,rcar-gen2-can"; 1244 reg = <0 0xe6e88000 0 0x1000>; 1245 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1246 clocks = <&cpg CPG_MOD 915>, 1247 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1248 clock-names = "clkp1", "clkp2", "can_clk"; 1249 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1250 resets = <&cpg 915>; 1251 status = "disabled"; 1252 }; 1253 1254 vin0: video@e6ef0000 { 1255 compatible = "renesas,vin-r8a7791", 1256 "renesas,rcar-gen2-vin"; 1257 reg = <0 0xe6ef0000 0 0x1000>; 1258 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1259 clocks = <&cpg CPG_MOD 811>; 1260 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1261 resets = <&cpg 811>; 1262 status = "disabled"; 1263 }; 1264 1265 vin1: video@e6ef1000 { 1266 compatible = "renesas,vin-r8a7791", 1267 "renesas,rcar-gen2-vin"; 1268 reg = <0 0xe6ef1000 0 0x1000>; 1269 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1270 clocks = <&cpg CPG_MOD 810>; 1271 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1272 resets = <&cpg 810>; 1273 status = "disabled"; 1274 }; 1275 1276 vin2: video@e6ef2000 { 1277 compatible = "renesas,vin-r8a7791", 1278 "renesas,rcar-gen2-vin"; 1279 reg = <0 0xe6ef2000 0 0x1000>; 1280 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1281 clocks = <&cpg CPG_MOD 809>; 1282 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1283 resets = <&cpg 809>; 1284 status = "disabled"; 1285 }; 1286 1287 rcar_sound: sound@ec500000 { 1288 /* 1289 * #sound-dai-cells is required if simple-card 1290 * 1291 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1292 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1293 */ 1294 compatible = "renesas,rcar_sound-r8a7791", 1295 "renesas,rcar_sound-gen2"; 1296 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1297 <0 0xec5a0000 0 0x100>, /* ADG */ 1298 <0 0xec540000 0 0x1000>, /* SSIU */ 1299 <0 0xec541000 0 0x280>, /* SSI */ 1300 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1301 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1302 1303 clocks = <&cpg CPG_MOD 1005>, 1304 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1305 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1306 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1307 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1308 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1309 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1310 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1311 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1312 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1313 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1314 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1315 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1316 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1317 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1318 <&cpg CPG_CORE R8A7791_CLK_M2>; 1319 clock-names = "ssi-all", 1320 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1321 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1322 "ssi.1", "ssi.0", "src.9", "src.8", 1323 "src.7", "src.6", "src.5", "src.4", 1324 "src.3", "src.2", "src.1", "src.0", 1325 "ctu.0", "ctu.1", 1326 "mix.0", "mix.1", 1327 "dvc.0", "dvc.1", 1328 "clk_a", "clk_b", "clk_c", "clk_i"; 1329 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1330 resets = <&cpg 1005>, 1331 <&cpg 1006>, <&cpg 1007>, 1332 <&cpg 1008>, <&cpg 1009>, 1333 <&cpg 1010>, <&cpg 1011>, 1334 <&cpg 1012>, <&cpg 1013>, 1335 <&cpg 1014>, <&cpg 1015>; 1336 reset-names = "ssi-all", 1337 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1338 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1339 "ssi.1", "ssi.0"; 1340 1341 status = "disabled"; 1342 1343 rcar_sound,dvc { 1344 dvc0: dvc-0 { 1345 dmas = <&audma1 0xbc>; 1346 dma-names = "tx"; 1347 }; 1348 dvc1: dvc-1 { 1349 dmas = <&audma1 0xbe>; 1350 dma-names = "tx"; 1351 }; 1352 }; 1353 1354 rcar_sound,mix { 1355 mix0: mix-0 { }; 1356 mix1: mix-1 { }; 1357 }; 1358 1359 rcar_sound,ctu { 1360 ctu00: ctu-0 { }; 1361 ctu01: ctu-1 { }; 1362 ctu02: ctu-2 { }; 1363 ctu03: ctu-3 { }; 1364 ctu10: ctu-4 { }; 1365 ctu11: ctu-5 { }; 1366 ctu12: ctu-6 { }; 1367 ctu13: ctu-7 { }; 1368 }; 1369 1370 rcar_sound,src { 1371 src0: src-0 { 1372 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1373 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1374 dma-names = "rx", "tx"; 1375 }; 1376 src1: src-1 { 1377 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1378 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1379 dma-names = "rx", "tx"; 1380 }; 1381 src2: src-2 { 1382 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1383 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1384 dma-names = "rx", "tx"; 1385 }; 1386 src3: src-3 { 1387 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1388 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1389 dma-names = "rx", "tx"; 1390 }; 1391 src4: src-4 { 1392 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1393 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1394 dma-names = "rx", "tx"; 1395 }; 1396 src5: src-5 { 1397 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1398 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1399 dma-names = "rx", "tx"; 1400 }; 1401 src6: src-6 { 1402 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1403 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1404 dma-names = "rx", "tx"; 1405 }; 1406 src7: src-7 { 1407 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1408 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1409 dma-names = "rx", "tx"; 1410 }; 1411 src8: src-8 { 1412 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1413 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1414 dma-names = "rx", "tx"; 1415 }; 1416 src9: src-9 { 1417 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1418 dmas = <&audma0 0x97>, <&audma1 0xba>; 1419 dma-names = "rx", "tx"; 1420 }; 1421 }; 1422 1423 rcar_sound,ssi { 1424 ssi0: ssi-0 { 1425 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1426 dmas = <&audma0 0x01>, <&audma1 0x02>, 1427 <&audma0 0x15>, <&audma1 0x16>; 1428 dma-names = "rx", "tx", "rxu", "txu"; 1429 }; 1430 ssi1: ssi-1 { 1431 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1432 dmas = <&audma0 0x03>, <&audma1 0x04>, 1433 <&audma0 0x49>, <&audma1 0x4a>; 1434 dma-names = "rx", "tx", "rxu", "txu"; 1435 }; 1436 ssi2: ssi-2 { 1437 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1438 dmas = <&audma0 0x05>, <&audma1 0x06>, 1439 <&audma0 0x63>, <&audma1 0x64>; 1440 dma-names = "rx", "tx", "rxu", "txu"; 1441 }; 1442 ssi3: ssi-3 { 1443 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1444 dmas = <&audma0 0x07>, <&audma1 0x08>, 1445 <&audma0 0x6f>, <&audma1 0x70>; 1446 dma-names = "rx", "tx", "rxu", "txu"; 1447 }; 1448 ssi4: ssi-4 { 1449 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1450 dmas = <&audma0 0x09>, <&audma1 0x0a>, 1451 <&audma0 0x71>, <&audma1 0x72>; 1452 dma-names = "rx", "tx", "rxu", "txu"; 1453 }; 1454 ssi5: ssi-5 { 1455 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1456 dmas = <&audma0 0x0b>, <&audma1 0x0c>, 1457 <&audma0 0x73>, <&audma1 0x74>; 1458 dma-names = "rx", "tx", "rxu", "txu"; 1459 }; 1460 ssi6: ssi-6 { 1461 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1462 dmas = <&audma0 0x0d>, <&audma1 0x0e>, 1463 <&audma0 0x75>, <&audma1 0x76>; 1464 dma-names = "rx", "tx", "rxu", "txu"; 1465 }; 1466 ssi7: ssi-7 { 1467 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1468 dmas = <&audma0 0x0f>, <&audma1 0x10>, 1469 <&audma0 0x79>, <&audma1 0x7a>; 1470 dma-names = "rx", "tx", "rxu", "txu"; 1471 }; 1472 ssi8: ssi-8 { 1473 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1474 dmas = <&audma0 0x11>, <&audma1 0x12>, 1475 <&audma0 0x7b>, <&audma1 0x7c>; 1476 dma-names = "rx", "tx", "rxu", "txu"; 1477 }; 1478 ssi9: ssi-9 { 1479 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1480 dmas = <&audma0 0x13>, <&audma1 0x14>, 1481 <&audma0 0x7d>, <&audma1 0x7e>; 1482 dma-names = "rx", "tx", "rxu", "txu"; 1483 }; 1484 }; 1485 }; 1486 1487 audma0: dma-controller@ec700000 { 1488 compatible = "renesas,dmac-r8a7791", 1489 "renesas,rcar-dmac"; 1490 reg = <0 0xec700000 0 0x10000>; 1491 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1492 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1493 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1494 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1495 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1496 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1497 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1498 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1499 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1500 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1501 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1502 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1503 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1504 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1505 interrupt-names = "error", 1506 "ch0", "ch1", "ch2", "ch3", 1507 "ch4", "ch5", "ch6", "ch7", 1508 "ch8", "ch9", "ch10", "ch11", 1509 "ch12"; 1510 clocks = <&cpg CPG_MOD 502>; 1511 clock-names = "fck"; 1512 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1513 resets = <&cpg 502>; 1514 #dma-cells = <1>; 1515 dma-channels = <13>; 1516 }; 1517 1518 audma1: dma-controller@ec720000 { 1519 compatible = "renesas,dmac-r8a7791", 1520 "renesas,rcar-dmac"; 1521 reg = <0 0xec720000 0 0x10000>; 1522 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1523 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1524 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1525 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1526 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1527 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1528 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1529 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1530 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1531 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1532 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1533 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1534 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1535 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1536 interrupt-names = "error", 1537 "ch0", "ch1", "ch2", "ch3", 1538 "ch4", "ch5", "ch6", "ch7", 1539 "ch8", "ch9", "ch10", "ch11", 1540 "ch12"; 1541 clocks = <&cpg CPG_MOD 501>; 1542 clock-names = "fck"; 1543 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1544 resets = <&cpg 501>; 1545 #dma-cells = <1>; 1546 dma-channels = <13>; 1547 }; 1548 1549 xhci: usb@ee000000 { 1550 compatible = "renesas,xhci-r8a7791", 1551 "renesas,rcar-gen2-xhci"; 1552 reg = <0 0xee000000 0 0xc00>; 1553 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1554 clocks = <&cpg CPG_MOD 328>; 1555 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1556 resets = <&cpg 328>; 1557 phys = <&usb2 1>; 1558 phy-names = "usb"; 1559 status = "disabled"; 1560 }; 1561 1562 pci0: pci@ee090000 { 1563 compatible = "renesas,pci-r8a7791", 1564 "renesas,pci-rcar-gen2"; 1565 device_type = "pci"; 1566 reg = <0 0xee090000 0 0xc00>, 1567 <0 0xee080000 0 0x1100>; 1568 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1569 clocks = <&cpg CPG_MOD 703>; 1570 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1571 resets = <&cpg 703>; 1572 status = "disabled"; 1573 1574 bus-range = <0 0>; 1575 #address-cells = <3>; 1576 #size-cells = <2>; 1577 #interrupt-cells = <1>; 1578 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1579 interrupt-map-mask = <0xf800 0 0 0x7>; 1580 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1581 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1582 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1583 1584 usb@1,0 { 1585 reg = <0x800 0 0 0 0>; 1586 phys = <&usb0 0>; 1587 phy-names = "usb"; 1588 }; 1589 1590 usb@2,0 { 1591 reg = <0x1000 0 0 0 0>; 1592 phys = <&usb0 0>; 1593 phy-names = "usb"; 1594 }; 1595 }; 1596 1597 pci1: pci@ee0d0000 { 1598 compatible = "renesas,pci-r8a7791", 1599 "renesas,pci-rcar-gen2"; 1600 device_type = "pci"; 1601 reg = <0 0xee0d0000 0 0xc00>, 1602 <0 0xee0c0000 0 0x1100>; 1603 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1604 clocks = <&cpg CPG_MOD 703>; 1605 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1606 resets = <&cpg 703>; 1607 status = "disabled"; 1608 1609 bus-range = <1 1>; 1610 #address-cells = <3>; 1611 #size-cells = <2>; 1612 #interrupt-cells = <1>; 1613 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1614 interrupt-map-mask = <0xf800 0 0 0x7>; 1615 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1616 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1617 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1618 1619 usb@1,0 { 1620 reg = <0x10800 0 0 0 0>; 1621 phys = <&usb2 0>; 1622 phy-names = "usb"; 1623 }; 1624 1625 usb@2,0 { 1626 reg = <0x11000 0 0 0 0>; 1627 phys = <&usb2 0>; 1628 phy-names = "usb"; 1629 }; 1630 }; 1631 1632 sdhi0: mmc@ee100000 { 1633 compatible = "renesas,sdhi-r8a7791", 1634 "renesas,rcar-gen2-sdhi"; 1635 reg = <0 0xee100000 0 0x328>; 1636 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 314>; 1638 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1639 <&dmac1 0xcd>, <&dmac1 0xce>; 1640 dma-names = "tx", "rx", "tx", "rx"; 1641 max-frequency = <195000000>; 1642 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1643 resets = <&cpg 314>; 1644 status = "disabled"; 1645 }; 1646 1647 sdhi1: mmc@ee140000 { 1648 compatible = "renesas,sdhi-r8a7791", 1649 "renesas,rcar-gen2-sdhi"; 1650 reg = <0 0xee140000 0 0x100>; 1651 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1652 clocks = <&cpg CPG_MOD 312>; 1653 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1654 <&dmac1 0xc1>, <&dmac1 0xc2>; 1655 dma-names = "tx", "rx", "tx", "rx"; 1656 max-frequency = <97500000>; 1657 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1658 resets = <&cpg 312>; 1659 status = "disabled"; 1660 }; 1661 1662 sdhi2: mmc@ee160000 { 1663 compatible = "renesas,sdhi-r8a7791", 1664 "renesas,rcar-gen2-sdhi"; 1665 reg = <0 0xee160000 0 0x100>; 1666 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1667 clocks = <&cpg CPG_MOD 311>; 1668 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1669 <&dmac1 0xd3>, <&dmac1 0xd4>; 1670 dma-names = "tx", "rx", "tx", "rx"; 1671 max-frequency = <97500000>; 1672 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1673 resets = <&cpg 311>; 1674 status = "disabled"; 1675 }; 1676 1677 mmcif0: mmc@ee200000 { 1678 compatible = "renesas,mmcif-r8a7791", 1679 "renesas,sh-mmcif"; 1680 reg = <0 0xee200000 0 0x80>; 1681 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1682 clocks = <&cpg CPG_MOD 315>; 1683 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1684 <&dmac1 0xd1>, <&dmac1 0xd2>; 1685 dma-names = "tx", "rx", "tx", "rx"; 1686 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1687 resets = <&cpg 315>; 1688 status = "disabled"; 1689 max-frequency = <97500000>; 1690 }; 1691 1692 sata0: sata@ee300000 { 1693 compatible = "renesas,sata-r8a7791", 1694 "renesas,rcar-gen2-sata"; 1695 reg = <0 0xee300000 0 0x200000>; 1696 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1697 clocks = <&cpg CPG_MOD 815>; 1698 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1699 resets = <&cpg 815>; 1700 status = "disabled"; 1701 }; 1702 1703 sata1: sata@ee500000 { 1704 compatible = "renesas,sata-r8a7791", 1705 "renesas,rcar-gen2-sata"; 1706 reg = <0 0xee500000 0 0x200000>; 1707 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1708 clocks = <&cpg CPG_MOD 814>; 1709 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1710 resets = <&cpg 814>; 1711 status = "disabled"; 1712 }; 1713 1714 ether: ethernet@ee700000 { 1715 compatible = "renesas,ether-r8a7791", 1716 "renesas,rcar-gen2-ether"; 1717 reg = <0 0xee700000 0 0x400>; 1718 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 813>; 1720 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1721 resets = <&cpg 813>; 1722 phy-mode = "rmii"; 1723 #address-cells = <1>; 1724 #size-cells = <0>; 1725 status = "disabled"; 1726 }; 1727 1728 gic: interrupt-controller@f1001000 { 1729 compatible = "arm,gic-400"; 1730 #interrupt-cells = <3>; 1731 #address-cells = <0>; 1732 interrupt-controller; 1733 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1734 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1735 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1736 clocks = <&cpg CPG_MOD 408>; 1737 clock-names = "clk"; 1738 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1739 resets = <&cpg 408>; 1740 }; 1741 1742 pciec: pcie@fe000000 { 1743 compatible = "renesas,pcie-r8a7791", 1744 "renesas,pcie-rcar-gen2"; 1745 reg = <0 0xfe000000 0 0x80000>; 1746 #address-cells = <3>; 1747 #size-cells = <2>; 1748 bus-range = <0x00 0xff>; 1749 device_type = "pci"; 1750 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1751 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1752 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1753 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1754 /* Map all possible DDR as inbound ranges */ 1755 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1756 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1757 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1758 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1759 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1760 #interrupt-cells = <1>; 1761 interrupt-map-mask = <0 0 0 0>; 1762 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1763 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1764 clock-names = "pcie", "pcie_bus"; 1765 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1766 resets = <&cpg 319>; 1767 status = "disabled"; 1768 }; 1769 1770 vsp@fe928000 { 1771 compatible = "renesas,vsp1"; 1772 reg = <0 0xfe928000 0 0x8000>; 1773 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1774 clocks = <&cpg CPG_MOD 131>; 1775 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1776 resets = <&cpg 131>; 1777 }; 1778 1779 vsp@fe930000 { 1780 compatible = "renesas,vsp1"; 1781 reg = <0 0xfe930000 0 0x8000>; 1782 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1783 clocks = <&cpg CPG_MOD 128>; 1784 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1785 resets = <&cpg 128>; 1786 }; 1787 1788 vsp@fe938000 { 1789 compatible = "renesas,vsp1"; 1790 reg = <0 0xfe938000 0 0x8000>; 1791 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1792 clocks = <&cpg CPG_MOD 127>; 1793 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1794 resets = <&cpg 127>; 1795 }; 1796 1797 fdp1@fe940000 { 1798 compatible = "renesas,fdp1"; 1799 reg = <0 0xfe940000 0 0x2400>; 1800 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1801 clocks = <&cpg CPG_MOD 119>; 1802 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1803 resets = <&cpg 119>; 1804 }; 1805 1806 fdp1@fe944000 { 1807 compatible = "renesas,fdp1"; 1808 reg = <0 0xfe944000 0 0x2400>; 1809 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1810 clocks = <&cpg CPG_MOD 118>; 1811 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1812 resets = <&cpg 118>; 1813 }; 1814 1815 jpu: jpeg-codec@fe980000 { 1816 compatible = "renesas,jpu-r8a7791", 1817 "renesas,rcar-gen2-jpu"; 1818 reg = <0 0xfe980000 0 0x10300>; 1819 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 1820 clocks = <&cpg CPG_MOD 106>; 1821 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1822 resets = <&cpg 106>; 1823 }; 1824 1825 du: display@feb00000 { 1826 compatible = "renesas,du-r8a7791"; 1827 reg = <0 0xfeb00000 0 0x40000>; 1828 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1829 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1830 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1831 clock-names = "du.0", "du.1"; 1832 resets = <&cpg 724>; 1833 reset-names = "du.0"; 1834 status = "disabled"; 1835 1836 ports { 1837 #address-cells = <1>; 1838 #size-cells = <0>; 1839 1840 port@0 { 1841 reg = <0>; 1842 du_out_rgb: endpoint { 1843 }; 1844 }; 1845 port@1 { 1846 reg = <1>; 1847 du_out_lvds0: endpoint { 1848 remote-endpoint = <&lvds0_in>; 1849 }; 1850 }; 1851 }; 1852 }; 1853 1854 lvds0: lvds@feb90000 { 1855 compatible = "renesas,r8a7791-lvds"; 1856 reg = <0 0xfeb90000 0 0x1c>; 1857 clocks = <&cpg CPG_MOD 726>; 1858 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1859 resets = <&cpg 726>; 1860 status = "disabled"; 1861 1862 ports { 1863 #address-cells = <1>; 1864 #size-cells = <0>; 1865 1866 port@0 { 1867 reg = <0>; 1868 lvds0_in: endpoint { 1869 remote-endpoint = <&du_out_lvds0>; 1870 }; 1871 }; 1872 port@1 { 1873 reg = <1>; 1874 lvds0_out: endpoint { 1875 }; 1876 }; 1877 }; 1878 }; 1879 1880 prr: chipid@ff000044 { 1881 compatible = "renesas,prr"; 1882 reg = <0 0xff000044 0 4>; 1883 bootph-all; 1884 }; 1885 1886 cmt0: timer@ffca0000 { 1887 compatible = "renesas,r8a7791-cmt0", 1888 "renesas,rcar-gen2-cmt0"; 1889 reg = <0 0xffca0000 0 0x1004>; 1890 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1891 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1892 clocks = <&cpg CPG_MOD 124>; 1893 clock-names = "fck"; 1894 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1895 resets = <&cpg 124>; 1896 1897 status = "disabled"; 1898 }; 1899 1900 cmt1: timer@e6130000 { 1901 compatible = "renesas,r8a7791-cmt1", 1902 "renesas,rcar-gen2-cmt1"; 1903 reg = <0 0xe6130000 0 0x1004>; 1904 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1905 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1906 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1907 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1908 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1909 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1910 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1911 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1912 clocks = <&cpg CPG_MOD 329>; 1913 clock-names = "fck"; 1914 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1915 resets = <&cpg 329>; 1916 1917 status = "disabled"; 1918 }; 1919 }; 1920 1921 thermal-zones { 1922 cpu_thermal: cpu-thermal { 1923 polling-delay-passive = <0>; 1924 polling-delay = <0>; 1925 1926 thermal-sensors = <&thermal>; 1927 1928 trips { 1929 cpu-crit { 1930 temperature = <95000>; 1931 hysteresis = <0>; 1932 type = "critical"; 1933 }; 1934 }; 1935 cooling-maps { 1936 }; 1937 }; 1938 }; 1939 1940 timer { 1941 compatible = "arm,armv7-timer"; 1942 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1943 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1944 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1945 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1946 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 1947 }; 1948 1949 /* External USB clock - can be overridden by the board */ 1950 usb_extal_clk: usb_extal { 1951 compatible = "fixed-clock"; 1952 #clock-cells = <0>; 1953 clock-frequency = <48000000>; 1954 bootph-all; 1955 }; 1956}; 1957