1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R7S9210 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corporation 6 * 7 */ 8 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r7s9210-cpg-mssr.h> 11 12/ { 13 compatible = "renesas,r7s9210"; 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 /* External clocks */ 19 extal_clk: extal { 20 #clock-cells = <0>; 21 compatible = "fixed-clock"; 22 /* Value must be set by board */ 23 clock-frequency = <0>; 24 }; 25 26 rtc_x1_clk: rtc_x1 { 27 #clock-cells = <0>; 28 compatible = "fixed-clock"; 29 /* If clk present, value (32678) must be set by board */ 30 clock-frequency = <0>; 31 }; 32 33 usb_x1_clk: usb_x1 { 34 #clock-cells = <0>; 35 compatible = "fixed-clock"; 36 /* If clk present, value (48000000) must be set by board */ 37 clock-frequency = <0>; 38 }; 39 40 cpus { 41 #address-cells = <1>; 42 #size-cells = <0>; 43 44 cpu@0 { 45 device_type = "cpu"; 46 compatible = "arm,cortex-a9"; 47 reg = <0>; 48 clock-frequency = <528000000>; 49 next-level-cache = <&L2>; 50 }; 51 }; 52 53 soc { 54 compatible = "simple-bus"; 55 56 #address-cells = <1>; 57 #size-cells = <1>; 58 ranges; 59 60 L2: cache-controller@1f003000 { 61 compatible = "arm,pl310-cache"; 62 reg = <0x1f003000 0x1000>; 63 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 64 arm,early-bresp-disable; 65 arm,full-line-zero-disable; 66 cache-unified; 67 cache-level = <2>; 68 }; 69 70 scif0: serial@e8007000 { 71 compatible = "renesas,scif-r7s9210"; 72 reg = <0xe8007000 0x18>; 73 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 74 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 75 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 76 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 77 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 78 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 79 interrupt-names = "eri", "rxi", "txi", 80 "bri", "dri", "tei"; 81 clocks = <&cpg CPG_MOD 47>; 82 clock-names = "fck"; 83 power-domains = <&cpg>; 84 status = "disabled"; 85 }; 86 87 scif1: serial@e8007800 { 88 compatible = "renesas,scif-r7s9210"; 89 reg = <0xe8007800 0x18>; 90 interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 91 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 92 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 93 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 94 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 95 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>; 96 interrupt-names = "eri", "rxi", "txi", 97 "bri", "dri", "tei"; 98 clocks = <&cpg CPG_MOD 46>; 99 clock-names = "fck"; 100 power-domains = <&cpg>; 101 status = "disabled"; 102 }; 103 104 scif2: serial@e8008000 { 105 compatible = "renesas,scif-r7s9210"; 106 reg = <0xe8008000 0x18>; 107 interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, 108 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 109 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 110 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, 111 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 112 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; 113 interrupt-names = "eri", "rxi", "txi", 114 "bri", "dri", "tei"; 115 clocks = <&cpg CPG_MOD 45>; 116 clock-names = "fck"; 117 power-domains = <&cpg>; 118 status = "disabled"; 119 }; 120 121 scif3: serial@e8008800 { 122 compatible = "renesas,scif-r7s9210"; 123 reg = <0xe8008800 0x18>; 124 interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 125 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 126 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, 127 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 128 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, 129 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 130 interrupt-names = "eri", "rxi", "txi", 131 "bri", "dri", "tei"; 132 clocks = <&cpg CPG_MOD 44>; 133 clock-names = "fck"; 134 power-domains = <&cpg>; 135 status = "disabled"; 136 }; 137 138 scif4: serial@e8009000 { 139 compatible = "renesas,scif-r7s9210"; 140 reg = <0xe8009000 0x18>; 141 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 142 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 143 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, 144 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 145 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 146 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; 147 interrupt-names = "eri", "rxi", "txi", 148 "bri", "dri", "tei"; 149 clocks = <&cpg CPG_MOD 43>; 150 clock-names = "fck"; 151 power-domains = <&cpg>; 152 status = "disabled"; 153 }; 154 155 spi0: spi@e800c800 { 156 compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz"; 157 reg = <0xe800c800 0x24>; 158 interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 159 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 160 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>; 161 interrupt-names = "error", "rx", "tx"; 162 clocks = <&cpg CPG_MOD 97>; 163 power-domains = <&cpg>; 164 num-cs = <1>; 165 #address-cells = <1>; 166 #size-cells = <0>; 167 status = "disabled"; 168 }; 169 170 spi1: spi@e800d000 { 171 compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz"; 172 reg = <0xe800d000 0x24>; 173 interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 174 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 175 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>; 176 interrupt-names = "error", "rx", "tx"; 177 clocks = <&cpg CPG_MOD 96>; 178 power-domains = <&cpg>; 179 num-cs = <1>; 180 #address-cells = <1>; 181 #size-cells = <0>; 182 status = "disabled"; 183 }; 184 185 spi2: spi@e800d800 { 186 compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz"; 187 reg = <0xe800d800 0x24>; 188 interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 189 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 190 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>; 191 interrupt-names = "error", "rx", "tx"; 192 clocks = <&cpg CPG_MOD 95>; 193 power-domains = <&cpg>; 194 num-cs = <1>; 195 #address-cells = <1>; 196 #size-cells = <0>; 197 status = "disabled"; 198 }; 199 200 ether0: ethernet@e8204000 { 201 compatible = "renesas,ether-r7s9210"; 202 reg = <0xe8204000 0x200>; 203 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; 204 clocks = <&cpg CPG_MOD 65>; 205 power-domains = <&cpg>; 206 207 phy-mode = "rmii"; 208 #address-cells = <1>; 209 #size-cells = <0>; 210 status = "disabled"; 211 }; 212 213 ether1: ethernet@e8204200 { 214 compatible = "renesas,ether-r7s9210"; 215 reg = <0xe8204200 0x200>; 216 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; 217 clocks = <&cpg CPG_MOD 64>; 218 power-domains = <&cpg>; 219 phy-mode = "rmii"; 220 #address-cells = <1>; 221 #size-cells = <0>; 222 status = "disabled"; 223 }; 224 225 i2c0: i2c@e803a000 { 226 #address-cells = <1>; 227 #size-cells = <0>; 228 compatible = "renesas,riic-r7s9210", "renesas,riic-rz"; 229 reg = <0xe803a000 0x44>; 230 interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>, 231 <GIC_SPI 233 IRQ_TYPE_EDGE_RISING>, 232 <GIC_SPI 234 IRQ_TYPE_EDGE_RISING>, 233 <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>, 234 <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>, 235 <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>, 236 <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>, 237 <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 238 interrupt-names = "tei", "ri", "ti", "spi", "sti", 239 "naki", "ali", "tmoi"; 240 clocks = <&cpg CPG_MOD 87>; 241 power-domains = <&cpg>; 242 clock-frequency = <100000>; 243 status = "disabled"; 244 }; 245 246 i2c1: i2c@e803a400 { 247 #address-cells = <1>; 248 #size-cells = <0>; 249 compatible = "renesas,riic-r7s9210", "renesas,riic-rz"; 250 reg = <0xe803a400 0x44>; 251 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, 252 <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, 253 <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>, 254 <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>, 255 <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, 256 <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, 257 <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, 258 <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 259 interrupt-names = "tei", "ri", "ti", "spi", "sti", 260 "naki", "ali", "tmoi"; 261 clocks = <&cpg CPG_MOD 86>; 262 power-domains = <&cpg>; 263 clock-frequency = <100000>; 264 status = "disabled"; 265 }; 266 267 i2c2: i2c@e803a800 { 268 #address-cells = <1>; 269 #size-cells = <0>; 270 compatible = "renesas,riic-r7s9210", "renesas,riic-rz"; 271 reg = <0xe803a800 0x44>; 272 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, 273 <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>, 274 <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, 275 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, 276 <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, 277 <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, 278 <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 279 <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; 280 interrupt-names = "tei", "ri", "ti", "spi", "sti", 281 "naki", "ali", "tmoi"; 282 clocks = <&cpg CPG_MOD 85>; 283 power-domains = <&cpg>; 284 clock-frequency = <100000>; 285 status = "disabled"; 286 }; 287 288 i2c3: i2c@e803ac00 { 289 #address-cells = <1>; 290 #size-cells = <0>; 291 compatible = "renesas,riic-r7s9210", "renesas,riic-rz"; 292 reg = <0xe803ac00 0x44>; 293 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 257 IRQ_TYPE_EDGE_RISING>, 295 <GIC_SPI 258 IRQ_TYPE_EDGE_RISING>, 296 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 301 interrupt-names = "tei", "ri", "ti", "spi", "sti", 302 "naki", "ali", "tmoi"; 303 clocks = <&cpg CPG_MOD 84>; 304 power-domains = <&cpg>; 305 clock-frequency = <100000>; 306 status = "disabled"; 307 }; 308 309 ostm0: timer@e803b000 { 310 compatible = "renesas,r7s9210-ostm", "renesas,ostm"; 311 reg = <0xe803b000 0x30>; 312 interrupts = <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>; 313 clocks = <&cpg CPG_MOD 36>; 314 power-domains = <&cpg>; 315 status = "disabled"; 316 }; 317 318 ostm1: timer@e803c000 { 319 compatible = "renesas,r7s9210-ostm", "renesas,ostm"; 320 reg = <0xe803c000 0x30>; 321 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; 322 clocks = <&cpg CPG_MOD 35>; 323 power-domains = <&cpg>; 324 status = "disabled"; 325 }; 326 327 ostm2: timer@e803d000 { 328 compatible = "renesas,r7s9210-ostm", "renesas,ostm"; 329 reg = <0xe803d000 0x30>; 330 interrupts = <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>; 331 clocks = <&cpg CPG_MOD 34>; 332 power-domains = <&cpg>; 333 status = "disabled"; 334 }; 335 336 ohci0: usb@e8218000 { 337 compatible = "generic-ohci"; 338 reg = <0xe8218000 0x100>; 339 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 340 clocks = <&cpg CPG_MOD 61>; 341 phys = <&usb2_phy0>; 342 phy-names = "usb"; 343 power-domains = <&cpg>; 344 status = "disabled"; 345 }; 346 347 ehci0: usb@e8218100 { 348 compatible = "generic-ehci"; 349 reg = <0xe8218100 0x100>; 350 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 351 clocks = <&cpg CPG_MOD 61>; 352 phys = <&usb2_phy0>; 353 phy-names = "usb"; 354 power-domains = <&cpg>; 355 status = "disabled"; 356 }; 357 358 usb2_phy0: usb-phy@e8218200 { 359 compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy"; 360 reg = <0xe8218200 0x700>; 361 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&cpg CPG_MOD 61>, <&usb_x1_clk>; 363 clock-names = "fck", "usb_x1"; 364 power-domains = <&cpg>; 365 #phy-cells = <0>; 366 status = "disabled"; 367 }; 368 369 usbhs0: usb@e8219000 { 370 compatible = "renesas,usbhs-r7s9210", "renesas,rza2-usbhs"; 371 reg = <0xe8219000 0x724>; 372 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 373 clocks = <&cpg CPG_MOD 61>; 374 renesas,buswait = <7>; 375 phys = <&usb2_phy0>; 376 phy-names = "usb"; 377 power-domains = <&cpg>; 378 status = "disabled"; 379 }; 380 381 ohci1: usb@e821a000 { 382 compatible = "generic-ohci"; 383 reg = <0xe821a000 0x100>; 384 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 385 clocks = <&cpg CPG_MOD 60>; 386 phys = <&usb2_phy1>; 387 phy-names = "usb"; 388 power-domains = <&cpg>; 389 status = "disabled"; 390 }; 391 392 ehci1: usb@e821a100 { 393 compatible = "generic-ehci"; 394 reg = <0xe821a100 0x100>; 395 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 396 clocks = <&cpg CPG_MOD 60>; 397 phys = <&usb2_phy1>; 398 phy-names = "usb"; 399 power-domains = <&cpg>; 400 status = "disabled"; 401 }; 402 403 usb2_phy1: usb-phy@e821a200 { 404 compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy"; 405 reg = <0xe821a200 0x700>; 406 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 60>, <&usb_x1_clk>; 408 clock-names = "fck", "usb_x1"; 409 power-domains = <&cpg>; 410 #phy-cells = <0>; 411 status = "disabled"; 412 }; 413 414 usbhs1: usb@e821b000 { 415 compatible = "renesas,usbhs-r7s9210", "renesas,rza2-usbhs"; 416 reg = <0xe821b000 0x724>; 417 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&cpg CPG_MOD 60>; 419 renesas,buswait = <7>; 420 phys = <&usb2_phy1>; 421 phy-names = "usb"; 422 power-domains = <&cpg>; 423 status = "disabled"; 424 }; 425 426 sdhi0: mmc@e8228000 { 427 compatible = "renesas,sdhi-r7s9210"; 428 reg = <0xe8228000 0x8c0>; 429 interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>; 430 clocks = <&cpg CPG_MOD 103>, <&cpg CPG_MOD 102>; 431 clock-names = "core", "cd"; 432 power-domains = <&cpg>; 433 cap-sd-highspeed; 434 cap-sdio-irq; 435 status = "disabled"; 436 }; 437 438 sdhi1: mmc@e822a000 { 439 compatible = "renesas,sdhi-r7s9210"; 440 reg = <0xe822a000 0x8c0>; 441 interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>; 442 clocks = <&cpg CPG_MOD 101>, <&cpg CPG_MOD 100>; 443 clock-names = "core", "cd"; 444 power-domains = <&cpg>; 445 cap-sd-highspeed; 446 cap-sdio-irq; 447 status = "disabled"; 448 }; 449 450 gic: interrupt-controller@e8221000 { 451 compatible = "arm,gic-400"; 452 #interrupt-cells = <3>; 453 #address-cells = <0>; 454 interrupt-controller; 455 reg = <0xe8221000 0x1000>, 456 <0xe8222000 0x1000>; 457 }; 458 459 cpg: clock-controller@fcfe0010 { 460 compatible = "renesas,r7s9210-cpg-mssr"; 461 reg = <0xfcfe0010 0x455>; 462 clocks = <&extal_clk>; 463 clock-names = "extal"; 464 #clock-cells = <2>; 465 #power-domain-cells = <0>; 466 }; 467 468 wdt: watchdog@fcfe7000 { 469 compatible = "renesas,r7s9210-wdt", "renesas,rza-wdt"; 470 reg = <0xfcfe7000 0x26>; 471 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 472 clocks = <&cpg CPG_CORE R7S9210_CLK_P0>; 473 }; 474 475 bsid: chipid@fcfe8004 { 476 compatible = "renesas,bsid"; 477 reg = <0xfcfe8004 4>; 478 }; 479 480 irqc: interrupt-controller@fcfef800 { 481 compatible = "renesas,r7s9210-irqc", 482 "renesas,rza1-irqc"; 483 #interrupt-cells = <2>; 484 #address-cells = <0>; 485 interrupt-controller; 486 reg = <0xfcfef800 0x6>; 487 interrupt-map = 488 <0 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 489 <1 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 490 <2 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 491 <3 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 492 <4 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 493 <5 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 494 <6 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 495 <7 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 496 interrupt-map-mask = <7 0>; 497 }; 498 499 pinctrl: pinctrl@fcffe000 { 500 compatible = "renesas,r7s9210-pinctrl"; 501 reg = <0xfcffe000 0x1000>; 502 503 gpio-controller; 504 #gpio-cells = <2>; 505 gpio-ranges = <&pinctrl 0 0 176>; 506 }; 507 }; 508}; 509