xref: /linux/arch/arm/boot/dts/intel/pxa/pxa2xx.dtsi (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
4 *
5 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
6 */
7
8#include "dt-bindings/clock/pxa-clock.h"
9
10#define PMGROUP(pin) #pin
11#define PMMUX(func, pin, af)			\
12	mux- ## func {				\
13		groups = PMGROUP(P ## pin);	\
14		function = #af;			\
15	}
16#define PMMUX_LPM_LOW(func, pin, af)		\
17	mux- ## func {				\
18		groups = PMGROUP(P ## pin);	\
19		function = #af;			\
20		low-power-disable;		\
21	}
22#define PMMUX_LPM_HIGH(func, pin, af)		\
23	mux- ## func {				\
24		groups = PMGROUP(P ## pin);	\
25		function = #af;			\
26		low-power-enable;		\
27	}
28
29/ {
30	#address-cells = <1>;
31	#size-cells = <1>;
32	model = "Marvell PXA2xx family SoC";
33	compatible = "marvell,pxa2xx";
34	interrupt-parent = <&pxairq>;
35
36	aliases {
37		serial0 = &ffuart;
38		serial1 = &btuart;
39		serial2 = &stuart;
40		serial3 = &hwuart;
41		i2c0 = &pwri2c;
42		i2c1 = &pxai2c1;
43	};
44
45	cpus {
46		cpu {
47			compatible = "marvell,xscale";
48			device_type = "cpu";
49		};
50	};
51
52	pxabus {
53		compatible = "simple-bus";
54		#address-cells = <1>;
55		#size-cells = <1>;
56		ranges;
57
58		pxairq: interrupt-controller@40d00000 {
59			#interrupt-cells = <1>;
60			compatible = "marvell,pxa-intc";
61			interrupt-controller;
62			interrupt-parent;
63			marvell,intc-nr-irqs = <32>;
64			reg = <0x40d00000 0xd0>;
65		};
66
67		gpio: gpio@40e00000 {
68			compatible = "mrvl,pxa-gpio";
69			#address-cells = <0x1>;
70			#size-cells = <0x1>;
71			reg = <0x40e00000 0x10000>;
72			gpio-controller;
73			#gpio-cells = <0x2>;
74			interrupts = <8>, <9>, <10>;
75			interrupt-names = "gpio0", "gpio1", "gpio_mux";
76			interrupt-controller;
77			#interrupt-cells = <0x2>;
78			ranges;
79
80			gcb0: gpio@40e00000 {
81				reg = <0x40e00000 0x4>;
82			};
83
84			gcb1: gpio@40e00004 {
85				reg = <0x40e00004 0x4>;
86			};
87
88			gcb2: gpio@40e00008 {
89				reg = <0x40e00008 0x4>;
90			};
91			gcb3: gpio@40e0000c {
92				reg = <0x40e0000c 0x4>;
93			};
94		};
95
96		ffuart: serial@40100000 {
97			compatible = "mrvl,pxa-uart";
98			reg = <0x40100000 0x30>;
99			interrupts = <22>;
100			clocks = <&clks CLK_FFUART>;
101			status = "disabled";
102		};
103
104		btuart: serial@40200000 {
105			compatible = "mrvl,pxa-uart";
106			reg = <0x40200000 0x30>;
107			interrupts = <21>;
108			clocks = <&clks CLK_BTUART>;
109			status = "disabled";
110		};
111
112		stuart: serial@40700000 {
113			compatible = "mrvl,pxa-uart";
114			reg = <0x40700000 0x30>;
115			interrupts = <20>;
116			clocks = <&clks CLK_STUART>;
117			status = "disabled";
118		};
119
120		hwuart: serial@41600000 {
121			compatible = "mrvl,pxa-uart";
122			reg = <0x41600000 0x30>;
123			interrupts = <7>;
124			status = "disabled";
125		};
126
127		pxai2c1: i2c@40301680 {
128			compatible = "mrvl,pxa-i2c";
129			reg = <0x40301680 0x30>;
130			interrupts = <18>;
131			clocks = <&clks CLK_I2C>;
132			#address-cells = <0x1>;
133			#size-cells = <0>;
134			status = "disabled";
135		};
136
137		mmc0: mmc@41100000 {
138			compatible = "marvell,pxa-mmc";
139			reg = <0x41100000 0x1000>;
140			interrupts = <23>;
141			clocks = <&clks CLK_MMC>;
142			dmas = <&pdma 21 3
143				&pdma 22 3>;
144			dma-names = "rx", "tx";
145			status = "disabled";
146		};
147
148		rtc@40900000 {
149			compatible = "marvell,pxa-rtc";
150			reg = <0x40900000 0x3c>;
151			interrupts = <30 31>;
152		};
153
154		lcdc: lcd-controller@40500000 {
155			compatible = "marvell,pxa2xx-lcdc";
156			reg = <0x44000000 0x10000>;
157			interrupts = <17>;
158			clocks = <&clks CLK_LCD>;
159			status = "disabled";
160		};
161	};
162};
163