1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2010 - 2015, Intel Corporation.
5 */
6
7 #include <linux/bitops.h>
8 #include <linux/math.h>
9
10 #include "ia_css_bayer_io.host.h"
11 #include "dma.h"
12 #ifndef IA_CSS_NO_DEBUG
13 #include "ia_css_debug.h"
14 #endif
15 #include "ia_css_isp_params.h"
16 #include "ia_css_frame.h"
17
ia_css_bayer_io_config(const struct ia_css_binary * binary,const struct sh_css_binary_args * args)18 int ia_css_bayer_io_config(const struct ia_css_binary *binary,
19 const struct sh_css_binary_args *args)
20 {
21 const struct ia_css_frame *in_frame = args->in_frame;
22 const struct ia_css_frame **out_frames = (const struct ia_css_frame **)
23 &args->out_frame;
24 const struct ia_css_frame_info *in_frame_info = ia_css_frame_get_info(in_frame);
25 const unsigned int ddr_elems_per_word =
26 DIV_ROUND_UP(HIVE_ISP_DDR_WORD_BITS, BITS_PER_TYPE(short));
27 unsigned int size_get = 0, size_put = 0;
28 unsigned int offset = 0;
29 int ret;
30
31 if (binary->info->mem_offsets.offsets.param) {
32 size_get = binary->info->mem_offsets.offsets.param->dmem.get.size;
33 offset = binary->info->mem_offsets.offsets.param->dmem.get.offset;
34 }
35
36 if (size_get) {
37 struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)
38 &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset];
39 struct dma_port_config config;
40 #ifndef IA_CSS_NO_DEBUG
41 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
42 "ia_css_bayer_io_config() get part enter:\n");
43 #endif
44
45 ret = ia_css_dma_configure_from_info(&config, in_frame_info);
46 if (ret)
47 return ret;
48 // The base_address of the input frame will be set in the ISP
49 to->width = in_frame_info->res.width;
50 to->height = in_frame_info->res.height;
51 to->stride = config.stride;
52 to->ddr_elems_per_word = ddr_elems_per_word;
53 #ifndef IA_CSS_NO_DEBUG
54 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
55 "ia_css_bayer_io_config() get part leave:\n");
56 #endif
57 }
58
59 if (binary->info->mem_offsets.offsets.param) {
60 size_put = binary->info->mem_offsets.offsets.param->dmem.put.size;
61 offset = binary->info->mem_offsets.offsets.param->dmem.put.offset;
62 }
63
64 if (size_put) {
65 struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)
66 &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset];
67 struct dma_port_config config;
68 #ifndef IA_CSS_NO_DEBUG
69 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
70 "ia_css_bayer_io_config() put part enter:\n");
71 #endif
72
73 ret = ia_css_dma_configure_from_info(&config, &out_frames[0]->frame_info);
74 if (ret)
75 return ret;
76 to->base_address = out_frames[0]->data;
77 to->width = out_frames[0]->frame_info.res.width;
78 to->height = out_frames[0]->frame_info.res.height;
79 to->stride = config.stride;
80 to->ddr_elems_per_word = ddr_elems_per_word;
81
82 #ifndef IA_CSS_NO_DEBUG
83 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
84 "ia_css_bayer_io_config() put part leave:\n");
85 #endif
86 }
87 return 0;
88 }
89