1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7 #ifndef __ODM_TYPES_H__ 8 #define __ODM_TYPES_H__ 9 10 #include <drv_types.h> 11 12 /* Deifne HW endian support */ 13 #define ODM_ENDIAN_BIG 0 14 #define ODM_ENDIAN_LITTLE 1 15 16 #define GET_ODM(__padapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__padapter))->odmpriv))) 17 18 enum hal_status { 19 HAL_STATUS_SUCCESS, 20 HAL_STATUS_FAILURE, 21 /*RT_STATUS_PENDING, 22 RT_STATUS_RESOURCE, 23 RT_STATUS_INVALID_CONTEXT, 24 RT_STATUS_INVALID_PARAMETER, 25 RT_STATUS_NOT_SUPPORT, 26 RT_STATUS_OS_API_FAILED,*/ 27 }; 28 29 30 #if defined(__LITTLE_ENDIAN) 31 #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE 32 #else 33 #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG 34 #endif 35 36 #define STA_INFO_T struct sta_info 37 #define PSTA_INFO_T struct sta_info * 38 39 #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) 40 #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) 41 #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) 42 43 /* define useless flag to avoid compile warning */ 44 #define USE_WORKITEM 0 45 #define FPGA_TWO_MAC_VERIFICATION 0 46 47 #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) 48 #define COND_ELSE 2 49 #define COND_ENDIF 3 50 51 #endif /* __ODM_TYPES_H__ */ 52