1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef __SOC_MEDIATEK_MT8167_MMSYS_H 4 #define __SOC_MEDIATEK_MT8167_MMSYS_H 5 6 #define MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x030 7 #define MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN 0x038 8 #define MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x058 9 #define MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0x064 10 #define MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x06c 11 12 #define MT8167_DITHER_MOUT_EN_RDMA0 0x1 13 #define MT8167_DITHER_MOUT_EN_MASK 0x7 14 15 #define MT8167_RDMA0_SOUT_DSI0 0x2 16 #define MT8167_RDMA0_SOUT_MASK 0x3 17 18 #define MT8167_DSI0_SEL_IN_RDMA0 0x1 19 #define MT8167_DSI0_SEL_IN_MASK 0x3 20 21 static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = { 22 MMSYS_ROUTE(OVL0, COLOR0, 23 MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0, 24 OVL0_MOUT_EN_COLOR0), 25 MMSYS_ROUTE(DITHER0, RDMA0, 26 MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_MASK, 27 MT8167_DITHER_MOUT_EN_RDMA0), 28 MMSYS_ROUTE(OVL0, COLOR0, 29 MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, COLOR0_SEL_IN_OVL0, 30 COLOR0_SEL_IN_OVL0), 31 MMSYS_ROUTE(RDMA0, DSI0, 32 MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_MASK, 33 MT8167_DSI0_SEL_IN_RDMA0), 34 MMSYS_ROUTE(RDMA0, DSI0, 35 MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK, 36 MT8167_RDMA0_SOUT_DSI0), 37 }; 38 39 #endif /* __SOC_MEDIATEK_MT8167_MMSYS_H */ 40