xref: /linux/arch/loongarch/boot/dts/loongson-2k2000.dtsi (revision b7191581a973ab2fca45d2ca64416065f1660ae0) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/clock/loongson,ls2k-clk.h>
10
11/ {
12	#address-cells = <2>;
13	#size-cells = <2>;
14
15	cpus {
16		#address-cells = <1>;
17		#size-cells = <0>;
18
19		cpu0: cpu@1 {
20			compatible = "loongson,la364";
21			device_type = "cpu";
22			reg = <0x0>;
23			clocks = <&clk LOONGSON2_NODE_CLK>;
24		};
25
26		cpu1: cpu@2 {
27			compatible = "loongson,la364";
28			device_type = "cpu";
29			reg = <0x1>;
30			clocks = <&clk LOONGSON2_NODE_CLK>;
31		};
32	};
33
34	ref_100m: clock-ref-100m {
35		compatible = "fixed-clock";
36		#clock-cells = <0>;
37		clock-frequency = <100000000>;
38		clock-output-names = "ref_100m";
39	};
40
41	cpuintc: interrupt-controller {
42		compatible = "loongson,cpu-interrupt-controller";
43		#interrupt-cells = <1>;
44		interrupt-controller;
45	};
46
47	thermal-zones {
48		cpu-thermal {
49			polling-delay-passive = <1000>;
50			polling-delay = <5000>;
51			thermal-sensors = <&tsensor 0>;
52
53			trips {
54				cpu-alert {
55					temperature = <40000>;
56					hysteresis = <2000>;
57					type = "active";
58				};
59
60				cpu-crit {
61					temperature = <85000>;
62					hysteresis = <5000>;
63					type = "critical";
64				};
65			};
66		};
67	};
68
69	bus@10000000 {
70		compatible = "simple-bus";
71		ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
72			 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
73			 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
74			 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
75		#address-cells = <2>;
76		#size-cells = <2>;
77
78		isa@18400000 {
79			compatible = "isa";
80			#size-cells = <1>;
81			#address-cells = <2>;
82			ranges = <1 0x0 0x0 0x18400000 0x4000>;
83		};
84
85		clk: clock-controller@10010480 {
86			compatible = "loongson,ls2k2000-clk";
87			reg = <0x0 0x10010480 0x0 0x100>;
88			#clock-cells = <1>;
89			clocks = <&ref_100m>;
90			clock-names = "ref_100m";
91		};
92
93		pmc: power-management@100d0000 {
94			compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
95			reg = <0x0 0x100d0000 0x0 0x58>;
96			interrupt-parent = <&eiointc>;
97			interrupts = <47>;
98			loongson,suspend-address = <0x0 0x1c000500>;
99
100			syscon-reboot {
101				compatible = "syscon-reboot";
102				offset = <0x30>;
103				mask = <0x1>;
104			};
105
106			syscon-poweroff {
107				compatible = "syscon-poweroff";
108				regmap = <&pmc>;
109				offset = <0x14>;
110				mask = <0x3c00>;
111				value = <0x3c00>;
112			};
113		};
114
115		tsensor: thermal-sensor@1fe01460 {
116			compatible = "loongson,ls2k2000-thermal";
117			reg = <0x0 0x1fe01460 0x0 0x30>,
118			      <0x0 0x1fe0019c 0x0 0x4>;
119			interrupt-parent = <&liointc>;
120			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
121			#thermal-sensor-cells = <1>;
122		};
123
124		liointc: interrupt-controller@1fe01400 {
125			compatible = "loongson,liointc-1.0";
126			reg = <0x0 0x1fe01400 0x0 0x64>;
127
128			interrupt-controller;
129			#interrupt-cells = <2>;
130			interrupt-parent = <&cpuintc>;
131			interrupts = <2>;
132			interrupt-names = "int0";
133			loongson,parent_int_map = <0xffffffff>, /* int0 */
134						  <0x00000000>, /* int1 */
135						  <0x00000000>, /* int2 */
136						  <0x00000000>; /* int3 */
137		};
138
139		eiointc: interrupt-controller@1fe01600 {
140			compatible = "loongson,ls2k2000-eiointc";
141			reg = <0x0 0x1fe01600 0x0 0xea00>;
142			interrupt-controller;
143			#interrupt-cells = <1>;
144			interrupt-parent = <&cpuintc>;
145			interrupts = <3>;
146		};
147
148		pic: interrupt-controller@10000000 {
149			compatible = "loongson,pch-pic-1.0";
150			reg = <0x0 0x10000000 0x0 0x400>;
151			interrupt-controller;
152			#interrupt-cells = <2>;
153			loongson,pic-base-vec = <0>;
154			interrupt-parent = <&eiointc>;
155		};
156
157		msi: msi-controller@1fe01140 {
158			compatible = "loongson,pch-msi-1.0";
159			reg = <0x0 0x1fe01140 0x0 0x8>;
160			interrupt-controller;
161			#interrupt-cells = <1>;
162			msi-controller;
163			loongson,msi-base-vec = <64>;
164			loongson,msi-num-vecs = <192>;
165			interrupt-parent = <&eiointc>;
166		};
167
168		pwm@100a0000 {
169			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
170			reg = <0x0 0x100a0000 0x0 0x10>;
171			interrupt-parent = <&pic>;
172			interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
173			clocks = <&clk LOONGSON2_MISC_CLK>;
174			#pwm-cells = <3>;
175			status = "disabled";
176		};
177
178		pwm@100a0100 {
179			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
180			reg = <0x0 0x100a0100 0x0 0x10>;
181			interrupt-parent = <&pic>;
182			interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
183			clocks = <&clk LOONGSON2_MISC_CLK>;
184			#pwm-cells = <3>;
185			status = "disabled";
186		};
187
188		pwm@100a0200 {
189			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
190			reg = <0x0 0x100a0200 0x0 0x10>;
191			interrupt-parent = <&pic>;
192			interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
193			clocks = <&clk LOONGSON2_MISC_CLK>;
194			#pwm-cells = <3>;
195			status = "disabled";
196		};
197
198		pwm@100a0300 {
199			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
200			reg = <0x0 0x100a0300 0x0 0x10>;
201			interrupt-parent = <&pic>;
202			interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
203			clocks = <&clk LOONGSON2_MISC_CLK>;
204			#pwm-cells = <3>;
205			status = "disabled";
206		};
207
208		pwm@100a0400 {
209			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
210			reg = <0x0 0x100a0400 0x0 0x10>;
211			interrupt-parent = <&pic>;
212			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
213			clocks = <&clk LOONGSON2_MISC_CLK>;
214			#pwm-cells = <3>;
215			status = "disabled";
216		};
217
218		pwm@100a0500 {
219			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
220			reg = <0x0 0x100a0500 0x0 0x10>;
221			interrupt-parent = <&pic>;
222			interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
223			clocks = <&clk LOONGSON2_MISC_CLK>;
224			#pwm-cells = <3>;
225			status = "disabled";
226		};
227
228		rtc0: rtc@100d0100 {
229			compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
230			reg = <0x0 0x100d0100 0x0 0x100>;
231			interrupt-parent = <&pic>;
232			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
233			status = "disabled";
234		};
235
236		i2c@1fe00120 {
237			compatible = "loongson,ls2k-i2c";
238			reg = <0x0 0x1fe00120 0x0 0x8>;
239			interrupt-parent = <&liointc>;
240			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
241			status = "disabled";
242		};
243
244		i2c@1fe00130 {
245			compatible = "loongson,ls2k-i2c";
246			reg = <0x0 0x1fe00130 0x0 0x8>;
247			interrupt-parent = <&liointc>;
248			interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
249			status = "disabled";
250		};
251
252		uart0: serial@1fe001e0 {
253			compatible = "ns16550a";
254			reg = <0x0 0x1fe001e0 0x0 0x10>;
255			clock-frequency = <100000000>;
256			interrupt-parent = <&liointc>;
257			interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
258			no-loopback-test;
259			status = "disabled";
260		};
261
262		pcie@1a000000 {
263			compatible = "loongson,ls2k-pci";
264			reg = <0x0 0x1a000000 0x0 0x02000000>,
265			      <0xfe 0x0 0x0 0x20000000>;
266			#address-cells = <3>;
267			#size-cells = <2>;
268			device_type = "pci";
269			msi-parent = <&msi>;
270			bus-range = <0x0 0xff>;
271			ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>,
272				 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
273
274			gmac0: ethernet@3,0 {
275				reg = <0x1800 0x0 0x0 0x0 0x0>;
276				interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
277					     <13 IRQ_TYPE_LEVEL_HIGH>;
278				interrupt-names = "macirq", "eth_lpi";
279				interrupt-parent = <&pic>;
280				status = "disabled";
281			};
282
283			gmac1: ethernet@3,1 {
284				reg = <0x1900 0x0 0x0 0x0 0x0>;
285				interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
286					     <15 IRQ_TYPE_LEVEL_HIGH>;
287				interrupt-names = "macirq", "eth_lpi";
288				interrupt-parent = <&pic>;
289				status = "disabled";
290			};
291
292			gmac2: ethernet@3,2 {
293				reg = <0x1a00 0x0 0x0 0x0 0x0>;
294				interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
295					     <18 IRQ_TYPE_LEVEL_HIGH>;
296				interrupt-names = "macirq", "eth_lpi";
297				interrupt-parent = <&pic>;
298				status = "disabled";
299			};
300
301			xhci0: usb@4,0 {
302				reg = <0x2000 0x0 0x0 0x0 0x0>;
303				interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
304				interrupt-parent = <&pic>;
305				status = "disabled";
306			};
307
308			xhci1: usb@19,0 {
309				reg = <0xc800 0x0 0x0 0x0 0x0>;
310				interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
311				interrupt-parent = <&pic>;
312				status = "disabled";
313			};
314
315			display@6,1 {
316				reg = <0x3100 0x0 0x0 0x0 0x0>;
317				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
318				interrupt-parent = <&pic>;
319				status = "disabled";
320			};
321
322			i2s@7,0 {
323				reg = <0x3800 0x0 0x0 0x0 0x0>;
324				interrupts = <78 IRQ_TYPE_LEVEL_HIGH>,
325					     <79 IRQ_TYPE_LEVEL_HIGH>;
326				interrupt-names = "tx", "rx";
327				interrupt-parent = <&pic>;
328				status = "disabled";
329			};
330
331			sata: sata@8,0 {
332				reg = <0x4000 0x0 0x0 0x0 0x0>;
333				interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
334				interrupt-parent = <&pic>;
335				status = "disabled";
336			};
337
338			pcie@9,0 {
339				reg = <0x4800 0x0 0x0 0x0 0x0>;
340				#address-cells = <3>;
341				#size-cells = <2>;
342				device_type = "pci";
343				interrupt-parent = <&pic>;
344				#interrupt-cells = <1>;
345				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
346				interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
347				ranges;
348			};
349
350			pcie@a,0 {
351				reg = <0x5000 0x0 0x0 0x0 0x0>;
352				#address-cells = <3>;
353				#size-cells = <2>;
354				device_type = "pci";
355				interrupt-parent = <&pic>;
356				#interrupt-cells = <1>;
357				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
358				interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
359				ranges;
360			};
361
362			pcie@b,0 {
363				reg = <0x5800 0x0 0x0 0x0 0x0>;
364				#address-cells = <3>;
365				#size-cells = <2>;
366				device_type = "pci";
367				interrupt-parent = <&pic>;
368				#interrupt-cells = <1>;
369				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
370				interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
371				ranges;
372			};
373
374			pcie@c,0 {
375				reg = <0x6000 0x0 0x0 0x0 0x0>;
376				#address-cells = <3>;
377				#size-cells = <2>;
378				device_type = "pci";
379				interrupt-parent = <&pic>;
380				#interrupt-cells = <1>;
381				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
382				interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
383				ranges;
384			};
385
386			pcie@d,0 {
387				reg = <0x6800 0x0 0x0 0x0 0x0>;
388				#address-cells = <3>;
389				#size-cells = <2>;
390				device_type = "pci";
391				interrupt-parent = <&pic>;
392				#interrupt-cells = <1>;
393				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
394				interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
395				ranges;
396			};
397
398			pcie@e,0 {
399				reg = <0x7000 0x0 0x0 0x0 0x0>;
400				#address-cells = <3>;
401				#size-cells = <2>;
402				device_type = "pci";
403				interrupt-parent = <&pic>;
404				#interrupt-cells = <1>;
405				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
406				interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
407				ranges;
408			};
409
410			pcie@f,0 {
411				reg = <0x7800 0x0 0x0 0x0 0x0>;
412				#address-cells = <3>;
413				#size-cells = <2>;
414				device_type = "pci";
415				interrupt-parent = <&pic>;
416				#interrupt-cells = <1>;
417				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
418				interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
419				ranges;
420			};
421
422			pcie@10,0 {
423				reg = <0x8000 0x0 0x0 0x0 0x0>;
424				#address-cells = <3>;
425				#size-cells = <2>;
426				device_type = "pci";
427				interrupt-parent = <&pic>;
428				#interrupt-cells = <1>;
429				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
430				interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
431				ranges;
432			};
433		};
434	};
435};
436