1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Firmware layer for UFS APIs. 4 * 5 * Copyright (c) 2025 Advanced Micro Devices, Inc. 6 */ 7 8 #ifndef __FIRMWARE_XLNX_ZYNQMP_UFS_H__ 9 #define __FIRMWARE_XLNX_ZYNQMP_UFS_H__ 10 11 #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE) 12 int zynqmp_pm_is_mphy_tx_rx_config_ready(bool *is_ready); 13 int zynqmp_pm_is_sram_init_done(bool *is_done); 14 int zynqmp_pm_set_sram_bypass(void); 15 int zynqmp_pm_get_ufs_calibration_values(u32 *val); 16 #else zynqmp_pm_is_mphy_tx_rx_config_ready(bool * is_ready)17static inline int zynqmp_pm_is_mphy_tx_rx_config_ready(bool *is_ready) 18 { 19 return -ENODEV; 20 } 21 zynqmp_pm_is_sram_init_done(bool * is_done)22static inline int zynqmp_pm_is_sram_init_done(bool *is_done) 23 { 24 return -ENODEV; 25 } 26 zynqmp_pm_set_sram_bypass(void)27static inline int zynqmp_pm_set_sram_bypass(void) 28 { 29 return -ENODEV; 30 } 31 zynqmp_pm_get_ufs_calibration_values(u32 * val)32static inline int zynqmp_pm_get_ufs_calibration_values(u32 *val) 33 { 34 return -ENODEV; 35 } 36 #endif 37 38 #endif /* __FIRMWARE_XLNX_ZYNQMP_UFS_H__ */ 39