1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * This header is for implementations of dma_map_ops and related code.
4 * It should not be included in drivers just using the DMA API.
5 */
6 #ifndef _LINUX_DMA_MAP_OPS_H
7 #define _LINUX_DMA_MAP_OPS_H
8
9 #include <linux/dma-mapping.h>
10 #include <linux/pgtable.h>
11 #include <linux/slab.h>
12
13 struct cma;
14 struct iommu_ops;
15
16 struct dma_map_ops {
17 void *(*alloc)(struct device *dev, size_t size,
18 dma_addr_t *dma_handle, gfp_t gfp,
19 unsigned long attrs);
20 void (*free)(struct device *dev, size_t size, void *vaddr,
21 dma_addr_t dma_handle, unsigned long attrs);
22 struct page *(*alloc_pages_op)(struct device *dev, size_t size,
23 dma_addr_t *dma_handle, enum dma_data_direction dir,
24 gfp_t gfp);
25 void (*free_pages)(struct device *dev, size_t size, struct page *vaddr,
26 dma_addr_t dma_handle, enum dma_data_direction dir);
27 int (*mmap)(struct device *, struct vm_area_struct *,
28 void *, dma_addr_t, size_t, unsigned long attrs);
29
30 int (*get_sgtable)(struct device *dev, struct sg_table *sgt,
31 void *cpu_addr, dma_addr_t dma_addr, size_t size,
32 unsigned long attrs);
33
34 dma_addr_t (*map_phys)(struct device *dev, phys_addr_t phys,
35 size_t size, enum dma_data_direction dir,
36 unsigned long attrs);
37 void (*unmap_phys)(struct device *dev, dma_addr_t dma_handle,
38 size_t size, enum dma_data_direction dir,
39 unsigned long attrs);
40 /*
41 * map_sg should return a negative error code on error. See
42 * dma_map_sgtable() for a list of appropriate error codes
43 * and their meanings.
44 */
45 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
46 enum dma_data_direction dir, unsigned long attrs);
47 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
48 enum dma_data_direction dir, unsigned long attrs);
49 void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
50 size_t size, enum dma_data_direction dir);
51 void (*sync_single_for_device)(struct device *dev,
52 dma_addr_t dma_handle, size_t size,
53 enum dma_data_direction dir);
54 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
55 int nents, enum dma_data_direction dir);
56 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
57 int nents, enum dma_data_direction dir);
58 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
59 enum dma_data_direction direction);
60 int (*dma_supported)(struct device *dev, u64 mask);
61 u64 (*get_required_mask)(struct device *dev);
62 size_t (*max_mapping_size)(struct device *dev);
63 size_t (*opt_mapping_size)(void);
64 unsigned long (*get_merge_boundary)(struct device *dev);
65 };
66
67 #ifdef CONFIG_ARCH_HAS_DMA_OPS
68 #include <asm/dma-mapping.h>
69
get_dma_ops(struct device * dev)70 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
71 {
72 if (dev->dma_ops)
73 return dev->dma_ops;
74 return get_arch_dma_ops();
75 }
76
set_dma_ops(struct device * dev,const struct dma_map_ops * dma_ops)77 static inline void set_dma_ops(struct device *dev,
78 const struct dma_map_ops *dma_ops)
79 {
80 dev->dma_ops = dma_ops;
81 }
82 #else /* CONFIG_ARCH_HAS_DMA_OPS */
get_dma_ops(struct device * dev)83 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
84 {
85 return NULL;
86 }
set_dma_ops(struct device * dev,const struct dma_map_ops * dma_ops)87 static inline void set_dma_ops(struct device *dev,
88 const struct dma_map_ops *dma_ops)
89 {
90 }
91 #endif /* CONFIG_ARCH_HAS_DMA_OPS */
92
93 #ifdef CONFIG_DMA_CMA
94 struct cma *dev_get_cma_area(struct device *dev);
95 struct cma *dma_contiguous_get_area_by_idx(unsigned int idx);
96
97 void dma_contiguous_reserve(phys_addr_t addr_limit);
98 int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
99 phys_addr_t limit, struct cma **res_cma, bool fixed);
100
101 struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
102 unsigned int order, bool no_warn);
103 bool dma_release_from_contiguous(struct device *dev, struct page *pages,
104 int count);
105 struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp);
106 void dma_free_contiguous(struct device *dev, struct page *page, size_t size);
107
108 void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
109 #else /* CONFIG_DMA_CMA */
dev_get_cma_area(struct device * dev)110 static inline struct cma *dev_get_cma_area(struct device *dev)
111 {
112 return NULL;
113 }
dma_contiguous_get_area_by_idx(unsigned int idx)114 static inline struct cma *dma_contiguous_get_area_by_idx(unsigned int idx)
115 {
116 return NULL;
117 }
dma_contiguous_reserve(phys_addr_t limit)118 static inline void dma_contiguous_reserve(phys_addr_t limit)
119 {
120 }
dma_contiguous_reserve_area(phys_addr_t size,phys_addr_t base,phys_addr_t limit,struct cma ** res_cma,bool fixed)121 static inline int dma_contiguous_reserve_area(phys_addr_t size,
122 phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
123 bool fixed)
124 {
125 return -ENOSYS;
126 }
dma_alloc_from_contiguous(struct device * dev,size_t count,unsigned int order,bool no_warn)127 static inline struct page *dma_alloc_from_contiguous(struct device *dev,
128 size_t count, unsigned int order, bool no_warn)
129 {
130 return NULL;
131 }
dma_release_from_contiguous(struct device * dev,struct page * pages,int count)132 static inline bool dma_release_from_contiguous(struct device *dev,
133 struct page *pages, int count)
134 {
135 return false;
136 }
137 /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
dma_alloc_contiguous(struct device * dev,size_t size,gfp_t gfp)138 static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size,
139 gfp_t gfp)
140 {
141 return NULL;
142 }
dma_free_contiguous(struct device * dev,struct page * page,size_t size)143 static inline void dma_free_contiguous(struct device *dev, struct page *page,
144 size_t size)
145 {
146 __free_pages(page, get_order(size));
147 }
148 #endif /* CONFIG_DMA_CMA*/
149
150 #ifdef CONFIG_DMA_DECLARE_COHERENT
151 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
152 dma_addr_t device_addr, size_t size);
153 void dma_release_coherent_memory(struct device *dev);
154 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
155 dma_addr_t *dma_handle, void **ret);
156 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
157 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
158 void *cpu_addr, size_t size, int *ret);
159 #else
dma_declare_coherent_memory(struct device * dev,phys_addr_t phys_addr,dma_addr_t device_addr,size_t size)160 static inline int dma_declare_coherent_memory(struct device *dev,
161 phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
162 {
163 return -ENOSYS;
164 }
165
166 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
167 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
168 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
dma_release_coherent_memory(struct device * dev)169 static inline void dma_release_coherent_memory(struct device *dev) { }
170 #endif /* CONFIG_DMA_DECLARE_COHERENT */
171
172 #ifdef CONFIG_DMA_GLOBAL_POOL
173 void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
174 dma_addr_t *dma_handle);
175 int dma_release_from_global_coherent(int order, void *vaddr);
176 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
177 size_t size, int *ret);
178 int dma_init_global_coherent(phys_addr_t phys_addr, size_t size);
179 #else
dma_alloc_from_global_coherent(struct device * dev,ssize_t size,dma_addr_t * dma_handle)180 static inline void *dma_alloc_from_global_coherent(struct device *dev,
181 ssize_t size, dma_addr_t *dma_handle)
182 {
183 return NULL;
184 }
dma_release_from_global_coherent(int order,void * vaddr)185 static inline int dma_release_from_global_coherent(int order, void *vaddr)
186 {
187 return 0;
188 }
dma_mmap_from_global_coherent(struct vm_area_struct * vma,void * cpu_addr,size_t size,int * ret)189 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
190 void *cpu_addr, size_t size, int *ret)
191 {
192 return 0;
193 }
194 #endif /* CONFIG_DMA_GLOBAL_POOL */
195
196 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
197 void *cpu_addr, dma_addr_t dma_addr, size_t size,
198 unsigned long attrs);
199 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
200 void *cpu_addr, dma_addr_t dma_addr, size_t size,
201 unsigned long attrs);
202 struct page *dma_common_alloc_pages(struct device *dev, size_t size,
203 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
204 void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr,
205 dma_addr_t dma_handle, enum dma_data_direction dir);
206
207 struct page **dma_common_find_pages(void *cpu_addr);
208 void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot,
209 const void *caller);
210 void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot,
211 const void *caller);
212 void dma_common_free_remap(void *cpu_addr, size_t size);
213
214 struct page *dma_alloc_from_pool(struct device *dev, size_t size,
215 void **cpu_addr, gfp_t flags, unsigned long attrs,
216 bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
217 bool dma_free_from_pool(struct device *dev, void *start, size_t size);
218 bool dma_free_from_pool_page(struct device *dev, struct page *page, size_t size);
219
220 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
221 dma_addr_t dma_start, u64 size);
222
223 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
224 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
225 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
226 extern bool dma_default_coherent;
dev_is_dma_coherent(struct device * dev)227 static inline bool dev_is_dma_coherent(struct device *dev)
228 {
229 return dev_dma_coherent(dev);
230 }
231 #else
232 #define dma_default_coherent true
233
dev_is_dma_coherent(struct device * dev)234 static inline bool dev_is_dma_coherent(struct device *dev)
235 {
236 return true;
237 }
238 #endif
239
dma_reset_need_sync(struct device * dev)240 static inline void dma_reset_need_sync(struct device *dev)
241 {
242 #ifdef CONFIG_DMA_NEED_SYNC
243 /* Reset it only once so that the function can be called on hotpath */
244 if (unlikely(dev_dma_skip_sync(dev)))
245 dev_clear_dma_skip_sync(dev);
246 #endif
247 }
248
249 /*
250 * Check whether potential kmalloc() buffers are safe for non-coherent DMA.
251 */
dma_kmalloc_safe(struct device * dev,enum dma_data_direction dir)252 static inline bool dma_kmalloc_safe(struct device *dev,
253 enum dma_data_direction dir)
254 {
255 /*
256 * If DMA bouncing of kmalloc() buffers is disabled, the kmalloc()
257 * caches have already been aligned to a DMA-safe size.
258 */
259 if (!IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC))
260 return true;
261
262 /*
263 * kmalloc() buffers are DMA-safe irrespective of size if the device
264 * is coherent or the direction is DMA_TO_DEVICE (non-desctructive
265 * cache maintenance and benign cache line evictions).
266 */
267 if (dev_is_dma_coherent(dev) || dir == DMA_TO_DEVICE)
268 return true;
269
270 return false;
271 }
272
273 /*
274 * Check whether the given size, assuming it is for a kmalloc()'ed buffer, is
275 * sufficiently aligned for non-coherent DMA.
276 */
dma_kmalloc_size_aligned(size_t size)277 static inline bool dma_kmalloc_size_aligned(size_t size)
278 {
279 /*
280 * Larger kmalloc() sizes are guaranteed to be aligned to
281 * ARCH_DMA_MINALIGN.
282 */
283 if (size >= 2 * ARCH_DMA_MINALIGN ||
284 IS_ALIGNED(kmalloc_size_roundup(size), dma_get_cache_alignment()))
285 return true;
286
287 return false;
288 }
289
290 /*
291 * Check whether the given object size may have originated from a kmalloc()
292 * buffer with a slab alignment below the DMA-safe alignment and needs
293 * bouncing for non-coherent DMA. The pointer alignment is not considered and
294 * in-structure DMA-safe offsets are the responsibility of the caller. Such
295 * code should use the static ARCH_DMA_MINALIGN for compiler annotations.
296 *
297 * The heuristics can have false positives, bouncing unnecessarily, though the
298 * buffers would be small. False negatives are theoretically possible if, for
299 * example, multiple small kmalloc() buffers are coalesced into a larger
300 * buffer that passes the alignment check. There are no such known constructs
301 * in the kernel.
302 */
dma_kmalloc_needs_bounce(struct device * dev,size_t size,enum dma_data_direction dir)303 static inline bool dma_kmalloc_needs_bounce(struct device *dev, size_t size,
304 enum dma_data_direction dir)
305 {
306 return !dma_kmalloc_safe(dev, dir) && !dma_kmalloc_size_aligned(size);
307 }
308
309 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
310 gfp_t gfp, unsigned long attrs);
311 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
312 dma_addr_t dma_addr, unsigned long attrs);
313
314 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
315 void arch_dma_set_mask(struct device *dev, u64 mask);
316 #else
317 #define arch_dma_set_mask(dev, mask) do { } while (0)
318 #endif
319
320 #ifdef CONFIG_MMU
321 /*
322 * Page protection so that devices that can't snoop CPU caches can use the
323 * memory coherently. We default to pgprot_noncached which is usually used
324 * for ioremap as a safe bet, but architectures can override this with less
325 * strict semantics if possible.
326 */
327 #ifndef pgprot_dmacoherent
328 #define pgprot_dmacoherent(prot) pgprot_noncached(prot)
329 #endif
330
331 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
332 #else
dma_pgprot(struct device * dev,pgprot_t prot,unsigned long attrs)333 static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
334 unsigned long attrs)
335 {
336 return prot; /* no protection bits supported without page tables */
337 }
338 #endif /* CONFIG_MMU */
339
340 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
341 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
342 enum dma_data_direction dir);
343 #else
arch_sync_dma_for_device(phys_addr_t paddr,size_t size,enum dma_data_direction dir)344 static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
345 enum dma_data_direction dir)
346 {
347 }
348 #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
349
350 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
351 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
352 enum dma_data_direction dir);
353 #else
arch_sync_dma_for_cpu(phys_addr_t paddr,size_t size,enum dma_data_direction dir)354 static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
355 enum dma_data_direction dir)
356 {
357 }
358 #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
359
360 #ifndef CONFIG_ARCH_HAS_BATCHED_DMA_SYNC
arch_sync_dma_flush(void)361 static inline void arch_sync_dma_flush(void)
362 {
363 }
364 #endif
365
366 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
367 void arch_sync_dma_for_cpu_all(void);
368 #else
arch_sync_dma_for_cpu_all(void)369 static inline void arch_sync_dma_for_cpu_all(void)
370 {
371 }
372 #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
373
374 #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
375 void arch_dma_prep_coherent(struct page *page, size_t size);
376 #else
arch_dma_prep_coherent(struct page * page,size_t size)377 static inline void arch_dma_prep_coherent(struct page *page, size_t size)
378 {
379 }
380 #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
381
382 void *arch_dma_set_uncached(void *addr, size_t size);
383 void arch_dma_clear_uncached(void *addr, size_t size);
384
385 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
386 bool arch_dma_map_phys_direct(struct device *dev, phys_addr_t addr);
387 bool arch_dma_unmap_phys_direct(struct device *dev, dma_addr_t dma_handle);
388 bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
389 int nents);
390 bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
391 int nents);
392 bool arch_dma_alloc_direct(struct device *dev);
393 bool arch_dma_free_direct(struct device *dev, dma_addr_t dma_handle);
394 #else
395 #define arch_dma_map_phys_direct(d, a) (false)
396 #define arch_dma_unmap_phys_direct(d, a) (false)
397 #define arch_dma_map_sg_direct(d, s, n) (false)
398 #define arch_dma_unmap_sg_direct(d, s, n) (false)
399 #define arch_dma_alloc_direct(d) (false)
400 #define arch_dma_free_direct(d, a) (false)
401 #endif
402
403 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
404 void arch_setup_dma_ops(struct device *dev, bool coherent);
405 #else
arch_setup_dma_ops(struct device * dev,bool coherent)406 static inline void arch_setup_dma_ops(struct device *dev, bool coherent)
407 {
408 }
409 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
410
411 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
412 void arch_teardown_dma_ops(struct device *dev);
413 #else
arch_teardown_dma_ops(struct device * dev)414 static inline void arch_teardown_dma_ops(struct device *dev)
415 {
416 }
417 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
418
419 #ifdef CONFIG_DMA_API_DEBUG
420 void dma_debug_add_bus(const struct bus_type *bus);
421 void debug_dma_dump_mappings(struct device *dev);
422 #else
dma_debug_add_bus(const struct bus_type * bus)423 static inline void dma_debug_add_bus(const struct bus_type *bus)
424 {
425 }
debug_dma_dump_mappings(struct device * dev)426 static inline void debug_dma_dump_mappings(struct device *dev)
427 {
428 }
429 #endif /* CONFIG_DMA_API_DEBUG */
430
431 extern const struct dma_map_ops dma_dummy_ops;
432 #endif /* _LINUX_DMA_MAP_OPS_H */
433