xref: /linux/arch/riscv/boot/dts/starfive/jh7110-common.dtsi (revision 2e1b3cc9d7f790145a80cb705b168f05dab65df2) 
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7110.dtsi"
9#include "jh7110-pinfunc.h"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	aliases {
14		ethernet0 = &gmac0;
15		i2c0 = &i2c0;
16		i2c2 = &i2c2;
17		i2c5 = &i2c5;
18		i2c6 = &i2c6;
19		mmc0 = &mmc0;
20		mmc1 = &mmc1;
21		serial0 = &uart0;
22	};
23
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27
28	memory@40000000 {
29		device_type = "memory";
30		reg = <0x0 0x40000000 0x1 0x0>;
31	};
32
33	gpio-restart {
34		compatible = "gpio-restart";
35		gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
36		priority = <224>;
37	};
38
39	pwmdac_codec: audio-codec {
40		compatible = "linux,spdif-dit";
41		#sound-dai-cells = <0>;
42	};
43
44	sound {
45		compatible = "simple-audio-card";
46		simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
47		#address-cells = <1>;
48		#size-cells = <0>;
49
50		simple-audio-card,dai-link@0 {
51			reg = <0>;
52			format = "left_j";
53			bitclock-master = <&sndcpu0>;
54			frame-master = <&sndcpu0>;
55
56			sndcpu0: cpu {
57				sound-dai = <&pwmdac>;
58			};
59
60			codec {
61				sound-dai = <&pwmdac_codec>;
62			};
63		};
64	};
65};
66
67&cpus {
68	timebase-frequency = <4000000>;
69};
70
71&dvp_clk {
72	clock-frequency = <74250000>;
73};
74
75&gmac0_rgmii_rxin {
76	clock-frequency = <125000000>;
77};
78
79&gmac0_rmii_refin {
80	clock-frequency = <50000000>;
81};
82
83&gmac1_rgmii_rxin {
84	clock-frequency = <125000000>;
85};
86
87&gmac1_rmii_refin {
88	clock-frequency = <50000000>;
89};
90
91&hdmitx0_pixelclk {
92	clock-frequency = <297000000>;
93};
94
95&i2srx_bclk_ext {
96	clock-frequency = <12288000>;
97};
98
99&i2srx_lrck_ext {
100	clock-frequency = <192000>;
101};
102
103&i2stx_bclk_ext {
104	clock-frequency = <12288000>;
105};
106
107&i2stx_lrck_ext {
108	clock-frequency = <192000>;
109};
110
111&mclk_ext {
112	clock-frequency = <12288000>;
113};
114
115&osc {
116	clock-frequency = <24000000>;
117};
118
119&rtc_osc {
120	clock-frequency = <32768>;
121};
122
123&tdm_ext {
124	clock-frequency = <49152000>;
125};
126
127&camss {
128	assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
129			  <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
130	assigned-clock-rates = <49500000>, <198000000>;
131
132	ports {
133		#address-cells = <1>;
134		#size-cells = <0>;
135
136		port@0 {
137			reg = <0>;
138		};
139
140		port@1 {
141			reg = <1>;
142
143			camss_from_csi2rx: endpoint {
144				remote-endpoint = <&csi2rx_to_camss>;
145			};
146		};
147	};
148};
149
150&csi2rx {
151	assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
152	assigned-clock-rates = <297000000>;
153
154	ports {
155		#address-cells = <1>;
156		#size-cells = <0>;
157
158		port@0 {
159			reg = <0>;
160
161			/* remote MIPI sensor endpoint */
162		};
163
164		port@1 {
165			reg = <1>;
166
167			csi2rx_to_camss: endpoint {
168				remote-endpoint = <&camss_from_csi2rx>;
169			};
170		};
171	};
172};
173
174&gmac0 {
175	phy-handle = <&phy0>;
176	phy-mode = "rgmii-id";
177	status = "okay";
178
179	mdio {
180		#address-cells = <1>;
181		#size-cells = <0>;
182		compatible = "snps,dwmac-mdio";
183
184		phy0: ethernet-phy@0 {
185			reg = <0>;
186		};
187	};
188};
189
190&i2c0 {
191	clock-frequency = <100000>;
192	i2c-sda-hold-time-ns = <300>;
193	i2c-sda-falling-time-ns = <510>;
194	i2c-scl-falling-time-ns = <510>;
195	pinctrl-names = "default";
196	pinctrl-0 = <&i2c0_pins>;
197	status = "okay";
198};
199
200&i2c2 {
201	clock-frequency = <100000>;
202	i2c-sda-hold-time-ns = <300>;
203	i2c-sda-falling-time-ns = <510>;
204	i2c-scl-falling-time-ns = <510>;
205	pinctrl-names = "default";
206	pinctrl-0 = <&i2c2_pins>;
207	status = "okay";
208};
209
210&i2c5 {
211	clock-frequency = <100000>;
212	i2c-sda-hold-time-ns = <300>;
213	i2c-sda-falling-time-ns = <510>;
214	i2c-scl-falling-time-ns = <510>;
215	pinctrl-names = "default";
216	pinctrl-0 = <&i2c5_pins>;
217	status = "okay";
218
219	axp15060: pmic@36 {
220		compatible = "x-powers,axp15060";
221		reg = <0x36>;
222		interrupt-controller;
223		#interrupt-cells = <1>;
224
225		regulators {
226			vcc_3v3: dcdc1 {
227				regulator-boot-on;
228				regulator-always-on;
229				regulator-min-microvolt = <3300000>;
230				regulator-max-microvolt = <3300000>;
231				regulator-name = "vcc_3v3";
232			};
233
234			vdd_cpu: dcdc2 {
235				regulator-always-on;
236				regulator-min-microvolt = <500000>;
237				regulator-max-microvolt = <1540000>;
238				regulator-name = "vdd-cpu";
239			};
240
241			emmc_vdd: aldo4 {
242				regulator-boot-on;
243				regulator-always-on;
244				regulator-min-microvolt = <1800000>;
245				regulator-max-microvolt = <3300000>;
246				regulator-name = "emmc_vdd";
247			};
248		};
249	};
250};
251
252&i2c6 {
253	clock-frequency = <100000>;
254	i2c-sda-hold-time-ns = <300>;
255	i2c-sda-falling-time-ns = <510>;
256	i2c-scl-falling-time-ns = <510>;
257	pinctrl-names = "default";
258	pinctrl-0 = <&i2c6_pins>;
259	status = "okay";
260};
261
262&mmc0 {
263	max-frequency = <100000000>;
264	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
265	assigned-clock-rates = <50000000>;
266	bus-width = <8>;
267	cap-mmc-highspeed;
268	mmc-ddr-1_8v;
269	mmc-hs200-1_8v;
270	cap-mmc-hw-reset;
271	post-power-on-delay-ms = <200>;
272	pinctrl-names = "default";
273	pinctrl-0 = <&mmc0_pins>;
274	vmmc-supply = <&vcc_3v3>;
275	vqmmc-supply = <&emmc_vdd>;
276	status = "okay";
277};
278
279&mmc1 {
280	max-frequency = <100000000>;
281	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
282	assigned-clock-rates = <50000000>;
283	bus-width = <4>;
284	no-sdio;
285	no-mmc;
286	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
287	disable-wp;
288	cap-sd-highspeed;
289	post-power-on-delay-ms = <200>;
290	pinctrl-names = "default";
291	pinctrl-0 = <&mmc1_pins>;
292	status = "okay";
293};
294
295&pcie0 {
296	perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
297	phys = <&pciephy0>;
298	pinctrl-names = "default";
299	pinctrl-0 = <&pcie0_pins>;
300};
301
302&pcie1 {
303	perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
304	phys = <&pciephy1>;
305	pinctrl-names = "default";
306	pinctrl-0 = <&pcie1_pins>;
307};
308
309&pwmdac {
310	pinctrl-names = "default";
311	pinctrl-0 = <&pwmdac_pins>;
312	status = "okay";
313};
314
315&qspi {
316	#address-cells = <1>;
317	#size-cells = <0>;
318	status = "okay";
319
320	nor_flash: flash@0 {
321		compatible = "jedec,spi-nor";
322		reg = <0>;
323		cdns,read-delay = <5>;
324		spi-max-frequency = <12000000>;
325		cdns,tshsl-ns = <1>;
326		cdns,tsd2d-ns = <1>;
327		cdns,tchsh-ns = <1>;
328		cdns,tslch-ns = <1>;
329
330		partitions {
331			compatible = "fixed-partitions";
332			#address-cells = <1>;
333			#size-cells = <1>;
334
335			spl@0 {
336				reg = <0x0 0xf0000>;
337			};
338			uboot-env@f0000 {
339				reg = <0xf0000 0x10000>;
340			};
341			uboot@100000 {
342				reg = <0x100000 0xf00000>;
343			};
344		};
345	};
346};
347
348&pwm {
349	pinctrl-names = "default";
350	pinctrl-0 = <&pwm_pins>;
351	status = "okay";
352};
353
354&spi0 {
355	pinctrl-names = "default";
356	pinctrl-0 = <&spi0_pins>;
357	status = "okay";
358
359	spi_dev0: spi@0 {
360		compatible = "rohm,dh2228fv";
361		reg = <0>;
362		spi-max-frequency = <10000000>;
363	};
364};
365
366&syscrg {
367	assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>,
368			  <&pllclk JH7110_PLLCLK_PLL0_OUT>;
369	assigned-clock-rates = <500000000>, <1500000000>;
370};
371
372&sysgpio {
373	i2c0_pins: i2c0-0 {
374		i2c-pins {
375			pinmux = <GPIOMUX(57, GPOUT_LOW,
376					      GPOEN_SYS_I2C0_CLK,
377					      GPI_SYS_I2C0_CLK)>,
378				 <GPIOMUX(58, GPOUT_LOW,
379					      GPOEN_SYS_I2C0_DATA,
380					      GPI_SYS_I2C0_DATA)>;
381			bias-disable; /* external pull-up */
382			input-enable;
383			input-schmitt-enable;
384		};
385	};
386
387	i2c2_pins: i2c2-0 {
388		i2c-pins {
389			pinmux = <GPIOMUX(3, GPOUT_LOW,
390					     GPOEN_SYS_I2C2_CLK,
391					     GPI_SYS_I2C2_CLK)>,
392				 <GPIOMUX(2, GPOUT_LOW,
393					     GPOEN_SYS_I2C2_DATA,
394					     GPI_SYS_I2C2_DATA)>;
395			bias-disable; /* external pull-up */
396			input-enable;
397			input-schmitt-enable;
398		};
399	};
400
401	i2c5_pins: i2c5-0 {
402		i2c-pins {
403			pinmux = <GPIOMUX(19, GPOUT_LOW,
404					      GPOEN_SYS_I2C5_CLK,
405					      GPI_SYS_I2C5_CLK)>,
406				 <GPIOMUX(20, GPOUT_LOW,
407					      GPOEN_SYS_I2C5_DATA,
408					      GPI_SYS_I2C5_DATA)>;
409			bias-disable; /* external pull-up */
410			input-enable;
411			input-schmitt-enable;
412		};
413	};
414
415	i2c6_pins: i2c6-0 {
416		i2c-pins {
417			pinmux = <GPIOMUX(16, GPOUT_LOW,
418					      GPOEN_SYS_I2C6_CLK,
419					      GPI_SYS_I2C6_CLK)>,
420				 <GPIOMUX(17, GPOUT_LOW,
421					      GPOEN_SYS_I2C6_DATA,
422					      GPI_SYS_I2C6_DATA)>;
423			bias-disable; /* external pull-up */
424			input-enable;
425			input-schmitt-enable;
426		};
427	};
428
429	mmc0_pins: mmc0-0 {
430		 rst-pins {
431			pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
432					      GPOEN_ENABLE,
433					      GPI_NONE)>;
434			bias-pull-up;
435			drive-strength = <12>;
436			input-disable;
437			input-schmitt-disable;
438			slew-rate = <0>;
439		};
440
441		mmc-pins {
442			pinmux = <PINMUX(64, 0)>,
443				 <PINMUX(65, 0)>,
444				 <PINMUX(66, 0)>,
445				 <PINMUX(67, 0)>,
446				 <PINMUX(68, 0)>,
447				 <PINMUX(69, 0)>,
448				 <PINMUX(70, 0)>,
449				 <PINMUX(71, 0)>,
450				 <PINMUX(72, 0)>,
451				 <PINMUX(73, 0)>;
452			bias-pull-up;
453			drive-strength = <12>;
454			input-enable;
455		};
456	};
457
458	mmc1_pins: mmc1-0 {
459		clk-pins {
460			pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
461					      GPOEN_ENABLE,
462					      GPI_NONE)>;
463			bias-pull-up;
464			drive-strength = <12>;
465			input-disable;
466			input-schmitt-disable;
467			slew-rate = <0>;
468		};
469
470		mmc-pins {
471			pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
472					     GPOEN_SYS_SDIO1_CMD,
473					     GPI_SYS_SDIO1_CMD)>,
474				 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
475					      GPOEN_SYS_SDIO1_DATA0,
476					      GPI_SYS_SDIO1_DATA0)>,
477				 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
478					      GPOEN_SYS_SDIO1_DATA1,
479					      GPI_SYS_SDIO1_DATA1)>,
480				 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
481					     GPOEN_SYS_SDIO1_DATA2,
482					     GPI_SYS_SDIO1_DATA2)>,
483				 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
484					     GPOEN_SYS_SDIO1_DATA3,
485					     GPI_SYS_SDIO1_DATA3)>;
486			bias-pull-up;
487			drive-strength = <12>;
488			input-enable;
489			input-schmitt-enable;
490			slew-rate = <0>;
491		};
492	};
493
494	pcie0_pins: pcie0-0 {
495		clkreq-pins {
496			pinmux = <GPIOMUX(27, GPOUT_LOW,
497					      GPOEN_DISABLE,
498					      GPI_NONE)>;
499			bias-pull-down;
500			drive-strength = <2>;
501			input-enable;
502			input-schmitt-disable;
503			slew-rate = <0>;
504		};
505
506		wake-pins {
507			pinmux = <GPIOMUX(32, GPOUT_LOW,
508					      GPOEN_DISABLE,
509					      GPI_NONE)>;
510			bias-pull-up;
511			drive-strength = <2>;
512			input-enable;
513			input-schmitt-disable;
514			slew-rate = <0>;
515		};
516	};
517
518	pcie1_pins: pcie1-0 {
519		clkreq-pins {
520			pinmux = <GPIOMUX(29, GPOUT_LOW,
521					      GPOEN_DISABLE,
522					      GPI_NONE)>;
523			bias-pull-down;
524			drive-strength = <2>;
525			input-enable;
526			input-schmitt-disable;
527			slew-rate = <0>;
528		};
529
530		wake-pins {
531			pinmux = <GPIOMUX(21, GPOUT_LOW,
532				      GPOEN_DISABLE,
533					      GPI_NONE)>;
534			bias-pull-up;
535			drive-strength = <2>;
536			input-enable;
537			input-schmitt-disable;
538			slew-rate = <0>;
539		};
540	};
541
542	pwmdac_pins: pwmdac-0 {
543		pwmdac-pins {
544			pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
545					      GPOEN_ENABLE,
546					      GPI_NONE)>,
547				 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
548					      GPOEN_ENABLE,
549					      GPI_NONE)>;
550			bias-disable;
551			drive-strength = <2>;
552			input-disable;
553			input-schmitt-disable;
554			slew-rate = <0>;
555		};
556	};
557
558	pwm_pins: pwm-0 {
559		pwm-pins {
560			pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
561					      GPOEN_SYS_PWM0_CHANNEL0,
562					      GPI_NONE)>,
563				 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
564					      GPOEN_SYS_PWM0_CHANNEL1,
565					      GPI_NONE)>;
566			bias-disable;
567			drive-strength = <12>;
568			input-disable;
569			input-schmitt-disable;
570			slew-rate = <0>;
571		};
572	};
573
574	spi0_pins: spi0-0 {
575		mosi-pins {
576			pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
577					      GPOEN_ENABLE,
578					      GPI_NONE)>;
579			bias-disable;
580			input-disable;
581			input-schmitt-disable;
582		};
583
584		miso-pins {
585			pinmux = <GPIOMUX(53, GPOUT_LOW,
586					      GPOEN_DISABLE,
587					      GPI_SYS_SPI0_RXD)>;
588			bias-pull-up;
589			input-enable;
590			input-schmitt-enable;
591		};
592
593		sck-pins {
594			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
595					      GPOEN_ENABLE,
596					      GPI_SYS_SPI0_CLK)>;
597			bias-disable;
598			input-disable;
599			input-schmitt-disable;
600		};
601
602		ss-pins {
603			pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
604					      GPOEN_ENABLE,
605					      GPI_SYS_SPI0_FSS)>;
606			bias-disable;
607			input-disable;
608			input-schmitt-disable;
609		};
610	};
611
612	uart0_pins: uart0-0 {
613		tx-pins {
614			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
615					     GPOEN_ENABLE,
616					     GPI_NONE)>;
617			bias-disable;
618			drive-strength = <12>;
619			input-disable;
620			input-schmitt-disable;
621			slew-rate = <0>;
622		};
623
624		rx-pins {
625			pinmux = <GPIOMUX(6, GPOUT_LOW,
626					     GPOEN_DISABLE,
627					     GPI_SYS_UART0_RX)>;
628			bias-disable; /* external pull-up */
629			drive-strength = <2>;
630			input-enable;
631			input-schmitt-enable;
632			slew-rate = <0>;
633		};
634	};
635};
636
637&uart0 {
638	pinctrl-names = "default";
639	pinctrl-0 = <&uart0_pins>;
640	status = "okay";
641};
642
643&usb0 {
644	dr_mode = "peripheral";
645	status = "okay";
646};
647
648&U74_1 {
649	cpu-supply = <&vdd_cpu>;
650};
651
652&U74_2 {
653	cpu-supply = <&vdd_cpu>;
654};
655
656&U74_3 {
657	cpu-supply = <&vdd_cpu>;
658};
659
660&U74_4 {
661	cpu-supply = <&vdd_cpu>;
662};
663