1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2023 Gateworks Corporation 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/phy/phy-imx8-pcie.h> 9 10/ { 11 connector { 12 compatible = "gpio-usb-b-connector", "usb-b-connector"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_usbcon1>; 15 type = "micro"; 16 label = "Type-C"; 17 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 18 19 port { 20 usb_dr_connector: endpoint { 21 remote-endpoint = <&usb3_dwc>; 22 }; 23 }; 24 }; 25 26 led-controller { 27 compatible = "gpio-leds"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pinctrl_gpio_leds>; 30 31 led-0 { 32 function = LED_FUNCTION_STATUS; 33 color = <LED_COLOR_ID_GREEN>; 34 gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; 35 default-state = "on"; 36 linux,default-trigger = "heartbeat"; 37 }; 38 39 led-1 { 40 function = LED_FUNCTION_STATUS; 41 color = <LED_COLOR_ID_RED>; 42 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; 43 default-state = "off"; 44 }; 45 }; 46 47 pcie0_refclk: clock-pcie0 { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <100000000>; 51 }; 52 53 pps { 54 compatible = "pps-gpio"; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&pinctrl_pps>; 57 gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 58 status = "okay"; 59 }; 60}; 61 62/* off-board header */ 63&ecspi2 { 64 pinctrl-names = "default"; 65 pinctrl-0 = <&pinctrl_spi2>; 66 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, 67 <&gpio1 10 GPIO_ACTIVE_LOW>; 68 status = "okay"; 69 70 tpm@1 { 71 compatible = "atmel,attpm20p", "tcg,tpm_tis-spi"; 72 reg = <0x1>; 73 spi-max-frequency = <36000000>; 74 }; 75}; 76 77&gpio4 { 78 gpio-line-names = 79 "", "", "", "", 80 "", "", "", "", 81 "dio1", "", "", "dio0", 82 "", "", "pci_usb_sel", "", 83 "", "", "", "", 84 "", "", "", "", 85 "dio3", "", "dio2", "", 86 "pci_wdis#", "", "", ""; 87}; 88 89&i2c2 { 90 clock-frequency = <400000>; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&pinctrl_i2c2>; 93 status = "okay"; 94 95 accelerometer@19 { 96 compatible = "st,lis2de12"; 97 reg = <0x19>; 98 pinctrl-names = "default"; 99 pinctrl-0 = <&pinctrl_accel>; 100 st,drdy-int-pin = <1>; 101 interrupt-parent = <&gpio4>; 102 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 103 }; 104}; 105 106&pcie_phy { 107 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 108 fsl,clkreq-unsupported; 109 clocks = <&pcie0_refclk>; 110 clock-names = "ref"; 111 status = "okay"; 112}; 113 114&pcie { 115 pinctrl-names = "default"; 116 pinctrl-0 = <&pinctrl_pcie0>; 117 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 118 status = "okay"; 119}; 120 121/* GPS */ 122&uart1 { 123 pinctrl-names = "default"; 124 pinctrl-0 = <&pinctrl_uart1>; 125 status = "okay"; 126}; 127 128/* off-board header */ 129&uart3 { 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_uart3>; 132 status = "okay"; 133}; 134 135/* USB1 Type-C front panel */ 136&usb3_0 { 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pinctrl_usb1>; 139 fsl,over-current-active-low; 140 status = "okay"; 141}; 142 143&usb3_phy0 { 144 status = "okay"; 145}; 146 147&usb_dwc3_0 { 148 /* dual role is implemented but not a full featured OTG */ 149 adp-disable; 150 hnp-disable; 151 srp-disable; 152 dr_mode = "otg"; 153 usb-role-switch; 154 role-switch-default-mode = "peripheral"; 155 status = "okay"; 156 157 port { 158 usb3_dwc: endpoint { 159 remote-endpoint = <&usb_dr_connector>; 160 }; 161 }; 162}; 163 164/* USB2 - MiniPCIe socket */ 165&usb3_1 { 166 fsl,permanently-attached; 167 fsl,disable-port-power-control; 168 status = "okay"; 169}; 170 171&usb3_phy1 { 172 status = "okay"; 173}; 174 175&usb_dwc3_1 { 176 dr_mode = "host"; 177 status = "okay"; 178}; 179 180&iomuxc { 181 pinctrl-names = "default"; 182 pinctrl-0 = <&pinctrl_hog>; 183 184 pinctrl_hog: hoggrp { 185 fsl,pins = < 186 MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ 187 MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ 188 MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */ 189 MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */ 190 MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */ 191 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */ 192 >; 193 }; 194 195 pinctrl_accel: accelgrp { 196 fsl,pins = < 197 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */ 198 >; 199 }; 200 201 pinctrl_gpio_leds: gpioledgrp { 202 fsl,pins = < 203 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ 204 MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ 205 >; 206 }; 207 208 pinctrl_pcie0: pcie0grp { 209 fsl,pins = < 210 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 211 >; 212 }; 213 214 pinctrl_pps: ppsgrp { 215 fsl,pins = < 216 MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 217 >; 218 }; 219 220 pinctrl_usb1: usb1grp { 221 fsl,pins = < 222 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */ 223 >; 224 }; 225 226 pinctrl_usbcon1: usbcon1grp { 227 fsl,pins = < 228 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */ 229 >; 230 }; 231 232 pinctrl_spi2: spi2grp { 233 fsl,pins = < 234 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140 235 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 236 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 237 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 238 MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140 239 >; 240 }; 241 242 pinctrl_uart1: uart1grp { 243 fsl,pins = < 244 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 245 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 246 >; 247 }; 248 249 pinctrl_uart3: uart3grp { 250 fsl,pins = < 251 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 252 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 253 >; 254 }; 255}; 256