1 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ 2 /* 3 * Copyright 2025 NXP 4 */ 5 6 #ifndef __IMX8MP_AIPSTZ_H 7 #define __IMX8MP_AIPSTZ_H 8 9 /* consumer type - master or peripheral */ 10 #define IMX8MP_AIPSTZ_MASTER 0x0 11 #define IMX8MP_AIPSTZ_PERIPH 0x1 12 13 /* master configuration options */ 14 #define IMX8MP_AIPSTZ_MPL (1 << 0) 15 #define IMX8MP_AIPSTZ_MTW (1 << 1) 16 #define IMX8MP_AIPSTZ_MTR (1 << 2) 17 #define IMX8MP_AIPSTZ_MBW (1 << 3) 18 19 /* peripheral configuration options */ 20 #define IMX8MP_AIPSTZ_TP (1 << 0) 21 #define IMX8MP_AIPSTZ_WP (1 << 1) 22 #define IMX8MP_AIPSTZ_SP (1 << 2) 23 #define IMX8MP_AIPSTZ_BW (1 << 3) 24 25 /* master ID definitions */ 26 #define IMX8MP_AIPSTZ_EDMA 0 /* AUDIOMIX EDMA */ 27 #define IMX8MP_AIPSTZ_CA53 1 /* Cortex-A53 cluster */ 28 #define IMX8MP_AIPSTZ_SDMA2 3 /* AUDIOMIX SDMA2 */ 29 #define IMX8MP_AIPSTZ_SDMA3 3 /* AUDIOMIX SDMA3 */ 30 #define IMX8MP_AIPSTZ_HIFI4 5 /* HIFI4 DSP */ 31 #define IMX8MP_AIPSTZ_CM7 6 /* Cortex-M7 */ 32 33 #endif /* __IMX8MP_AIPSTZ_H */ 34