1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2023, Intel Corporation. */ 3 4 #ifndef _ICE_IRQ_H_ 5 #define _ICE_IRQ_H_ 6 7 struct ice_irq_entry { 8 unsigned int index; 9 bool dynamic; /* allocation type flag */ 10 }; 11 12 struct ice_irq_tracker { 13 struct xarray entries; 14 u16 num_entries; /* total vectors available */ 15 u16 num_static; /* preallocated entries */ 16 }; 17 18 struct ice_virt_irq_tracker { 19 unsigned long *bm; /* bitmap to track irq usage */ 20 u32 num_entries; 21 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 22 * number of MSIX vectors needed for all SR-IOV VFs from the number of 23 * MSIX vectors allowed on this PF. 24 */ 25 u32 base; 26 }; 27 28 int ice_init_interrupt_scheme(struct ice_pf *pf); 29 void ice_clear_interrupt_scheme(struct ice_pf *pf); 30 31 struct msi_map ice_alloc_irq(struct ice_pf *pf, bool dyn_only); 32 void ice_free_irq(struct ice_pf *pf, struct msi_map map); 33 34 int ice_virt_get_irqs(struct ice_pf *pf, u32 needed); 35 void ice_virt_free_irqs(struct ice_pf *pf, u32 index, u32 irqs); 36 #endif 37