xref: /linux/drivers/staging/media/atomisp/pci/css_2401_system/hrt/ibuf_cntrl_defs.h (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15 
16 #ifndef _ibuf_cntrl_defs_h_
17 #define _ibuf_cntrl_defs_h_
18 
19 #include <stream2mmio_defs.h>
20 #include <dma_v2_defs.h>
21 
22 #define _IBUF_CNTRL_REG_ALIGN 4
23 /* alignment of register banks, first bank are shared configuration and status registers: */
24 #define _IBUF_CNTRL_PROC_REG_ALIGN        32
25 
26 /* the actual amount of configuration registers per proc: */
27 #define _IBUF_CNTRL_CONFIG_REGS_PER_PROC 18
28 /* the actual amount of shared configuration registers: */
29 #define _IBUF_CNTRL_CONFIG_REGS_NO_PROC  0
30 
31 /* the actual amount of status registers per proc */
32 #define _IBUF_CNTRL_STATUS_REGS_PER_PROC (_IBUF_CNTRL_CONFIG_REGS_PER_PROC + 10)
33 /* the actual amount shared status registers */
34 #define _IBUF_CNTRL_STATUS_REGS_NO_PROC  (_IBUF_CNTRL_CONFIG_REGS_NO_PROC + 2)
35 
36 /* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */
37 #define _IBUF_CNTRL_TIME_OUT_BITS         5
38 
39 /* command token definition */
40 #define _IBUF_CNTRL_CMD_TOKEN_LSB          0
41 #define _IBUF_CNTRL_CMD_TOKEN_MSB          1
42 
43 /* Str2MMIO defines */
44 #define _IBUF_CNTRL_STREAM2MMIO_CMD_TOKEN_MSB        _STREAM2MMIO_CMD_TOKEN_CMD_MSB
45 #define _IBUF_CNTRL_STREAM2MMIO_CMD_TOKEN_LSB        _STREAM2MMIO_CMD_TOKEN_CMD_LSB
46 #define _IBUF_CNTRL_STREAM2MMIO_NUM_ITEMS_BITS       _STREAM2MMIO_PACK_NUM_ITEMS_BITS
47 #define _IBUF_CNTRL_STREAM2MMIO_ACK_EOF_BIT          _STREAM2MMIO_PACK_ACK_EOF_BIT
48 #define _IBUF_CNTRL_STREAM2MMIO_ACK_TOKEN_VALID_BIT  _STREAM2MMIO_ACK_TOKEN_VALID_BIT
49 
50 /* acknowledge token definition */
51 #define _IBUF_CNTRL_ACK_TOKEN_STORES_IDX    0
52 #define _IBUF_CNTRL_ACK_TOKEN_STORES_BITS   15
53 #define _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX     (_IBUF_CNTRL_ACK_TOKEN_STORES_BITS + _IBUF_CNTRL_ACK_TOKEN_STORES_IDX)
54 #define _IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS    _STREAM2MMIO_PACK_NUM_ITEMS_BITS
55 #define _IBUF_CNTRL_ACK_TOKEN_LSB          _IBUF_CNTRL_ACK_TOKEN_STORES_IDX
56 #define _IBUF_CNTRL_ACK_TOKEN_MSB          (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX - 1)
57 /* bit 31 indicates a valid ack: */
58 #define _IBUF_CNTRL_ACK_TOKEN_VALID_BIT    (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX)
59 
60 /*shared registers:*/
61 #define _IBUF_CNTRL_RECALC_WORDS_STATUS     0
62 #define _IBUF_CNTRL_ARBITERS_STATUS         1
63 
64 #define _IBUF_CNTRL_SET_CRUN                2 /* NO PHYSICAL REGISTER!! Only used in HSS model */
65 
66 /*register addresses for each proc: */
67 #define _IBUF_CNTRL_CMD                   0
68 #define _IBUF_CNTRL_ACK                   1
69 
70 /* number of items (packets or words) per frame: */
71 #define _IBUF_CNTRL_NUM_ITEMS_PER_STORE   2
72 
73 /* number of stores (packets or words) per store/buffer: */
74 #define _IBUF_CNTRL_NUM_STORES_PER_FRAME  3
75 
76 /* the channel and command in the DMA */
77 #define _IBUF_CNTRL_DMA_CHANNEL           4
78 #define _IBUF_CNTRL_DMA_CMD               5
79 
80 /* the start address and stride of the buffers */
81 #define _IBUF_CNTRL_BUFFER_START_ADDRESS  6
82 #define _IBUF_CNTRL_BUFFER_STRIDE         7
83 #define _IBUF_CNTRL_BUFFER_END_ADDRESS    8
84 
85 /* destination start address, stride and end address; should be the same as in the DMA */
86 #define _IBUF_CNTRL_DEST_START_ADDRESS    9
87 #define _IBUF_CNTRL_DEST_STRIDE           10
88 #define _IBUF_CNTRL_DEST_END_ADDRESS      11
89 
90 /* send a frame sync or not, default 1 */
91 #define _IBUF_CNTRL_SYNC_FRAME            12
92 
93 /* str2mmio cmds */
94 #define _IBUF_CNTRL_STR2MMIO_SYNC_CMD     13
95 #define _IBUF_CNTRL_STR2MMIO_STORE_CMD    14
96 
97 /* num elems p word*/
98 #define _IBUF_CNTRL_SHIFT_ITEMS           15
99 #define _IBUF_CNTRL_ELEMS_P_WORD_IBUF     16
100 #define _IBUF_CNTRL_ELEMS_P_WORD_DEST     17
101 
102 /* STATUS */
103 /* current frame and stores in buffer */
104 #define _IBUF_CNTRL_CUR_STORES            18
105 #define _IBUF_CNTRL_CUR_ACKS              19
106 
107 /* current buffer and destination address for DMA cmd's */
108 #define _IBUF_CNTRL_CUR_S2M_IBUF_ADDR     20
109 #define _IBUF_CNTRL_CUR_DMA_IBUF_ADDR     21
110 #define _IBUF_CNTRL_CUR_DMA_DEST_ADDR     22
111 #define _IBUF_CNTRL_CUR_ISP_DEST_ADDR     23
112 
113 #define _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND  24
114 
115 #define _IBUF_CNTRL_MAIN_CNTRL_STATE      25
116 #define _IBUF_CNTRL_DMA_SYNC_STATE        26
117 #define _IBUF_CNTRL_ISP_SYNC_STATE        27
118 
119 /*Commands: */
120 #define _IBUF_CNTRL_CMD_STORE_FRAME_IDX     0
121 #define _IBUF_CNTRL_CMD_ONLINE_IDX          1
122 
123 /* initialize, copy st_addr to cur_addr etc */
124 #define _IBUF_CNTRL_CMD_INITIALIZE          0
125 
126 /* store an online frame (sync with ISP, use end cfg start, stride and end address: */
127 #define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME  ((1 << _IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1 << _IBUF_CNTRL_CMD_ONLINE_IDX))
128 
129 /* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */
130 #define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME  BIT(_IBUF_CNTRL_CMD_STORE_FRAME_IDX)
131 
132 /* false command token, should be different then commands. Use online bit, not store frame: */
133 #define _IBUF_CNTRL_FALSE_ACK               2
134 
135 #endif
136