xref: /linux/drivers/gpu/drm/gud/gud_internal.h (revision 1c9982b4961334c1edb0745a04cabd34bc2de675)
1 /* SPDX-License-Identifier: MIT */
2 
3 #ifndef __LINUX_GUD_INTERNAL_H
4 #define __LINUX_GUD_INTERNAL_H
5 
6 #include <linux/list.h>
7 #include <linux/mutex.h>
8 #include <linux/scatterlist.h>
9 #include <linux/usb.h>
10 #include <linux/workqueue.h>
11 #include <uapi/drm/drm_fourcc.h>
12 
13 #include <drm/drm_modes.h>
14 
15 struct gud_device {
16 	struct drm_device drm;
17 	struct drm_plane plane;
18 	struct drm_crtc crtc;
19 	struct work_struct work;
20 	u32 flags;
21 	const struct drm_format_info *xrgb8888_emulation_format;
22 
23 	u16 *properties;
24 	unsigned int num_properties;
25 
26 	unsigned int bulk_pipe;
27 	void *bulk_buf;
28 	size_t bulk_len;
29 	struct sg_table bulk_sgt;
30 
31 	u8 compression;
32 	void *lz4_comp_mem;
33 	void *compress_buf;
34 
35 	u64 stats_length;
36 	u64 stats_actual_length;
37 	unsigned int stats_num_errors;
38 
39 	struct mutex ctrl_lock; /* Serialize get/set and status transfers */
40 
41 	struct mutex damage_lock; /* Protects the following members: */
42 	struct drm_framebuffer *fb;
43 	struct drm_rect damage;
44 	bool prev_flush_failed;
45 	void *shadow_buf;
46 };
47 
to_gud_device(struct drm_device * drm)48 static inline struct gud_device *to_gud_device(struct drm_device *drm)
49 {
50 	return container_of(drm, struct gud_device, drm);
51 }
52 
gud_to_usb_device(struct gud_device * gdrm)53 static inline struct usb_device *gud_to_usb_device(struct gud_device *gdrm)
54 {
55 	return interface_to_usbdev(to_usb_interface(gdrm->drm.dev));
56 }
57 
58 int gud_usb_get(struct gud_device *gdrm, u8 request, u16 index, void *buf, size_t len);
59 int gud_usb_set(struct gud_device *gdrm, u8 request, u16 index, void *buf, size_t len);
60 int gud_usb_get_u8(struct gud_device *gdrm, u8 request, u16 index, u8 *val);
61 int gud_usb_set_u8(struct gud_device *gdrm, u8 request, u8 val);
62 
63 void gud_clear_damage(struct gud_device *gdrm);
64 void gud_flush_work(struct work_struct *work);
65 void gud_crtc_atomic_enable(struct drm_crtc *crtc,
66 			    struct drm_atomic_state *state);
67 void gud_crtc_atomic_disable(struct drm_crtc *crtc,
68 			     struct drm_atomic_state *state);
69 int gud_plane_atomic_check(struct drm_plane *plane,
70 			   struct drm_atomic_state *state);
71 void gud_plane_atomic_update(struct drm_plane *plane,
72 			     struct drm_atomic_state *atomic_state);
73 int gud_connector_fill_properties(struct drm_connector_state *connector_state,
74 				  struct gud_property_req *properties);
75 int gud_get_connectors(struct gud_device *gdrm);
76 
77 /* Driver internal fourcc transfer formats */
78 #define GUD_DRM_FORMAT_R1		0x00000122
79 #define GUD_DRM_FORMAT_XRGB1111		0x03121722
80 
gud_from_fourcc(u32 fourcc)81 static inline u8 gud_from_fourcc(u32 fourcc)
82 {
83 	switch (fourcc) {
84 	case GUD_DRM_FORMAT_R1:
85 		return GUD_PIXEL_FORMAT_R1;
86 	case DRM_FORMAT_R8:
87 		return GUD_PIXEL_FORMAT_R8;
88 	case GUD_DRM_FORMAT_XRGB1111:
89 		return GUD_PIXEL_FORMAT_XRGB1111;
90 	case DRM_FORMAT_RGB332:
91 		return GUD_PIXEL_FORMAT_RGB332;
92 	case DRM_FORMAT_RGB565:
93 		return GUD_PIXEL_FORMAT_RGB565;
94 	case DRM_FORMAT_RGB888:
95 		return GUD_PIXEL_FORMAT_RGB888;
96 	case DRM_FORMAT_XRGB8888:
97 		return GUD_PIXEL_FORMAT_XRGB8888;
98 	case DRM_FORMAT_ARGB8888:
99 		return GUD_PIXEL_FORMAT_ARGB8888;
100 	}
101 
102 	return 0;
103 }
104 
gud_to_fourcc(u8 format)105 static inline u32 gud_to_fourcc(u8 format)
106 {
107 	switch (format) {
108 	case GUD_PIXEL_FORMAT_R1:
109 		return GUD_DRM_FORMAT_R1;
110 	case GUD_PIXEL_FORMAT_R8:
111 		return DRM_FORMAT_R8;
112 	case GUD_PIXEL_FORMAT_XRGB1111:
113 		return GUD_DRM_FORMAT_XRGB1111;
114 	case GUD_PIXEL_FORMAT_RGB332:
115 		return DRM_FORMAT_RGB332;
116 	case GUD_PIXEL_FORMAT_RGB565:
117 		return DRM_FORMAT_RGB565;
118 	case GUD_PIXEL_FORMAT_RGB888:
119 		return DRM_FORMAT_RGB888;
120 	case GUD_PIXEL_FORMAT_XRGB8888:
121 		return DRM_FORMAT_XRGB8888;
122 	case GUD_PIXEL_FORMAT_ARGB8888:
123 		return DRM_FORMAT_ARGB8888;
124 	}
125 
126 	return 0;
127 }
128 
gud_from_display_mode(struct gud_display_mode_req * dst,const struct drm_display_mode * src)129 static inline void gud_from_display_mode(struct gud_display_mode_req *dst,
130 					 const struct drm_display_mode *src)
131 {
132 	u32 flags = src->flags & GUD_DISPLAY_MODE_FLAG_USER_MASK;
133 
134 	if (src->type & DRM_MODE_TYPE_PREFERRED)
135 		flags |= GUD_DISPLAY_MODE_FLAG_PREFERRED;
136 
137 	dst->clock = cpu_to_le32(src->clock);
138 	dst->hdisplay = cpu_to_le16(src->hdisplay);
139 	dst->hsync_start = cpu_to_le16(src->hsync_start);
140 	dst->hsync_end = cpu_to_le16(src->hsync_end);
141 	dst->htotal = cpu_to_le16(src->htotal);
142 	dst->vdisplay = cpu_to_le16(src->vdisplay);
143 	dst->vsync_start = cpu_to_le16(src->vsync_start);
144 	dst->vsync_end = cpu_to_le16(src->vsync_end);
145 	dst->vtotal = cpu_to_le16(src->vtotal);
146 	dst->flags = cpu_to_le32(flags);
147 }
148 
gud_to_display_mode(struct drm_display_mode * dst,const struct gud_display_mode_req * src)149 static inline void gud_to_display_mode(struct drm_display_mode *dst,
150 				       const struct gud_display_mode_req *src)
151 {
152 	u32 flags = le32_to_cpu(src->flags);
153 
154 	memset(dst, 0, sizeof(*dst));
155 	dst->clock = le32_to_cpu(src->clock);
156 	dst->hdisplay = le16_to_cpu(src->hdisplay);
157 	dst->hsync_start = le16_to_cpu(src->hsync_start);
158 	dst->hsync_end = le16_to_cpu(src->hsync_end);
159 	dst->htotal = le16_to_cpu(src->htotal);
160 	dst->vdisplay = le16_to_cpu(src->vdisplay);
161 	dst->vsync_start = le16_to_cpu(src->vsync_start);
162 	dst->vsync_end = le16_to_cpu(src->vsync_end);
163 	dst->vtotal = le16_to_cpu(src->vtotal);
164 	dst->flags = flags & GUD_DISPLAY_MODE_FLAG_USER_MASK;
165 	dst->type = DRM_MODE_TYPE_DRIVER;
166 	if (flags & GUD_DISPLAY_MODE_FLAG_PREFERRED)
167 		dst->type |= DRM_MODE_TYPE_PREFERRED;
168 	drm_mode_set_name(dst);
169 }
170 
171 #endif
172