xref: /linux/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi (revision 0cac5ce06e524755b3dac1e0a060b05992076d93) 
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Device Tree nodes common for all GS101-based Pixel
4 *
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/usb/pd.h>
14#include "gs101-pinctrl.h"
15#include "gs101.dtsi"
16
17/ {
18	aliases {
19		serial0 = &serial_0;
20	};
21
22	chosen {
23		/* Bootloader expects bootargs specified otherwise it crashes */
24		bootargs = "";
25		stdout-path = &serial_0;
26
27		/* Use display framebuffer as setup by bootloader */
28		framebuffer0: framebuffer-0 {
29			compatible = "simple-framebuffer";
30			memory-region = <&cont_splash_mem>;
31			/* format properties to be added by actual board */
32			status = "disabled";
33		};
34	};
35
36	gpio-keys {
37		compatible = "gpio-keys";
38		pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
39		pinctrl-names = "default";
40
41		button-vol-down {
42			label = "KEY_VOLUMEDOWN";
43			linux,code = <KEY_VOLUMEDOWN>;
44			gpios = <&gpa7 3 GPIO_ACTIVE_LOW>;
45			wakeup-source;
46		};
47
48		button-vol-up {
49			label = "KEY_VOLUMEUP";
50			linux,code = <KEY_VOLUMEUP>;
51			gpios = <&gpa8 1 GPIO_ACTIVE_LOW>;
52			wakeup-source;
53		};
54
55		button-power {
56			label = "KEY_POWER";
57			linux,code = <KEY_POWER>;
58			gpios = <&gpa10 1 GPIO_ACTIVE_LOW>;
59			wakeup-source;
60		};
61	};
62
63	reboot-mode {
64		compatible = "nvmem-reboot-mode";
65		nvmem-cells = <&nvmem_reboot_mode>;
66		nvmem-cell-names = "reboot-mode";
67		mode-bootloader = <0x800000fc>;
68		mode-charge = <0x8000000a>;
69		mode-dm-verity-device-corrupted = <0x80000050>;
70		mode-fastboot = <0x800000fa>;
71		mode-reboot-ab-update = <0x80000052>;
72		mode-recovery = <0x800000ff>;
73		mode-rescue = <0x800000f9>;
74		mode-shutdown-thermal = <0x80000051>;
75		mode-shutdown-thermal-battery = <0x80000051>;
76	};
77
78	/* TODO: Remove this once PMIC is implemented  */
79	reg_placeholder: regulator-0 {
80		compatible = "regulator-fixed";
81		regulator-name = "placeholder_reg";
82	};
83
84	/* TODO: Remove this once S2MPG11 slave PMIC is implemented  */
85	ufs_0_fixed_vcc_reg: regulator-1 {
86		compatible = "regulator-fixed";
87		regulator-name = "ufs-vcc";
88		gpio = <&gpp0 1 GPIO_ACTIVE_HIGH>;
89		regulator-boot-on;
90		enable-active-high;
91	};
92
93	reserved-memory {
94		cont_splash_mem: splash@fac00000 {
95			/* size to be updated by actual board */
96			reg = <0x0 0xfac00000 0x0>;
97			no-map;
98			status = "disabled";
99		};
100	};
101};
102
103&acpm_ipc {
104	pmic {
105		compatible = "samsung,s2mpg10-pmic";
106		interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
107		pinctrl-names = "default";
108		pinctrl-0 = <&pmic_int>;
109		system-power-controller;
110		wakeup-source;
111
112		clocks {
113			compatible = "samsung,s2mpg10-clk";
114			#clock-cells = <1>;
115			clock-output-names = "rtc32k_ap", "peri32k1",
116					     "peri32k2";
117		};
118
119		regulators {
120		};
121	};
122};
123
124&ext_24_5m {
125	clock-frequency = <24576000>;
126};
127
128&ext_200m {
129	clock-frequency = <200000000>;
130};
131
132&hsi2c_8 {
133	status = "okay";
134
135	eeprom: eeprom@50 {
136		compatible = "atmel,24c08";
137		reg = <0x50>;
138	};
139};
140
141&hsi2c_12 {
142	status = "okay";
143	/* TODO: add the devices once drivers exist */
144
145	usb-typec@25 {
146		compatible = "maxim,max77759-tcpci", "maxim,max33359";
147		reg = <0x25>;
148		interrupts-extended = <&gpa8 2 IRQ_TYPE_LEVEL_LOW>;
149		pinctrl-0 = <&typec_int>;
150		pinctrl-names = "default";
151
152		connector {
153			compatible = "usb-c-connector";
154			label = "USB-C";
155			data-role = "dual";
156			power-role = "dual";
157			self-powered;
158			try-power-role = "sink";
159			op-sink-microwatt = <2600000>;
160			slow-charger-loop;
161			/*
162			 * max77759 operating in reverse boost mode (0xA) can
163			 * source up to 1.5A while extboost can only do ~1A.
164			 * Since extboost is the primary path, advertise 900mA.
165			 */
166			source-pdos = <PDO_FIXED(5000, 900,
167						 (PDO_FIXED_SUSPEND
168						  | PDO_FIXED_USB_COMM
169						  | PDO_FIXED_DATA_SWAP
170						  | PDO_FIXED_DUAL_ROLE))>;
171			sink-pdos = <PDO_FIXED(5000, 3000,
172					       (PDO_FIXED_DATA_SWAP
173						| PDO_FIXED_USB_COMM
174						| PDO_FIXED_HIGHER_CAP
175						| PDO_FIXED_DUAL_ROLE))
176				     PDO_FIXED(9000, 2200, 0)
177				     PDO_PPS_APDO(5000, 11000, 3000)>;
178			sink-vdos = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
179					     IDH_PTYPE_DFP_HOST, 2, 0x18d1)
180				     VDO_CERT(0x0)
181				     VDO_PRODUCT(0x4ee1, 0x0)
182				     VDO_UFP(UFP_VDO_VER1_2,
183					     (DEV_USB2_CAPABLE
184					      | DEV_USB3_CAPABLE),
185					     UFP_RECEPTACLE, 0,
186					     AMA_VCONN_NOT_REQ, 0,
187					     UFP_ALTMODE_NOT_SUPP,
188					     UFP_USB32_GEN1)
189				     /* padding */ 0
190				     VDO_DFP(DFP_VDO_VER1_1,
191					     (HOST_USB2_CAPABLE
192					      | HOST_USB3_CAPABLE),
193					     DFP_RECEPTACLE, 0)>;
194			sink-vdos-v1 = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
195						0, 0, 0x18d1)
196					VDO_CERT(0x0)
197					VDO_PRODUCT(0x4ee1, 0x0)>;
198			/*
199			 * Until bootloader is updated to set those two when
200			 * console is enabled, we disable PD here.
201			 */
202			pd-disable;
203			typec-power-opmode = "default";
204
205			ports {
206				#address-cells = <1>;
207				#size-cells = <0>;
208
209				port@0 {
210					reg = <0>;
211
212					usbc0_orien_sw: endpoint {
213						remote-endpoint = <&usbdrd31_phy_orien_switch>;
214					};
215				};
216
217				port@1 {
218					reg = <1>;
219
220					usbc0_role_sw: endpoint {
221						remote-endpoint = <&usbdrd31_dwc3_role_switch>;
222					};
223				};
224			};
225		};
226	};
227
228	pmic@66 {
229		compatible = "maxim,max77759";
230		reg = <0x66>;
231
232		pinctrl-0 = <&if_pmic_int>;
233		pinctrl-names = "default";
234		interrupts-extended = <&gpa8 3 IRQ_TYPE_LEVEL_LOW>;
235
236		interrupt-controller;
237		#interrupt-cells = <2>;
238
239		gpio {
240			compatible = "maxim,max77759-gpio";
241
242			gpio-controller;
243			#gpio-cells = <2>;
244			/*
245			 * "Human-readable name [SIGNAL_LABEL]" where the
246			 * latter comes from the schematic
247			 */
248			gpio-line-names = "OTG boost [OTG_BOOST_EN]",
249					  "max20339 IRQ [MW_OVP_INT_L]";
250
251			interrupt-controller;
252			#interrupt-cells = <2>;
253		};
254
255		nvmem-0 {
256			compatible = "maxim,max77759-nvmem";
257
258			nvmem-layout {
259				compatible = "fixed-layout";
260				#address-cells = <1>;
261				#size-cells = <1>;
262
263				nvmem_reboot_mode: reboot-mode@0 {
264					reg = <0x0 0x4>;
265				};
266
267				boot-reason@4 {
268					reg = <0x4 0x4>;
269				};
270
271				shutdown-user-flag@8 {
272					reg = <0x8 0x1>;
273				};
274
275				rsoc@a {
276					reg = <0xa 0x2>;
277				};
278			};
279		};
280	};
281};
282
283&pinctrl_far_alive {
284	key_voldown: key-voldown-pins {
285		samsung,pins = "gpa7-3";
286		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
287		samsung,pin-pud = <GS101_PIN_PULL_NONE>;
288		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
289	};
290
291	key_volup: key-volup-pins {
292		samsung,pins = "gpa8-1";
293		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
294		samsung,pin-pud = <GS101_PIN_PULL_NONE>;
295		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
296	};
297
298	typec_int: typec-int-pins {
299		samsung,pins = "gpa8-2";
300		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
301		samsung,pin-pud = <GS101_PIN_PULL_UP>;
302		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
303	};
304
305	if_pmic_int: if-pmic-int-pins {
306		samsung,pins = "gpa8-3";
307		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
308		samsung,pin-pud = <GS101_PIN_PULL_UP>;
309		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
310	};
311};
312
313&pinctrl_gpio_alive {
314	pmic_int: pmic-int-pins {
315		samsung,pins = "gpa0-6";
316		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
317		samsung,pin-pud = <GS101_PIN_PULL_NONE>;
318	};
319
320	key_power: key-power-pins {
321		samsung,pins = "gpa10-1";
322		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
323		samsung,pin-pud = <GS101_PIN_PULL_NONE>;
324		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
325	};
326};
327
328&serial_0 {
329	status = "okay";
330};
331
332&ufs_0 {
333	status = "okay";
334	vcc-supply = <&ufs_0_fixed_vcc_reg>;
335};
336
337&ufs_0_phy {
338	status = "okay";
339};
340
341&usbdrd31 {
342	vdd10-supply = <&reg_placeholder>;
343	vdd33-supply = <&reg_placeholder>;
344	status = "okay";
345};
346
347&usbdrd31_dwc3 {
348	dr_mode = "otg";
349	usb-role-switch;
350	role-switch-default-mode = "peripheral";
351	maximum-speed = "super-speed-plus";
352	status = "okay";
353
354	port {
355		usbdrd31_dwc3_role_switch: endpoint {
356			remote-endpoint = <&usbc0_role_sw>;
357		};
358	};
359};
360
361&usbdrd31_phy {
362	orientation-switch;
363	/* TODO: Update these once PMIC is implemented */
364	pll-supply = <&reg_placeholder>;
365	dvdd-usb20-supply = <&reg_placeholder>;
366	vddh-usb20-supply = <&reg_placeholder>;
367	vdd33-usb20-supply = <&reg_placeholder>;
368	vdda-usbdp-supply = <&reg_placeholder>;
369	vddh-usbdp-supply = <&reg_placeholder>;
370	status = "okay";
371
372	port {
373		usbdrd31_phy_orien_switch: endpoint {
374			remote-endpoint = <&usbc0_orien_sw>;
375		};
376	};
377};
378
379&usi_uart {
380	samsung,clkreq-on; /* needed for UART mode */
381	status = "okay";
382};
383
384&usi8 {
385	samsung,mode = <USI_MODE_I2C>;
386	status = "okay";
387};
388
389&usi12 {
390	samsung,mode = <USI_MODE_I2C>;
391	status = "okay";
392};
393
394&watchdog_cl0 {
395	timeout-sec = <30>;
396	status = "okay";
397};
398