1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * gpio-max3191x.c - GPIO driver for Maxim MAX3191x industrial serializer
4 *
5 * Copyright (C) 2017 KUNBUS GmbH
6 *
7 * The MAX3191x makes 8 digital 24V inputs available via SPI.
8 * Multiple chips can be daisy-chained, the spec does not impose
9 * a limit on the number of chips and neither does this driver.
10 *
11 * Either of two modes is selectable: In 8-bit mode, only the state
12 * of the inputs is clocked out to achieve high readout speeds;
13 * In 16-bit mode, an additional status byte is clocked out with
14 * a CRC and indicator bits for undervoltage and overtemperature.
15 * The driver returns an error instead of potentially bogus data
16 * if any of these fault conditions occur. However it does allow
17 * readout of non-faulting chips in the same daisy-chain.
18 *
19 * MAX3191x supports four debounce settings and the driver is
20 * capable of configuring these differently for each chip in the
21 * daisy-chain.
22 *
23 * If the chips are hardwired to 8-bit mode ("modesel" pulled high),
24 * gpio-pisosr.c can be used alternatively to this driver.
25 *
26 * https://datasheets.maximintegrated.com/en/ds/MAX31910.pdf
27 * https://datasheets.maximintegrated.com/en/ds/MAX31911.pdf
28 * https://datasheets.maximintegrated.com/en/ds/MAX31912.pdf
29 * https://datasheets.maximintegrated.com/en/ds/MAX31913.pdf
30 * https://datasheets.maximintegrated.com/en/ds/MAX31953-MAX31963.pdf
31 */
32
33 #include <linux/bitmap.h>
34 #include <linux/bitops.h>
35 #include <linux/crc8.h>
36 #include <linux/gpio/consumer.h>
37 #include <linux/gpio/driver.h>
38 #include <linux/module.h>
39 #include <linux/spi/spi.h>
40
41 enum max3191x_mode {
42 STATUS_BYTE_ENABLED,
43 STATUS_BYTE_DISABLED,
44 };
45
46 /**
47 * struct max3191x_chip - max3191x daisy-chain
48 * @gpio: GPIO controller struct
49 * @lock: protects read sequences
50 * @nchips: number of chips in the daisy-chain
51 * @mode: current mode, 0 for 16-bit, 1 for 8-bit;
52 * for simplicity, all chips in the daisy-chain are assumed
53 * to use the same mode
54 * @modesel_pins: GPIO pins to configure modesel of each chip
55 * @fault_pins: GPIO pins to detect fault of each chip
56 * @db0_pins: GPIO pins to configure debounce of each chip
57 * @db1_pins: GPIO pins to configure debounce of each chip
58 * @mesg: SPI message to perform a readout
59 * @xfer: SPI transfer used by @mesg
60 * @crc_error: bitmap signaling CRC error for each chip
61 * @overtemp: bitmap signaling overtemperature alarm for each chip
62 * @undervolt1: bitmap signaling undervoltage alarm for each chip
63 * @undervolt2: bitmap signaling undervoltage warning for each chip
64 * @fault: bitmap signaling assertion of @fault_pins for each chip
65 * @ignore_uv: whether to ignore undervoltage alarms;
66 * set by a device property if the chips are powered through
67 * 5VOUT instead of VCC24V, in which case they will constantly
68 * signal undervoltage;
69 * for simplicity, all chips in the daisy-chain are assumed
70 * to be powered the same way
71 */
72 struct max3191x_chip {
73 struct gpio_chip gpio;
74 struct mutex lock;
75 u32 nchips;
76 enum max3191x_mode mode;
77 struct gpio_descs *modesel_pins;
78 struct gpio_descs *fault_pins;
79 struct gpio_descs *db0_pins;
80 struct gpio_descs *db1_pins;
81 struct spi_message mesg;
82 struct spi_transfer xfer;
83 unsigned long *crc_error;
84 unsigned long *overtemp;
85 unsigned long *undervolt1;
86 unsigned long *undervolt2;
87 unsigned long *fault;
88 bool ignore_uv;
89 };
90
91 #define MAX3191X_NGPIO 8
92 #define MAX3191X_CRC8_POLYNOMIAL 0xa8 /* (x^5) + x^4 + x^2 + x^0 */
93
94 DECLARE_CRC8_TABLE(max3191x_crc8);
95
max3191x_get_direction(struct gpio_chip * gpio,unsigned int offset)96 static int max3191x_get_direction(struct gpio_chip *gpio, unsigned int offset)
97 {
98 return GPIO_LINE_DIRECTION_IN; /* always in */
99 }
100
max3191x_direction_input(struct gpio_chip * gpio,unsigned int offset)101 static int max3191x_direction_input(struct gpio_chip *gpio, unsigned int offset)
102 {
103 return 0;
104 }
105
max3191x_wordlen(struct max3191x_chip * max3191x)106 static unsigned int max3191x_wordlen(struct max3191x_chip *max3191x)
107 {
108 return max3191x->mode == STATUS_BYTE_ENABLED ? 2 : 1;
109 }
110
max3191x_readout_locked(struct max3191x_chip * max3191x)111 static int max3191x_readout_locked(struct max3191x_chip *max3191x)
112 {
113 struct device *dev = max3191x->gpio.parent;
114 struct spi_device *spi = to_spi_device(dev);
115 int val, i, ot = 0, uv1 = 0;
116
117 val = spi_sync(spi, &max3191x->mesg);
118 if (val) {
119 dev_err_ratelimited(dev, "SPI receive error %d\n", val);
120 return val;
121 }
122
123 for (i = 0; i < max3191x->nchips; i++) {
124 if (max3191x->mode == STATUS_BYTE_ENABLED) {
125 u8 in = ((u8 *)max3191x->xfer.rx_buf)[i * 2];
126 u8 status = ((u8 *)max3191x->xfer.rx_buf)[i * 2 + 1];
127
128 val = (status & 0xf8) != crc8(max3191x_crc8, &in, 1, 0);
129 __assign_bit(i, max3191x->crc_error, val);
130 if (val)
131 dev_err_ratelimited(dev,
132 "chip %d: CRC error\n", i);
133
134 ot = (status >> 1) & 1;
135 __assign_bit(i, max3191x->overtemp, ot);
136 if (ot)
137 dev_err_ratelimited(dev,
138 "chip %d: overtemperature\n", i);
139
140 if (!max3191x->ignore_uv) {
141 uv1 = !((status >> 2) & 1);
142 __assign_bit(i, max3191x->undervolt1, uv1);
143 if (uv1)
144 dev_err_ratelimited(dev,
145 "chip %d: undervoltage\n", i);
146
147 val = !(status & 1);
148 __assign_bit(i, max3191x->undervolt2, val);
149 if (val && !uv1)
150 dev_warn_ratelimited(dev,
151 "chip %d: voltage warn\n", i);
152 }
153 }
154
155 if (max3191x->fault_pins && !max3191x->ignore_uv) {
156 /* fault pin shared by all chips or per chip */
157 struct gpio_desc *fault_pin =
158 (max3191x->fault_pins->ndescs == 1)
159 ? max3191x->fault_pins->desc[0]
160 : max3191x->fault_pins->desc[i];
161
162 val = gpiod_get_value_cansleep(fault_pin);
163 if (val < 0) {
164 dev_err_ratelimited(dev,
165 "GPIO read error %d\n", val);
166 return val;
167 }
168 __assign_bit(i, max3191x->fault, val);
169 if (val && !uv1 && !ot)
170 dev_err_ratelimited(dev,
171 "chip %d: fault\n", i);
172 }
173 }
174
175 return 0;
176 }
177
max3191x_chip_is_faulting(struct max3191x_chip * max3191x,unsigned int chipnum)178 static bool max3191x_chip_is_faulting(struct max3191x_chip *max3191x,
179 unsigned int chipnum)
180 {
181 /* without status byte the only diagnostic is the fault pin */
182 if (!max3191x->ignore_uv && test_bit(chipnum, max3191x->fault))
183 return true;
184
185 if (max3191x->mode == STATUS_BYTE_DISABLED)
186 return false;
187
188 return test_bit(chipnum, max3191x->crc_error) ||
189 test_bit(chipnum, max3191x->overtemp) ||
190 (!max3191x->ignore_uv &&
191 test_bit(chipnum, max3191x->undervolt1));
192 }
193
max3191x_get(struct gpio_chip * gpio,unsigned int offset)194 static int max3191x_get(struct gpio_chip *gpio, unsigned int offset)
195 {
196 struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
197 int ret, chipnum, wordlen = max3191x_wordlen(max3191x);
198 u8 in;
199
200 mutex_lock(&max3191x->lock);
201 ret = max3191x_readout_locked(max3191x);
202 if (ret)
203 goto out_unlock;
204
205 chipnum = offset / MAX3191X_NGPIO;
206 if (max3191x_chip_is_faulting(max3191x, chipnum)) {
207 ret = -EIO;
208 goto out_unlock;
209 }
210
211 in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
212 ret = (in >> (offset % MAX3191X_NGPIO)) & 1;
213
214 out_unlock:
215 mutex_unlock(&max3191x->lock);
216 return ret;
217 }
218
max3191x_get_multiple(struct gpio_chip * gpio,unsigned long * mask,unsigned long * bits)219 static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
220 unsigned long *bits)
221 {
222 struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
223 const unsigned int wordlen = max3191x_wordlen(max3191x);
224 int ret;
225 unsigned long bit;
226 unsigned long gpio_mask;
227 unsigned long in;
228
229 mutex_lock(&max3191x->lock);
230 ret = max3191x_readout_locked(max3191x);
231 if (ret)
232 goto out_unlock;
233
234 bitmap_zero(bits, gpio->ngpio);
235 for_each_set_clump8(bit, gpio_mask, mask, gpio->ngpio) {
236 unsigned int chipnum = bit / MAX3191X_NGPIO;
237
238 if (max3191x_chip_is_faulting(max3191x, chipnum)) {
239 ret = -EIO;
240 goto out_unlock;
241 }
242
243 in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
244 in &= gpio_mask;
245 bitmap_set_value8(bits, in, bit);
246 }
247
248 out_unlock:
249 mutex_unlock(&max3191x->lock);
250 return ret;
251 }
252
max3191x_set_config(struct gpio_chip * gpio,unsigned int offset,unsigned long config)253 static int max3191x_set_config(struct gpio_chip *gpio, unsigned int offset,
254 unsigned long config)
255 {
256 struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
257 u32 debounce, chipnum, db0_val, db1_val;
258
259 if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
260 return -ENOTSUPP;
261
262 if (!max3191x->db0_pins || !max3191x->db1_pins)
263 return -EINVAL;
264
265 debounce = pinconf_to_config_argument(config);
266 switch (debounce) {
267 case 0:
268 db0_val = 0;
269 db1_val = 0;
270 break;
271 case 1 ... 25:
272 db0_val = 0;
273 db1_val = 1;
274 break;
275 case 26 ... 750:
276 db0_val = 1;
277 db1_val = 0;
278 break;
279 case 751 ... 3000:
280 db0_val = 1;
281 db1_val = 1;
282 break;
283 default:
284 return -EINVAL;
285 }
286
287 if (max3191x->db0_pins->ndescs == 1)
288 chipnum = 0; /* all chips use the same pair of debounce pins */
289 else
290 chipnum = offset / MAX3191X_NGPIO; /* per chip debounce pins */
291
292 mutex_lock(&max3191x->lock);
293 gpiod_set_value_cansleep(max3191x->db0_pins->desc[chipnum], db0_val);
294 gpiod_set_value_cansleep(max3191x->db1_pins->desc[chipnum], db1_val);
295 mutex_unlock(&max3191x->lock);
296 return 0;
297 }
298
max3191x_gpiod_multi_set_single_value(struct gpio_descs * descs,int value)299 static void max3191x_gpiod_multi_set_single_value(struct gpio_descs *descs,
300 int value)
301 {
302 unsigned long *values;
303
304 values = bitmap_alloc(descs->ndescs, GFP_KERNEL);
305 if (!values)
306 return;
307
308 if (value)
309 bitmap_fill(values, descs->ndescs);
310 else
311 bitmap_zero(values, descs->ndescs);
312
313 gpiod_multi_set_value_cansleep(descs, values);
314 bitmap_free(values);
315 }
316
devm_gpiod_get_array_optional_count(struct device * dev,const char * con_id,enum gpiod_flags flags,unsigned int expected)317 static struct gpio_descs *devm_gpiod_get_array_optional_count(
318 struct device *dev, const char *con_id,
319 enum gpiod_flags flags, unsigned int expected)
320 {
321 struct gpio_descs *descs;
322 int found = gpiod_count(dev, con_id);
323
324 if (found == -ENOENT)
325 return NULL;
326
327 if (found != expected && found != 1) {
328 dev_err(dev, "ignoring %s-gpios: found %d, expected %u or 1\n",
329 con_id, found, expected);
330 return NULL;
331 }
332
333 descs = devm_gpiod_get_array_optional(dev, con_id, flags);
334
335 if (IS_ERR(descs)) {
336 dev_err(dev, "failed to get %s-gpios: %ld\n",
337 con_id, PTR_ERR(descs));
338 return NULL;
339 }
340
341 return descs;
342 }
343
max3191x_probe(struct spi_device * spi)344 static int max3191x_probe(struct spi_device *spi)
345 {
346 struct device *dev = &spi->dev;
347 struct max3191x_chip *max3191x;
348 int n, ret;
349
350 max3191x = devm_kzalloc(dev, sizeof(*max3191x), GFP_KERNEL);
351 if (!max3191x)
352 return -ENOMEM;
353 spi_set_drvdata(spi, max3191x);
354
355 max3191x->nchips = 1;
356 device_property_read_u32(dev, "#daisy-chained-devices",
357 &max3191x->nchips);
358
359 n = BITS_TO_LONGS(max3191x->nchips);
360 max3191x->crc_error = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
361 max3191x->undervolt1 = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
362 max3191x->undervolt2 = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
363 max3191x->overtemp = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
364 max3191x->fault = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
365 max3191x->xfer.rx_buf = devm_kcalloc(dev, max3191x->nchips,
366 2, GFP_KERNEL);
367 if (!max3191x->crc_error || !max3191x->undervolt1 ||
368 !max3191x->overtemp || !max3191x->undervolt2 ||
369 !max3191x->fault || !max3191x->xfer.rx_buf)
370 return -ENOMEM;
371
372 max3191x->modesel_pins = devm_gpiod_get_array_optional_count(dev,
373 "maxim,modesel", GPIOD_ASIS, max3191x->nchips);
374 max3191x->fault_pins = devm_gpiod_get_array_optional_count(dev,
375 "maxim,fault", GPIOD_IN, max3191x->nchips);
376 max3191x->db0_pins = devm_gpiod_get_array_optional_count(dev,
377 "maxim,db0", GPIOD_OUT_LOW, max3191x->nchips);
378 max3191x->db1_pins = devm_gpiod_get_array_optional_count(dev,
379 "maxim,db1", GPIOD_OUT_LOW, max3191x->nchips);
380
381 max3191x->mode = device_property_read_bool(dev, "maxim,modesel-8bit")
382 ? STATUS_BYTE_DISABLED : STATUS_BYTE_ENABLED;
383 if (max3191x->modesel_pins)
384 max3191x_gpiod_multi_set_single_value(max3191x->modesel_pins,
385 max3191x->mode);
386
387 max3191x->ignore_uv = device_property_read_bool(dev,
388 "maxim,ignore-undervoltage");
389
390 if (max3191x->db0_pins && max3191x->db1_pins &&
391 max3191x->db0_pins->ndescs != max3191x->db1_pins->ndescs) {
392 dev_err(dev, "ignoring maxim,db*-gpios: array len mismatch\n");
393 devm_gpiod_put_array(dev, max3191x->db0_pins);
394 devm_gpiod_put_array(dev, max3191x->db1_pins);
395 max3191x->db0_pins = NULL;
396 max3191x->db1_pins = NULL;
397 }
398
399 max3191x->xfer.len = max3191x->nchips * max3191x_wordlen(max3191x);
400 spi_message_init_with_transfers(&max3191x->mesg, &max3191x->xfer, 1);
401
402 max3191x->gpio.label = spi->modalias;
403 max3191x->gpio.owner = THIS_MODULE;
404 max3191x->gpio.parent = dev;
405 max3191x->gpio.base = -1;
406 max3191x->gpio.ngpio = max3191x->nchips * MAX3191X_NGPIO;
407 max3191x->gpio.can_sleep = true;
408
409 max3191x->gpio.get_direction = max3191x_get_direction;
410 max3191x->gpio.direction_input = max3191x_direction_input;
411 max3191x->gpio.get = max3191x_get;
412 max3191x->gpio.get_multiple = max3191x_get_multiple;
413 max3191x->gpio.set_config = max3191x_set_config;
414
415 mutex_init(&max3191x->lock);
416
417 ret = gpiochip_add_data(&max3191x->gpio, max3191x);
418 if (ret) {
419 mutex_destroy(&max3191x->lock);
420 return ret;
421 }
422
423 return 0;
424 }
425
max3191x_remove(struct spi_device * spi)426 static void max3191x_remove(struct spi_device *spi)
427 {
428 struct max3191x_chip *max3191x = spi_get_drvdata(spi);
429
430 gpiochip_remove(&max3191x->gpio);
431 mutex_destroy(&max3191x->lock);
432 }
433
max3191x_register_driver(struct spi_driver * sdrv)434 static int __init max3191x_register_driver(struct spi_driver *sdrv)
435 {
436 crc8_populate_msb(max3191x_crc8, MAX3191X_CRC8_POLYNOMIAL);
437 return spi_register_driver(sdrv);
438 }
439
440 static const struct of_device_id max3191x_of_id[] = {
441 { .compatible = "maxim,max31910" },
442 { .compatible = "maxim,max31911" },
443 { .compatible = "maxim,max31912" },
444 { .compatible = "maxim,max31913" },
445 { .compatible = "maxim,max31953" },
446 { .compatible = "maxim,max31963" },
447 { }
448 };
449 MODULE_DEVICE_TABLE(of, max3191x_of_id);
450
451 static const struct spi_device_id max3191x_spi_id[] = {
452 { "max31910" },
453 { "max31911" },
454 { "max31912" },
455 { "max31913" },
456 { "max31953" },
457 { "max31963" },
458 { }
459 };
460 MODULE_DEVICE_TABLE(spi, max3191x_spi_id);
461
462 static struct spi_driver max3191x_driver = {
463 .driver = {
464 .name = "max3191x",
465 .of_match_table = max3191x_of_id,
466 },
467 .probe = max3191x_probe,
468 .remove = max3191x_remove,
469 .id_table = max3191x_spi_id,
470 };
471 module_driver(max3191x_driver, max3191x_register_driver, spi_unregister_driver);
472
473 MODULE_AUTHOR("Lukas Wunner <lukas@wunner.de>");
474 MODULE_DESCRIPTION("GPIO driver for Maxim MAX3191x industrial serializer");
475 MODULE_LICENSE("GPL v2");
476