1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // es9356.c -- SoundWire codec driver
4 //
5 // Copyright(c) 2025 Everest Semiconductor Co., Ltd
6 //
7 //
8
9 #include <linux/cleanup.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/soundwire/sdw.h>
13 #include <linux/soundwire/sdw_type.h>
14 #include <linux/soundwire/sdw_registers.h>
15 #include <sound/core.h>
16 #include <sound/pcm.h>
17 #include <sound/pcm_params.h>
18 #include <linux/pm_runtime.h>
19 #include <sound/sdw.h>
20 #include <sound/soc.h>
21 #include <sound/soc-dapm.h>
22 #include <sound/tlv.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <sound/jack.h>
26 #include <sound/sdca_asoc.h>
27 #include "es9356.h"
28
29 struct es9356_sdw_priv {
30 struct sdw_slave *slave;
31 struct device *dev;
32 struct regmap *regmap;
33 struct snd_soc_component *component;
34 struct snd_soc_jack *hs_jack;
35
36 /* lock for irq*/
37 struct mutex disable_irq_lock;
38
39 /* lock for pde*/
40 struct mutex pde_lock;
41
42 bool hw_init;
43 bool first_hw_init;
44 int jack_type;
45 bool disable_irq;
46
47 struct delayed_work interrupt_handle_work;
48 struct delayed_work button_detect_work;
49 unsigned int sdca_status;
50 };
51
es9356_sdw_component_probe(struct snd_soc_component * component)52 static int es9356_sdw_component_probe(struct snd_soc_component *component)
53 {
54 struct es9356_sdw_priv *es9356 = snd_soc_component_get_drvdata(component);
55
56 es9356->component = component;
57
58 return 0;
59 }
60
61 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -9600, 12, 0);
62 static const DECLARE_TLV_DB_SCALE(amic_gain_tlv, 0, 3, 0);
63 static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 6, 0);
64
65 static const struct snd_kcontrol_new es9356_sdca_controls[] = {
66 SDCA_SINGLE_Q78_TLV("FU41 Left Playback Volume",
67 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_VOLUME, CH_L),
68 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
69 SDCA_SINGLE_Q78_TLV("FU41 Right Playback Volume",
70 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_VOLUME, CH_R),
71 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
72 SDCA_SINGLE_Q78_TLV("FU36 Left Capture Volume",
73 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_VOLUME, CH_L),
74 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
75 SDCA_SINGLE_Q78_TLV("FU36 Right Capture Volume",
76 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_VOLUME, CH_R),
77 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
78 SDCA_SINGLE_Q78_TLV("FU33 Capture Volume",
79 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU33, ES9356_SDCA_CTL_FU_CH_GAIN, 0),
80 ES9356_GAIN_MIN, ES9356_AMIC_GAIN_MAX, ES9356_AMIC_GAIN_STEP, amic_gain_tlv),
81 SDCA_SINGLE_Q78_TLV("FU21 Left Playback Volume",
82 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_VOLUME, CH_L),
83 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
84 SDCA_SINGLE_Q78_TLV("FU21 Right Playback Volume",
85 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_VOLUME, CH_R),
86 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
87 SDCA_SINGLE_Q78_TLV("FU113 Left Capture Volume",
88 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_VOLUME, CH_L),
89 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
90 SDCA_SINGLE_Q78_TLV("FU113 Right Capture Volume",
91 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_VOLUME, CH_R),
92 ES9356_VOLUME_MIN, ES9356_VOLUME_MAX, ES9356_VOLUME_STEP, out_vol_tlv),
93 SDCA_SINGLE_Q78_TLV("FU11 Capture Volume",
94 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU11, ES9356_SDCA_CTL_FU_CH_GAIN, 0),
95 ES9356_GAIN_MIN, ES9356_DMIC_GAIN_MAX, ES9356_DMIC_GAIN_STEP, dmic_gain_tlv),
96 };
97
98 static const char *const es9356_left_mux_txt[] = {
99 "Left",
100 "Right",
101 };
102
103 static const char *const es9356_right_mux_txt[] = {
104 "Right",
105 "Left",
106 };
107
108 static const struct soc_enum es9356_left_mux_enum =
109 SOC_ENUM_SINGLE(ES9356_DAC_SWAP, 1,
110 ARRAY_SIZE(es9356_left_mux_txt), es9356_left_mux_txt);
111 static const struct soc_enum es9356_right_mux_enum =
112 SOC_ENUM_SINGLE(ES9356_DAC_SWAP, 0,
113 ARRAY_SIZE(es9356_right_mux_txt), es9356_right_mux_txt);
114
115 static const struct snd_kcontrol_new es9356_left_mux_controls =
116 SOC_DAPM_ENUM("Channel MUX", es9356_left_mux_enum);
117 static const struct snd_kcontrol_new es9356_right_mux_controls =
118 SOC_DAPM_ENUM("Channel MUX", es9356_right_mux_enum);
119
120 static const struct snd_soc_dapm_widget es9356_dapm_widgets[] = {
121 SND_SOC_DAPM_OUTPUT("HP"),
122 SND_SOC_DAPM_OUTPUT("SPK"),
123 SND_SOC_DAPM_INPUT("MIC1"),
124 SND_SOC_DAPM_INPUT("PDM_DIN"),
125
126 SND_SOC_DAPM_SUPPLY("DMIC Clock", ES9356_DMIC_GPIO, 1, 1, NULL, 0),
127
128 SND_SOC_DAPM_AIF_IN("DP4RX", "DP4 Playback", 0, SND_SOC_NOPM, 0, 0),
129 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Playback", 0, SND_SOC_NOPM, 0, 0),
130 SND_SOC_DAPM_AIF_OUT("DP1TX", "DP1 Capture", 0, SND_SOC_NOPM, 0, 0),
131 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
132
133 SND_SOC_DAPM_PGA("IF DP3RXL", SND_SOC_NOPM, 0, 0, NULL, 0),
134 SND_SOC_DAPM_PGA("IF DP3RXR", SND_SOC_NOPM, 0, 0, NULL, 0),
135
136 SND_SOC_DAPM_MUX("Left Channel MUX", SND_SOC_NOPM, 0, 0, &es9356_left_mux_controls),
137 SND_SOC_DAPM_MUX("Right Channel MUX", SND_SOC_NOPM, 0, 0, &es9356_right_mux_controls),
138
139 SND_SOC_DAPM_DAC("FU 21 Left", NULL,
140 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_MUTE, CH_L), 0, 1),
141 SND_SOC_DAPM_DAC("FU 21 Right", NULL,
142 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_MUTE, CH_R), 0, 1),
143 SND_SOC_DAPM_DAC("FU 41 Left", NULL,
144 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_MUTE, CH_L), 0, 1),
145 SND_SOC_DAPM_DAC("FU 41 Right", NULL,
146 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_MUTE, CH_R), 0, 1),
147 SND_SOC_DAPM_DAC("FU 113 Left", NULL,
148 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_MUTE, CH_L), 0, 1),
149 SND_SOC_DAPM_DAC("FU 113 Right", NULL,
150 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_MUTE, CH_R), 0, 1),
151 SND_SOC_DAPM_DAC("FU 36 Left", NULL,
152 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_MUTE, CH_L), 0, 1),
153 SND_SOC_DAPM_DAC("FU 36 Right", NULL,
154 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_MUTE, CH_R), 0, 1),
155 };
156
157 static const struct snd_soc_dapm_route es9356_audio_map[] = {
158 {"FU 36 Left", NULL, "MIC1"},
159 {"FU 36 Right", NULL, "MIC1"},
160 {"DP2TX", NULL, "FU 36 Left"},
161 {"DP2TX", NULL, "FU 36 Right"},
162
163 {"PDM_DIN", NULL, "DMIC Clock"},
164 {"FU 113 Left", NULL, "PDM_DIN"},
165 {"FU 113 Right", NULL, "PDM_DIN"},
166 {"DP1TX", NULL, "FU 113 Left"},
167 {"DP1TX", NULL, "FU 113 Right"},
168
169 {"FU 41 Left", NULL, "DP4RX"},
170 {"FU 41 Right", NULL, "DP4RX"},
171
172 {"IF DP3RXL", NULL, "DP3RX"},
173 {"IF DP3RXR", NULL, "DP3RX"},
174
175 {"Left Channel MUX", "Left", "IF DP3RXL"},
176 {"Left Channel MUX", "Right", "IF DP3RXR"},
177 {"Right Channel MUX", "Left", "IF DP3RXL"},
178 {"Right Channel MUX", "Right", "IF DP3RXR"},
179
180 {"FU 21 Left", NULL, "Left Channel MUX"},
181 {"FU 21 Right", NULL, "Right Channel MUX"},
182
183 {"SPK", NULL, "FU 21 Left"},
184 {"SPK", NULL, "FU 21 Right"},
185
186 {"HP", NULL, "FU 41 Left"},
187 {"HP", NULL, "FU 41 Right"},
188 };
189
es9356_set_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * hs_jack,void * data)190 static int es9356_set_jack_detect(struct snd_soc_component *component,
191 struct snd_soc_jack *hs_jack, void *data)
192 {
193 struct es9356_sdw_priv *es9356 = snd_soc_component_get_drvdata(component);
194 int ret;
195
196 es9356->hs_jack = hs_jack;
197
198 /* we can only resume if the device was initialized at least once */
199 if (!es9356->first_hw_init)
200 return 0;
201
202 ret = pm_runtime_resume_and_get(component->dev);
203 if (ret < 0) {
204 if (ret != -EACCES) {
205 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret);
206 return ret;
207 }
208 /* pm_runtime not enabled yet */
209 dev_info(component->dev, "%s: skipping jack init for now\n", __func__);
210 return 0;
211 }
212
213 if (es9356->hs_jack)
214 sdw_write_no_pm(es9356->slave, SDW_SCP_SDCA_INTMASK1,
215 (SDW_SCP_SDCA_INTMASK_SDCA_7 | SDW_SCP_SDCA_INTMASK_SDCA_5 | SDW_SCP_SDCA_INTMASK_SDCA_1));
216
217 pm_runtime_mark_last_busy(component->dev);
218 pm_runtime_put_autosuspend(component->dev);
219
220 return 0;
221 }
222 static const struct snd_soc_component_driver snd_soc_es9356_sdw_component = {
223 .probe = es9356_sdw_component_probe,
224 .controls = es9356_sdca_controls,
225 .num_controls = ARRAY_SIZE(es9356_sdca_controls),
226 .dapm_widgets = es9356_dapm_widgets,
227 .num_dapm_widgets = ARRAY_SIZE(es9356_dapm_widgets),
228 .dapm_routes = es9356_audio_map,
229 .num_dapm_routes = ARRAY_SIZE(es9356_audio_map),
230 .set_jack = es9356_set_jack_detect,
231 .endianness = 1,
232 };
233
es9356_sdw_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)234 static int es9356_sdw_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
235 int direction)
236 {
237 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
238
239 return 0;
240 }
241
es9356_sdw_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)242 static void es9356_sdw_shutdown(struct snd_pcm_substream *substream,
243 struct snd_soc_dai *dai)
244 {
245 snd_soc_dai_set_dma_data(dai, substream, NULL);
246 }
247
es9356_sdca_button(unsigned int * buffer)248 static int es9356_sdca_button(unsigned int *buffer)
249 {
250 int cur_button = -1;
251
252 if (*(buffer + 1) | *(buffer + 2))
253 return -EINVAL;
254 switch (*buffer) {
255 case 0x00:
256 cur_button = 0;
257 break;
258 case 0x20:
259 cur_button = SND_JACK_BTN_4;
260 break;
261 case 0x10:
262 cur_button = SND_JACK_BTN_2;
263 break;
264 case 0x08:
265 cur_button = SND_JACK_BTN_1;
266 break;
267 case 0x02:
268 cur_button = SND_JACK_BTN_3;
269 break;
270 case 0x01:
271 cur_button = SND_JACK_BTN_0;
272 break;
273 default:
274 break;
275 }
276
277 return cur_button;
278 }
279
es9356_sdca_button_detect(struct es9356_sdw_priv * es9356)280 static int es9356_sdca_button_detect(struct es9356_sdw_priv *es9356)
281 {
282 unsigned int btn_type = 0, offset, idx, val, owner;
283 unsigned int button[3];
284 int ret;
285
286 ret = regmap_read(es9356->regmap,
287 SDW_SDCA_CTL(FUNC_NUM_HID, ES9356_SDCA_ENT_HID01, ES9356_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), &owner);
288 if (ret < 0 || owner == 0x01)
289 return 0;
290
291 ret = regmap_read(es9356->regmap, ES9356_BUF_ADDR_HID, &offset);
292 if (ret < 0)
293 goto button_det_end;
294
295 for (idx = 0; idx < ARRAY_SIZE(button); idx++) {
296 ret = regmap_read(es9356->regmap, ES9356_BUF_ADDR_HID + offset + idx, &val);
297 if (ret < 0)
298 goto button_det_end;
299 button[idx] = val;
300 }
301
302 btn_type = es9356_sdca_button(&button[0]);
303
304 button_det_end:
305 if (owner == 0x00)
306 regmap_write(es9356->regmap,
307 SDW_SDCA_CTL(FUNC_NUM_HID, ES9356_SDCA_ENT_HID01, ES9356_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), 0x01);
308
309 return btn_type;
310 }
311
es9356_sdca_headset_detect(struct es9356_sdw_priv * es9356)312 static int es9356_sdca_headset_detect(struct es9356_sdw_priv *es9356)
313 {
314 unsigned int reg;
315 int ret;
316
317 ret = regmap_read(es9356->regmap,
318 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_GE35, ES9356_SDCA_CTL_DETECTED_MODE, 0), ®);
319
320 if (ret < 0)
321 goto io_error;
322
323 switch (reg) {
324 case 0x00:
325 es9356->jack_type = 0;
326 break;
327 case 0x03:
328 es9356->jack_type = SND_JACK_HEADPHONE;
329 break;
330 case 0x04:
331 es9356->jack_type = SND_JACK_HEADSET;
332 break;
333 default:
334 es9356->jack_type = 0;
335 return -1;
336 }
337
338 if (reg) {
339 regmap_write(es9356->regmap,
340 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_GE35, ES9356_SDCA_CTL_SELECTED_MODE, 0), reg);
341 regmap_write(es9356->regmap, ES9356_HP_DETECTTIME, 0x75);
342 } else {
343 regmap_write(es9356->regmap, ES9356_HP_DETECTTIME, 0xa4);
344 }
345
346 return 0;
347
348 io_error:
349 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
350 return ret;
351 }
352
es9356_interrupt_handler(struct work_struct * work)353 static void es9356_interrupt_handler(struct work_struct *work)
354 {
355 struct es9356_sdw_priv *es9356 =
356 container_of(work, struct es9356_sdw_priv, interrupt_handle_work.work);
357 int ret, btn_type = 0;
358
359 if (!es9356->hs_jack)
360 return;
361
362 if (!es9356->component->card || !es9356->component->card->instantiated)
363 return;
364
365 /* Handling different types of interrupts based on the mask bit */
366 if (es9356->sdca_status & SDW_SCP_SDCA_INT_SDCA_7) {
367 btn_type = es9356_sdca_button_detect(es9356);
368 if (btn_type < 0)
369 return;
370 } else {
371 ret = es9356_sdca_headset_detect(es9356);
372 if (ret < 0)
373 return;
374 }
375
376 if (es9356->jack_type != SND_JACK_HEADSET)
377 btn_type = 0;
378
379 snd_soc_jack_report(es9356->hs_jack, es9356->jack_type | btn_type,
380 SND_JACK_HEADSET |
381 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
382 SND_JACK_BTN_2 | SND_JACK_BTN_3 |
383 SND_JACK_BTN_4);
384
385 if (btn_type) {
386 snd_soc_jack_report(es9356->hs_jack, es9356->jack_type,
387 SND_JACK_HEADSET |
388 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
389 SND_JACK_BTN_2 | SND_JACK_BTN_3 |
390 SND_JACK_BTN_4);
391 mod_delayed_work(system_power_efficient_wq,
392 &es9356->button_detect_work, msecs_to_jiffies(280));
393 }
394 }
395
es9356_button_detect_handler(struct work_struct * work)396 static void es9356_button_detect_handler(struct work_struct *work)
397 {
398 struct es9356_sdw_priv *es9356 =
399 container_of(work, struct es9356_sdw_priv, button_detect_work.work);
400 int ret, idx, btn_type = 0;
401 unsigned int reg, offset;
402 unsigned int button[3];
403
404 /* Check headset */
405 ret = regmap_read(es9356->regmap,
406 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_GE35, ES9356_SDCA_CTL_DETECTED_MODE, 0), ®);
407
408 if (ret < 0)
409 goto io_error;
410
411 if (reg == 0x04) {
412 ret = regmap_read(es9356->regmap, ES9356_BUF_ADDR_HID, &offset);
413 if (ret < 0)
414 goto io_error;
415 for (idx = 0; idx < ARRAY_SIZE(button); idx++) {
416 ret = regmap_read(es9356->regmap, ES9356_BUF_ADDR_HID + offset + idx, ®);
417 if (ret < 0)
418 goto io_error;
419 button[idx] = reg;
420 }
421 btn_type = es9356_sdca_button(&button[0]);
422 if (btn_type < 0)
423 return;
424 }
425
426 snd_soc_jack_report(es9356->hs_jack, es9356->jack_type | btn_type,
427 SND_JACK_HEADSET |
428 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
429 SND_JACK_BTN_2 | SND_JACK_BTN_3 |
430 SND_JACK_BTN_4);
431
432 if (btn_type) {
433 snd_soc_jack_report(es9356->hs_jack, es9356->jack_type,
434 SND_JACK_HEADSET |
435 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
436 SND_JACK_BTN_2 | SND_JACK_BTN_3 |
437 SND_JACK_BTN_4);
438 mod_delayed_work(system_power_efficient_wq,
439 &es9356->button_detect_work, msecs_to_jiffies(280));
440 }
441
442 return;
443 io_error:
444 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
445 }
446
es9356_pde_transition_delay(struct es9356_sdw_priv * es9356,unsigned char func,unsigned char entity,unsigned char ps)447 static int es9356_pde_transition_delay(struct es9356_sdw_priv *es9356, unsigned char func,
448 unsigned char entity, unsigned char ps)
449 {
450 unsigned int retries = 10, val;
451
452 /* waiting for Actual PDE becomes to PS0/PS3 */
453 while (retries) {
454 regmap_read(es9356->regmap,
455 SDW_SDCA_CTL(func, entity, ES9356_SDCA_CTL_ACTUAL_POWER_STATE, 0), &val);
456 if (val == ps)
457 return 1;
458
459 usleep_range(1000, 1500);
460 retries--;
461 }
462 if (!retries) {
463 dev_dbg(&es9356->slave->dev, "%s PDE is NOT %s", __func__, ps?"PS3":"PS0");
464 }
465 return 0;
466 }
467
es9356_power_state(struct snd_soc_dai * dai,unsigned char ps,unsigned int * rate)468 static int es9356_power_state(struct snd_soc_dai *dai, unsigned char ps, unsigned int *rate)
469 {
470 struct snd_soc_component *component = dai->component;
471 struct es9356_sdw_priv *es9356 = snd_soc_component_get_drvdata(component);
472 unsigned char ps0 = 0x0, ps3 = 0x3;
473 unsigned char func, cs_entity, pde_entity;
474 int ret;
475
476 switch (dai->id) {
477 case ES9356_DMIC:
478 func = FUNC_NUM_MIC;
479 cs_entity = ES9356_SDCA_ENT_CS113;
480 pde_entity = ES9356_SDCA_ENT_PDE11;
481 break;
482 case ES9356_AMP:
483 func = FUNC_NUM_AMP;
484 cs_entity = ES9356_SDCA_ENT_CS21;
485 pde_entity = ES9356_SDCA_ENT_PDE23;
486 break;
487 case ES9356_JACK_IN:
488 func = FUNC_NUM_UAJ;
489 cs_entity = ES9356_SDCA_ENT_CS36;
490 pde_entity = ES9356_SDCA_ENT_PDE34;
491 break;
492 case ES9356_JACK_OUT:
493 func = FUNC_NUM_UAJ;
494 cs_entity = ES9356_SDCA_ENT_CS41;
495 pde_entity = ES9356_SDCA_ENT_PDE47;
496 break;
497 default:
498 return -EINVAL;
499 }
500
501 /* power state changes are not independent across functions */
502 scoped_guard(mutex, &es9356->pde_lock) {
503 ret = es9356_pde_transition_delay(es9356, func, pde_entity, ps ? ps0 : ps3);
504 if (ret) {
505 regmap_write(es9356->regmap,
506 SDW_SDCA_CTL(func, pde_entity,
507 ES9356_SDCA_CTL_REQ_POWER_STATE, 0),
508 ps ? ps3 : ps0);
509 es9356_pde_transition_delay(es9356, func, pde_entity, ps ? ps3 : ps0);
510 } else {
511 dev_dbg(component->dev, "%s PDE is already %d\n", __func__,
512 ps ? ps0 : ps3);
513 }
514 }
515
516 if (rate)
517 regmap_write(es9356->regmap,
518 SDW_SDCA_CTL(func, cs_entity, ES9356_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), *rate);
519
520 return 0;
521 }
522
es9356_sdw_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)523 static int es9356_sdw_pcm_hw_params(struct snd_pcm_substream *substream,
524 struct snd_pcm_hw_params *params,
525 struct snd_soc_dai *dai)
526 {
527 struct snd_soc_component *component = dai->component;
528 struct es9356_sdw_priv *es9356 = snd_soc_component_get_drvdata(component);
529 struct sdw_stream_config stream_config = {0};
530 struct sdw_port_config port_config = {0};
531 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
532 unsigned char ps0 = 0x0;
533 unsigned int rate;
534 int ret;
535
536 if (!sdw_stream)
537 return -EINVAL;
538
539 if (!es9356->slave)
540 return -EINVAL;
541
542 /* SoundWire specific configuration */
543 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
544
545 port_config.num = dai->id;
546
547 ret = sdw_stream_add_slave(es9356->slave, &stream_config,
548 &port_config, 1, sdw_stream);
549 if (ret) {
550 dev_err(dai->dev, "Unable to configure port\n");
551 return -EINVAL;
552 }
553
554 switch (params_rate(params)) {
555 case 16000:
556 rate = ES9356_SDCA_RATE_16000HZ;
557 break;
558 case 44100:
559 rate = ES9356_SDCA_RATE_44100HZ;
560 break;
561 case 48000:
562 rate = ES9356_SDCA_RATE_48000HZ;
563 break;
564 case 96000:
565 rate = ES9356_SDCA_RATE_96000HZ;
566 break;
567 default:
568 dev_err(component->dev, "%s: Rate %d is not supported\n",
569 __func__, params_rate(params));
570 return -EINVAL;
571 }
572
573 ret = es9356_power_state(dai, ps0, &rate);
574 if (ret) {
575 dev_err(component->dev, "%s: Invalid dai id: %d\n",
576 __func__, dai->id);
577 return -EINVAL;
578 }
579
580 return 0;
581 }
582
es9356_sdw_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)583 static int es9356_sdw_pcm_hw_free(struct snd_pcm_substream *substream,
584 struct snd_soc_dai *dai)
585 {
586 struct snd_soc_component *component = dai->component;
587 struct es9356_sdw_priv *es9356 = snd_soc_component_get_drvdata(component);
588 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
589 unsigned char ps3 = 0x3;
590 int ret;
591
592 if (!es9356->slave)
593 return -EINVAL;
594
595 sdw_stream_remove_slave(es9356->slave, sdw_stream);
596
597 ret = es9356_power_state(dai, ps3, NULL);
598 if (ret) {
599 dev_err(component->dev, "%s: Invalid dai id: %d\n",
600 __func__, dai->id);
601 return -EINVAL;
602 }
603
604 return 0;
605 }
606
607 static const struct snd_soc_dai_ops es9356_sdw_ops = {
608 .hw_params = es9356_sdw_pcm_hw_params,
609 .hw_free = es9356_sdw_pcm_hw_free,
610 .set_stream = es9356_sdw_set_sdw_stream,
611 .shutdown = es9356_sdw_shutdown,
612 };
613
614 static struct snd_soc_dai_driver es9356_sdw_dai[] = {
615 {
616 .name = "es9356-sdp-aif4",
617 .id = ES9356_DMIC,
618 .capture = {
619 .stream_name = "DP1 Capture",
620 .channels_min = 1,
621 .channels_max = 2,
622 },
623 .ops = &es9356_sdw_ops,
624 },
625 {
626 .name = "es9356-sdp-aif2",
627 .id = ES9356_JACK_IN,
628 .capture = {
629 .stream_name = "DP2 Capture",
630 .channels_min = 1,
631 .channels_max = 2,
632 },
633 .ops = &es9356_sdw_ops,
634 },
635 {
636 .name = "es9356-sdp-aif3",
637 .id = ES9356_AMP,
638 .playback = {
639 .stream_name = "DP3 Playback",
640 .channels_min = 1,
641 .channels_max = 2,
642 },
643 .ops = &es9356_sdw_ops,
644 },
645 {
646 .name = "es9356-sdp-aif1",
647 .id = ES9356_JACK_OUT,
648 .playback = {
649 .stream_name = "DP4 Playback",
650 .channels_min = 1,
651 .channels_max = 2,
652 },
653 .ops = &es9356_sdw_ops,
654 },
655 };
656
es9356_sdca_mbq_size(struct device * dev,unsigned int reg)657 static int es9356_sdca_mbq_size(struct device *dev, unsigned int reg)
658 {
659 switch (reg) {
660 case SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_VOLUME, CH_L):
661 case SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_VOLUME, CH_R):
662 case SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_VOLUME, CH_L):
663 case SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_VOLUME, CH_R):
664 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_VOLUME, CH_L):
665 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_VOLUME, CH_R):
666 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_VOLUME, CH_L):
667 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_VOLUME, CH_R):
668 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU33, ES9356_SDCA_CTL_FU_CH_GAIN, 0):
669 case SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU11, ES9356_SDCA_CTL_FU_CH_GAIN, 0):
670 return 2;
671 default:
672 return 1;
673 }
674 }
675
676 static const struct regmap_sdw_mbq_cfg es9356_mbq_config = {
677 .mbq_size = es9356_sdca_mbq_size,
678 };
679
es9356_sdca_volatile_register(struct device * dev,unsigned int reg)680 static bool es9356_sdca_volatile_register(struct device *dev, unsigned int reg)
681 {
682 switch (reg) {
683 case ES9356_BUF_ADDR_HID:
684 case ES9356_HID_BYTE2:
685 case ES9356_HID_BYTE3:
686 case ES9356_HID_BYTE4:
687 case SDW_SDCA_CTL(FUNC_NUM_HID, ES9356_SDCA_ENT_HID01, ES9356_SDCA_CTL_HIDTX_CURRENT_OWNER, 0):
688 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_GE35, ES9356_SDCA_CTL_DETECTED_MODE, 0):
689 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_GE35, ES9356_SDCA_CTL_SELECTED_MODE, 0):
690 case SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_PDE23, ES9356_SDCA_CTL_REQ_POWER_STATE, 0):
691 case SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_PDE23, ES9356_SDCA_CTL_ACTUAL_POWER_STATE, 0):
692 case SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_PDE11, ES9356_SDCA_CTL_REQ_POWER_STATE, 0):
693 case SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_PDE11, ES9356_SDCA_CTL_ACTUAL_POWER_STATE, 0):
694 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_PDE47, ES9356_SDCA_CTL_REQ_POWER_STATE, 0):
695 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_PDE47, ES9356_SDCA_CTL_ACTUAL_POWER_STATE, 0):
696 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_PDE34, ES9356_SDCA_CTL_REQ_POWER_STATE, 0):
697 case SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_PDE34, ES9356_SDCA_CTL_ACTUAL_POWER_STATE, 0):
698 case ES9356_FLAGS_HP:
699 return true;
700 default:
701 return false;
702 }
703 }
704
705 static const struct regmap_config es9356_sdca_regmap = {
706 .reg_bits = 32,
707 .val_bits = 16,
708 .volatile_reg = es9356_sdca_volatile_register,
709 .max_register = 0x45ffffff,
710 .cache_type = REGCACHE_MAPLE,
711 .use_single_read = true,
712 .use_single_write = true,
713 };
714
es9356_register_init(struct es9356_sdw_priv * es9356)715 static void es9356_register_init(struct es9356_sdw_priv *es9356)
716 {
717 regmap_write(es9356->regmap, ES9356_STATE, 0x02);
718 regmap_write(es9356->regmap, ES9356_ENDPOINT_MODE, 0x24);
719 regmap_write(es9356->regmap, ES9356_PRE_DIV_CTL, 0x00);
720 regmap_write(es9356->regmap, ES9356_ADC_OSR, 0x18);
721 regmap_write(es9356->regmap, ES9356_ADC_OSRGAIN, 0x13);
722 regmap_write(es9356->regmap, ES9356_DAC_OSR, 0x16);
723 regmap_write(es9356->regmap, ES9356_CLK_CTL, 0x0f);
724 regmap_write(es9356->regmap, ES9356_CSM_RESET, 0x01);
725 regmap_write(es9356->regmap, ES9356_CLK_SEL, 0x30);
726
727 regmap_write(es9356->regmap, ES9356_DETCLK_CTL, 0x51);
728 regmap_write(es9356->regmap, ES9356_HP_TYPE, 0x10);
729 regmap_write(es9356->regmap, ES9356_MICBIAS_CTL, 0x10);
730 regmap_write(es9356->regmap, ES9356_HPDETECT_CTL, 0x07);
731 regmap_write(es9356->regmap, ES9356_ADC_ANA, 0x30);
732 regmap_write(es9356->regmap, ES9356_PGA_CTL, 0xa8);
733 regmap_write(es9356->regmap, ES9356_ADC_INT, 0xaa);
734 regmap_write(es9356->regmap, ES9356_ADC_LP, 0x19);
735 regmap_write(es9356->regmap, ES9356_VMID1SEL, 0xbc);
736 regmap_write(es9356->regmap, ES9356_VMID_TIME, 0x0b);
737 regmap_write(es9356->regmap, ES9356_STATE_TIME, 0xbb);
738 regmap_write(es9356->regmap, ES9356_HP_SPK_TIME, 0x77);
739 regmap_write(es9356->regmap, ES9356_HP_DETECTTIME, 0xa4);
740 regmap_write(es9356->regmap, ES9356_MICBIAS_SEL, 0x15);
741 regmap_write(es9356->regmap, ES9356_KEY_PRESS_TIME, 0xff);
742 regmap_write(es9356->regmap, ES9356_KEY_RELEASE_TIME, 0xff);
743 regmap_write(es9356->regmap, ES9356_KEY_HOLD_TIME, 0x0f);
744 regmap_write(es9356->regmap, ES9356_BTSEL_REF, 0x00);
745 regmap_write(es9356->regmap, ES9356_KEYD_DETECT, 0x18);
746 regmap_write(es9356->regmap, ES9356_MICBIAS_RES, 0x03);
747 regmap_write(es9356->regmap, ES9356_BUTTON_CHARGE, 0x00);
748 regmap_write(es9356->regmap, ES9356_CALIBRATION_TIME, 0x13);
749 regmap_write(es9356->regmap, ES9356_CALIBRATION_SETTING, 0xf4);
750
751 regmap_write(es9356->regmap, ES9356_SPK_VOLUME, 0x33);
752 regmap_write(es9356->regmap, ES9356_DAC_VROI, 0x01);
753 regmap_write(es9356->regmap, ES9356_DAC_LP, 0x00);
754 regmap_write(es9356->regmap, ES9356_HP_IBIAS, 0x04);
755 regmap_write(es9356->regmap, ES9356_HP_LP, 0x03);
756 regmap_write(es9356->regmap, ES9356_SPKLDO_CTL, 0x65);
757 regmap_write(es9356->regmap, ES9356_SPKBIAS_COMP, 0x09);
758 regmap_write(es9356->regmap, ES9356_VMID1STL, 0x00);
759 regmap_write(es9356->regmap, ES9356_VMID2STL, 0x00);
760 regmap_write(es9356->regmap, ES9356_VSEL, 0xfc);
761
762 regmap_write(es9356->regmap, ES9356_IBIASGEN, 0x10);
763 regmap_write(es9356->regmap, ES9356_ADC_AMIC_CTL, 0x0d);
764 regmap_write(es9356->regmap, ES9356_STATE, 0x0e);
765 regmap_write(es9356->regmap, ES9356_CSM_RESET, 0x00);
766 regmap_write(es9356->regmap, ES9356_HP_TYPE, 0x08);
767
768 regmap_write(es9356->regmap,
769 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_VOLUME, CH_L), ES9356_DEFAULT_VOLUME);
770 regmap_write(es9356->regmap,
771 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_FU113, ES9356_SDCA_CTL_FU_VOLUME, CH_R), ES9356_DEFAULT_VOLUME);
772
773 regmap_write(es9356->regmap,
774 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_VOLUME, CH_L), ES9356_DEFAULT_VOLUME);
775 regmap_write(es9356->regmap,
776 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_FU21, ES9356_SDCA_CTL_FU_VOLUME, CH_R), ES9356_DEFAULT_VOLUME);
777
778 regmap_write(es9356->regmap,
779 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_VOLUME, CH_L), ES9356_DEFAULT_VOLUME);
780 regmap_write(es9356->regmap,
781 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU41, ES9356_SDCA_CTL_FU_VOLUME, CH_R), ES9356_DEFAULT_VOLUME);
782
783 regmap_write(es9356->regmap,
784 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_VOLUME, CH_L), ES9356_DEFAULT_VOLUME);
785 regmap_write(es9356->regmap,
786 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_FU36, ES9356_SDCA_CTL_FU_VOLUME, CH_R), ES9356_DEFAULT_VOLUME);
787 }
788
es9356_sdca_io_init(struct device * dev,struct sdw_slave * slave)789 static int es9356_sdca_io_init(struct device *dev, struct sdw_slave *slave)
790 {
791 struct es9356_sdw_priv *es9356 = dev_get_drvdata(&slave->dev);
792
793 if (es9356->hw_init)
794 return 0;
795
796 es9356->disable_irq = false;
797
798 regcache_cache_only(es9356->regmap, false);
799
800 if (es9356->first_hw_init) {
801 regcache_cache_bypass(es9356->regmap, true);
802 } else {
803 /* update count of parent 'active' children */
804 pm_runtime_set_active(&slave->dev);
805
806 es9356_register_init(es9356);
807 }
808 pm_runtime_get_noresume(&slave->dev);
809
810 regmap_write(es9356->regmap,
811 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT_XU12, ES9356_SDCA_CTL_SELECTED_MODE, 0), 0x01);
812 regmap_write(es9356->regmap,
813 SDW_SDCA_CTL(FUNC_NUM_MIC, ES9356_SDCA_ENT0, ES9356_SDCA_CTL_FUNC_STATUS, 0), 0x40);
814 regmap_write(es9356->regmap,
815 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT_XU22, ES9356_SDCA_CTL_SELECTED_MODE, 0), 0x01);
816 regmap_write(es9356->regmap,
817 SDW_SDCA_CTL(FUNC_NUM_AMP, ES9356_SDCA_ENT0, ES9356_SDCA_CTL_FUNC_STATUS, 0), 0x40);
818 regmap_write(es9356->regmap,
819 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_XU42, ES9356_SDCA_CTL_SELECTED_MODE, 0), 0x01);
820 regmap_write(es9356->regmap,
821 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT_XU36, ES9356_SDCA_CTL_SELECTED_MODE, 0), 0x01);
822 regmap_write(es9356->regmap,
823 SDW_SDCA_CTL(FUNC_NUM_UAJ, ES9356_SDCA_ENT0, ES9356_SDCA_CTL_FUNC_STATUS, 0), 0x40);
824
825 if (es9356->first_hw_init) {
826 regcache_cache_bypass(es9356->regmap, false);
827 regcache_mark_dirty(es9356->regmap);
828 } else
829 es9356->first_hw_init = true;
830
831 es9356->hw_init = true;
832
833 pm_runtime_mark_last_busy(&slave->dev);
834 pm_runtime_put_autosuspend(&slave->dev);
835
836 return 0;
837 }
838
es9356_sdw_update_status(struct sdw_slave * slave,enum sdw_slave_status status)839 static int es9356_sdw_update_status(struct sdw_slave *slave,
840 enum sdw_slave_status status)
841 {
842 struct es9356_sdw_priv *es9356 = dev_get_drvdata(&slave->dev);
843
844 if (status == SDW_SLAVE_UNATTACHED) {
845 es9356->hw_init = false;
846 cancel_delayed_work_sync(&es9356->interrupt_handle_work);
847 cancel_delayed_work_sync(&es9356->button_detect_work);
848 regcache_cache_only(es9356->regmap, true);
849 }
850
851 if (status == SDW_SLAVE_ATTACHED) {
852 if (es9356->hs_jack)
853 sdw_write_no_pm(es9356->slave, SDW_SCP_SDCA_INTMASK1,
854 (SDW_SCP_SDCA_INTMASK_SDCA_7 | SDW_SCP_SDCA_INTMASK_SDCA_5 | SDW_SCP_SDCA_INTMASK_SDCA_1));
855 }
856
857 if (es9356->hw_init || status != SDW_SLAVE_ATTACHED)
858 return 0;
859
860 return es9356_sdca_io_init(&slave->dev, slave);
861 }
862
es9356_sdw_read_prop(struct sdw_slave * slave)863 static int es9356_sdw_read_prop(struct sdw_slave *slave)
864 {
865 struct sdw_slave_prop *prop = &slave->prop;
866 int nval;
867 int i, j;
868 u32 bit;
869 unsigned long addr;
870 struct sdw_dpn_prop *dpn;
871
872 prop->paging_support = true;
873
874 /*
875 * first we need to allocate memory for set bits in port lists
876 * the port allocation is completely arbitrary:
877 * DP0 is not supported
878 * DP3 and DP4 is sink
879 * DP1 and DP2 is source
880 */
881 prop->source_ports = BIT(1) | BIT(2);
882 prop->sink_ports = BIT(3) | BIT(4);
883
884 nval = hweight32(prop->source_ports);
885 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
886 sizeof(*prop->src_dpn_prop),
887 GFP_KERNEL);
888 if (!prop->src_dpn_prop)
889 return -ENOMEM;
890
891 i = 0;
892 dpn = prop->src_dpn_prop;
893 addr = prop->source_ports;
894 for_each_set_bit(bit, &addr, 32) {
895 dpn[i].num = bit;
896 dpn[i].type = SDW_DPN_FULL;
897 dpn[i].simple_ch_prep_sm = true;
898 i++;
899 }
900
901 /* do this again for sink now */
902 nval = hweight32(prop->sink_ports);
903 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
904 sizeof(*prop->sink_dpn_prop),
905 GFP_KERNEL);
906 if (!prop->sink_dpn_prop)
907 return -ENOMEM;
908
909 j = 0;
910 dpn = prop->sink_dpn_prop;
911 addr = prop->sink_ports;
912 for_each_set_bit(bit, &addr, 32) {
913 dpn[j].num = bit;
914 dpn[j].type = SDW_DPN_FULL;
915 dpn[j].simple_ch_prep_sm = true;
916 j++;
917 }
918
919 /* wake-up event */
920 prop->wake_capable = 1;
921
922 return 0;
923 }
924
es9356_sdw_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)925 static int es9356_sdw_interrupt_callback(struct sdw_slave *slave,
926 struct sdw_slave_intr_status *status)
927 {
928 struct es9356_sdw_priv *es9356 = dev_get_drvdata(&slave->dev);
929 unsigned int sdca_cascade, scp_sdca_stat1 = 0;
930 int count = 0, retry = 3;
931 int ret, stat, reg;
932
933 mutex_lock(&es9356->disable_irq_lock);
934
935 ret = sdw_read_no_pm(es9356->slave, SDW_SCP_SDCA_INT1);
936 if (ret < 0)
937 goto io_error;
938 es9356->sdca_status = ret;
939
940 do {
941 reg = sdw_read_no_pm(es9356->slave, SDW_SCP_SDCA_INT1);
942 if (reg < 0)
943 goto io_error;
944 if (reg & SDW_SCP_SDCA_INTMASK_SDCA_1) {
945 ret = sdw_update_no_pm(es9356->slave, SDW_SCP_SDCA_INT1,
946 SDW_SCP_SDCA_INT_SDCA_1, SDW_SCP_SDCA_INT_SDCA_1);
947 if (ret < 0)
948 goto io_error;
949 }
950
951 if (reg & SDW_SCP_SDCA_INTMASK_SDCA_5) {
952 ret = sdw_update_no_pm(es9356->slave, SDW_SCP_SDCA_INT1,
953 SDW_SCP_SDCA_INT_SDCA_5, SDW_SCP_SDCA_INT_SDCA_5);
954 if (ret < 0)
955 goto io_error;
956 }
957
958 if (reg & SDW_SCP_SDCA_INTMASK_SDCA_7) {
959 ret = sdw_update_no_pm(es9356->slave, SDW_SCP_SDCA_INT1,
960 SDW_SCP_SDCA_INT_SDCA_7, SDW_SCP_SDCA_INT_SDCA_7);
961 if (ret < 0)
962 goto io_error;
963 }
964
965 ret = sdw_read_no_pm(es9356->slave, SDW_DP0_INT);
966 if (ret < 0)
967 goto io_error;
968 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
969
970 ret = sdw_read_no_pm(es9356->slave, SDW_SCP_SDCA_INT1);
971 if (ret < 0)
972 goto io_error;
973 scp_sdca_stat1 = ret &
974 (SDW_SCP_SDCA_INTMASK_SDCA_1 | SDW_SCP_SDCA_INTMASK_SDCA_5 | SDW_SCP_SDCA_INTMASK_SDCA_7);
975
976 stat = scp_sdca_stat1 || sdca_cascade;
977
978 count++;
979 } while (stat != 0 && count < retry);
980
981 /* The 280 ms figure was determined through testing */
982 if (status->sdca_cascade && !es9356->disable_irq)
983 mod_delayed_work(system_power_efficient_wq,
984 &es9356->interrupt_handle_work, msecs_to_jiffies(280));
985
986 mutex_unlock(&es9356->disable_irq_lock);
987 return 0;
988
989 io_error:
990 mutex_unlock(&es9356->disable_irq_lock);
991 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
992 return ret;
993 }
994
995 static const struct sdw_slave_ops es9356_sdw_slave_ops = {
996 .read_prop = es9356_sdw_read_prop,
997 .interrupt_callback = es9356_sdw_interrupt_callback,
998 .update_status = es9356_sdw_update_status,
999 };
1000
es9356_sdca_init(struct device * dev,struct regmap * regmap,struct sdw_slave * slave)1001 static int es9356_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave)
1002 {
1003 struct es9356_sdw_priv *es9356;
1004 int ret;
1005
1006 es9356 = devm_kzalloc(dev, sizeof(*es9356), GFP_KERNEL);
1007 if (!es9356)
1008 return -ENOMEM;
1009
1010 dev_set_drvdata(dev, es9356);
1011
1012 es9356->slave = slave;
1013 es9356->regmap = regmap;
1014 mutex_init(&es9356->disable_irq_lock);
1015 mutex_init(&es9356->pde_lock);
1016
1017 regcache_cache_only(es9356->regmap, true);
1018
1019 es9356->hw_init = false;
1020 es9356->first_hw_init = false;
1021
1022 INIT_DELAYED_WORK(&es9356->interrupt_handle_work,
1023 es9356_interrupt_handler);
1024 INIT_DELAYED_WORK(&es9356->button_detect_work,
1025 es9356_button_detect_handler);
1026
1027 ret = devm_snd_soc_register_component(dev,
1028 &snd_soc_es9356_sdw_component,
1029 es9356_sdw_dai,
1030 ARRAY_SIZE(es9356_sdw_dai));
1031 if (ret) {
1032 dev_err_probe(dev, ret, "Failed to register component\n");
1033 return ret;
1034 }
1035 /* set autosuspend parameters */
1036 pm_runtime_set_autosuspend_delay(dev, 3000);
1037 pm_runtime_use_autosuspend(dev);
1038 /* make sure the device does not suspend immediately */
1039 pm_runtime_mark_last_busy(dev);
1040 pm_runtime_enable(dev);
1041
1042 return 0;
1043 }
1044
es9356_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)1045 static int es9356_sdw_probe(struct sdw_slave *slave,
1046 const struct sdw_device_id *id)
1047 {
1048 struct regmap *regmap;
1049
1050 regmap = devm_regmap_init_sdw_mbq_cfg(&slave->dev, slave, &es9356_sdca_regmap, &es9356_mbq_config);
1051 if (IS_ERR(regmap))
1052 return PTR_ERR(regmap);
1053
1054 return es9356_sdca_init(&slave->dev, regmap, slave);
1055 }
1056
es9356_sdw_remove(struct sdw_slave * slave)1057 static void es9356_sdw_remove(struct sdw_slave *slave)
1058 {
1059 struct es9356_sdw_priv *es9356 = dev_get_drvdata(&slave->dev);
1060
1061 if (es9356->hw_init) {
1062 cancel_delayed_work_sync(&es9356->interrupt_handle_work);
1063 cancel_delayed_work_sync(&es9356->button_detect_work);
1064 }
1065
1066 if (es9356->first_hw_init)
1067 pm_runtime_disable(&slave->dev);
1068
1069 mutex_destroy(&es9356->disable_irq_lock);
1070 mutex_destroy(&es9356->pde_lock);
1071 }
1072
1073 static const struct sdw_device_id es9356_sdw_id[] = {
1074 SDW_SLAVE_ENTRY_EXT(0x04b3, 0x9356, 0x02, 0, 0),
1075 SDW_SLAVE_ENTRY_EXT(0x04b3, 0x9356, 0x03, 0, 0),
1076 {},
1077 };
1078 MODULE_DEVICE_TABLE(sdw, es9356_sdw_id);
1079
es9356_sdca_dev_suspend(struct device * dev)1080 static int es9356_sdca_dev_suspend(struct device *dev)
1081 {
1082 struct es9356_sdw_priv *es9356 = dev_get_drvdata(dev);
1083
1084 cancel_delayed_work_sync(&es9356->interrupt_handle_work);
1085 cancel_delayed_work_sync(&es9356->button_detect_work);
1086
1087 regcache_cache_only(es9356->regmap, true);
1088
1089 return 0;
1090 }
1091
es9356_sdca_dev_system_suspend(struct device * dev)1092 static int es9356_sdca_dev_system_suspend(struct device *dev)
1093 {
1094 struct es9356_sdw_priv *es9356 = dev_get_drvdata(dev);
1095
1096 scoped_guard(mutex, &es9356->disable_irq_lock)
1097 es9356->disable_irq = true;
1098
1099 return es9356_sdca_dev_suspend(dev);
1100 }
1101
1102 #define es9356_PROBE_TIMEOUT 2000
1103
es9356_sdca_dev_resume(struct device * dev)1104 static int es9356_sdca_dev_resume(struct device *dev)
1105 {
1106 struct sdw_slave *slave = dev_to_sdw_dev(dev);
1107 struct es9356_sdw_priv *es9356 = dev_get_drvdata(dev);
1108 int ret;
1109
1110 if (!slave->unattach_request)
1111 es9356->disable_irq = false;
1112
1113 ret = sdw_slave_wait_for_init(slave, es9356_PROBE_TIMEOUT);
1114 if (ret) {
1115 sdw_show_ping_status(slave->bus, true);
1116 return ret;
1117 }
1118
1119 regcache_cache_only(es9356->regmap, false);
1120 regcache_sync(es9356->regmap);
1121 return 0;
1122 }
1123
1124 static const struct dev_pm_ops es9356_sdca_pm = {
1125 SYSTEM_SLEEP_PM_OPS(es9356_sdca_dev_system_suspend, es9356_sdca_dev_resume)
1126 RUNTIME_PM_OPS(es9356_sdca_dev_suspend, es9356_sdca_dev_resume, NULL)
1127 };
1128
1129 static struct sdw_driver es9356_sdw_driver = {
1130 .driver = {
1131 .name = "es9356",
1132 .pm = pm_ptr(&es9356_sdca_pm),
1133 },
1134 .probe = es9356_sdw_probe,
1135 .remove = es9356_sdw_remove,
1136 .ops = &es9356_sdw_slave_ops,
1137 .id_table = es9356_sdw_id,
1138 };
1139 module_sdw_driver(es9356_sdw_driver);
1140
1141 MODULE_IMPORT_NS("SND_SOC_SDCA");
1142 MODULE_DESCRIPTION("ASoC ES9356 SDCA SDW codec driver");
1143 MODULE_AUTHOR("Michael Zhang <zhangyi@everest-semi.com>");
1144 MODULE_LICENSE("GPL");
1145