1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99) 4 * Copyright (c) by Matze Braun <MatzeBraun@gmx.de>. 5 * Takashi Iwai <tiwai@suse.de> 6 * 7 * Most of the driver code comes from Zach Brown(zab@redhat.com) 8 * Alan Cox OSS Driver 9 * Rewritted from card-es1938.c source. 10 * 11 * TODO: 12 * Perhaps Synth 13 * 14 * Notes from Zach Brown about the driver code 15 * 16 * Hardware Description 17 * 18 * A working Maestro setup contains the Maestro chip wired to a 19 * codec or 2. In the Maestro we have the APUs, the ASSP, and the 20 * Wavecache. The APUs can be though of as virtual audio routing 21 * channels. They can take data from a number of sources and perform 22 * basic encodings of the data. The wavecache is a storehouse for 23 * PCM data. Typically it deals with PCI and interracts with the 24 * APUs. The ASSP is a wacky DSP like device that ESS is loth 25 * to release docs on. Thankfully it isn't required on the Maestro 26 * until you start doing insane things like FM emulation and surround 27 * encoding. The codecs are almost always AC-97 compliant codecs, 28 * but it appears that early Maestros may have had PT101 (an ESS 29 * part?) wired to them. The only real difference in the Maestro 30 * families is external goop like docking capability, memory for 31 * the ASSP, and initialization differences. 32 * 33 * Driver Operation 34 * 35 * We only drive the APU/Wavecache as typical DACs and drive the 36 * mixers in the codecs. There are 64 APUs. We assign 6 to each 37 * /dev/dsp? device. 2 channels for output, and 4 channels for 38 * input. 39 * 40 * Each APU can do a number of things, but we only really use 41 * 3 basic functions. For playback we use them to convert PCM 42 * data fetched over PCI by the wavecahche into analog data that 43 * is handed to the codec. One APU for mono, and a pair for stereo. 44 * When in stereo, the combination of smarts in the APU and Wavecache 45 * decide which wavecache gets the left or right channel. 46 * 47 * For record we still use the old overly mono system. For each in 48 * coming channel the data comes in from the codec, through a 'input' 49 * APU, through another rate converter APU, and then into memory via 50 * the wavecache and PCI. If its stereo, we mash it back into LRLR in 51 * software. The pass between the 2 APUs is supposedly what requires us 52 * to have a 512 byte buffer sitting around in wavecache/memory. 53 * 54 * The wavecache makes our life even more fun. First off, it can 55 * only address the first 28 bits of PCI address space, making it 56 * useless on quite a few architectures. Secondly, its insane. 57 * It claims to fetch from 4 regions of PCI space, each 4 meg in length. 58 * But that doesn't really work. You can only use 1 region. So all our 59 * allocations have to be in 4meg of each other. Booo. Hiss. 60 * So we have a module parameter, dsps_order, that is the order of 61 * the number of dsps to provide. All their buffer space is allocated 62 * on open time. The sonicvibes OSS routines we inherited really want 63 * power of 2 buffers, so we have all those next to each other, then 64 * 512 byte regions for the recording wavecaches. This ends up 65 * wasting quite a bit of memory. The only fixes I can see would be 66 * getting a kernel allocator that could work in zones, or figuring out 67 * just how to coerce the WP into doing what we want. 68 * 69 * The indirection of the various registers means we have to spinlock 70 * nearly all register accesses. We have the main register indirection 71 * like the wave cache, maestro registers, etc. Then we have beasts 72 * like the APU interface that is indirect registers gotten at through 73 * the main maestro indirection. Ouch. We spinlock around the actual 74 * ports on a per card basis. This means spinlock activity at each IO 75 * operation, but the only IO operation clusters are in non critical 76 * paths and it makes the code far easier to follow. Interrupts are 77 * blocked while holding the locks because the int handler has to 78 * get at some of them :(. The mixer interface doesn't, however. 79 * We also have an OSS state lock that is thrown around in a few 80 * places. 81 */ 82 83 #include <linux/io.h> 84 #include <linux/delay.h> 85 #include <linux/interrupt.h> 86 #include <linux/init.h> 87 #include <linux/pci.h> 88 #include <linux/dma-mapping.h> 89 #include <linux/slab.h> 90 #include <linux/gameport.h> 91 #include <linux/module.h> 92 #include <linux/mutex.h> 93 #include <linux/input.h> 94 95 #include <sound/core.h> 96 #include <sound/pcm.h> 97 #include <sound/mpu401.h> 98 #include <sound/ac97_codec.h> 99 #include <sound/initval.h> 100 101 #ifdef CONFIG_SND_ES1968_RADIO 102 #include <media/drv-intf/tea575x.h> 103 #endif 104 105 #define CARD_NAME "ESS Maestro1/2" 106 #define DRIVER_NAME "ES1968" 107 108 MODULE_DESCRIPTION("ESS Maestro"); 109 MODULE_LICENSE("GPL"); 110 111 #if IS_REACHABLE(CONFIG_GAMEPORT) 112 #define SUPPORT_JOYSTICK 1 113 #endif 114 115 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 1-MAX */ 116 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 117 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 118 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 }; 119 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 }; 120 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 }; 121 static int clock[SNDRV_CARDS]; 122 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 123 static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 124 #ifdef SUPPORT_JOYSTICK 125 static bool joystick[SNDRV_CARDS]; 126 #endif 127 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1}; 128 129 module_param_array(index, int, NULL, 0444); 130 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); 131 module_param_array(id, charp, NULL, 0444); 132 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); 133 module_param_array(enable, bool, NULL, 0444); 134 MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard."); 135 module_param_array(total_bufsize, int, NULL, 0444); 136 MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB."); 137 module_param_array(pcm_substreams_p, int, NULL, 0444); 138 MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard."); 139 module_param_array(pcm_substreams_c, int, NULL, 0444); 140 MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard."); 141 module_param_array(clock, int, NULL, 0444); 142 MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)"); 143 module_param_array(use_pm, int, NULL, 0444); 144 MODULE_PARM_DESC(use_pm, "Toggle power-management. (0 = off, 1 = on, 2 = auto)"); 145 module_param_array(enable_mpu, int, NULL, 0444); 146 MODULE_PARM_DESC(enable_mpu, "Enable MPU401. (0 = off, 1 = on, 2 = auto)"); 147 #ifdef SUPPORT_JOYSTICK 148 module_param_array(joystick, bool, NULL, 0444); 149 MODULE_PARM_DESC(joystick, "Enable joystick."); 150 #endif 151 module_param_array(radio_nr, int, NULL, 0444); 152 MODULE_PARM_DESC(radio_nr, "Radio device numbers"); 153 154 155 156 #define NR_APUS 64 157 #define NR_APU_REGS 16 158 159 /* NEC Versas ? */ 160 #define NEC_VERSA_SUBID1 0x80581033 161 #define NEC_VERSA_SUBID2 0x803c1033 162 163 /* Mode Flags */ 164 #define ESS_FMT_STEREO 0x01 165 #define ESS_FMT_16BIT 0x02 166 167 #define DAC_RUNNING 1 168 #define ADC_RUNNING 2 169 170 /* Values for the ESM_LEGACY_AUDIO_CONTROL */ 171 172 #define ESS_DISABLE_AUDIO 0x8000 173 #define ESS_ENABLE_SERIAL_IRQ 0x4000 174 #define IO_ADRESS_ALIAS 0x0020 175 #define MPU401_IRQ_ENABLE 0x0010 176 #define MPU401_IO_ENABLE 0x0008 177 #define GAME_IO_ENABLE 0x0004 178 #define FM_IO_ENABLE 0x0002 179 #define SB_IO_ENABLE 0x0001 180 181 /* Values for the ESM_CONFIG_A */ 182 183 #define PIC_SNOOP1 0x4000 184 #define PIC_SNOOP2 0x2000 185 #define SAFEGUARD 0x0800 186 #define DMA_CLEAR 0x0700 187 #define DMA_DDMA 0x0000 188 #define DMA_TDMA 0x0100 189 #define DMA_PCPCI 0x0200 190 #define POST_WRITE 0x0080 191 #define PCI_TIMING 0x0040 192 #define SWAP_LR 0x0020 193 #define SUBTR_DECODE 0x0002 194 195 /* Values for the ESM_CONFIG_B */ 196 197 #define SPDIF_CONFB 0x0100 198 #define HWV_CONFB 0x0080 199 #define DEBOUNCE 0x0040 200 #define GPIO_CONFB 0x0020 201 #define CHI_CONFB 0x0010 202 #define IDMA_CONFB 0x0008 /*undoc */ 203 #define MIDI_FIX 0x0004 /*undoc */ 204 #define IRQ_TO_ISA 0x0001 /*undoc */ 205 206 /* Values for Ring Bus Control B */ 207 #define RINGB_2CODEC_ID_MASK 0x0003 208 #define RINGB_DIS_VALIDATION 0x0008 209 #define RINGB_EN_SPDIF 0x0010 210 #define RINGB_EN_2CODEC 0x0020 211 #define RINGB_SING_BIT_DUAL 0x0040 212 213 /* ****Port Addresses**** */ 214 215 /* Write & Read */ 216 #define ESM_INDEX 0x02 217 #define ESM_DATA 0x00 218 219 /* AC97 + RingBus */ 220 #define ESM_AC97_INDEX 0x30 221 #define ESM_AC97_DATA 0x32 222 #define ESM_RING_BUS_DEST 0x34 223 #define ESM_RING_BUS_CONTR_A 0x36 224 #define ESM_RING_BUS_CONTR_B 0x38 225 #define ESM_RING_BUS_SDO 0x3A 226 227 /* WaveCache*/ 228 #define WC_INDEX 0x10 229 #define WC_DATA 0x12 230 #define WC_CONTROL 0x14 231 232 /* ASSP*/ 233 #define ASSP_INDEX 0x80 234 #define ASSP_MEMORY 0x82 235 #define ASSP_DATA 0x84 236 #define ASSP_CONTROL_A 0xA2 237 #define ASSP_CONTROL_B 0xA4 238 #define ASSP_CONTROL_C 0xA6 239 #define ASSP_HOSTW_INDEX 0xA8 240 #define ASSP_HOSTW_DATA 0xAA 241 #define ASSP_HOSTW_IRQ 0xAC 242 /* Midi */ 243 #define ESM_MPU401_PORT 0x98 244 /* Others */ 245 #define ESM_PORT_HOST_IRQ 0x18 246 247 #define IDR0_DATA_PORT 0x00 248 #define IDR1_CRAM_POINTER 0x01 249 #define IDR2_CRAM_DATA 0x02 250 #define IDR3_WAVE_DATA 0x03 251 #define IDR4_WAVE_PTR_LOW 0x04 252 #define IDR5_WAVE_PTR_HI 0x05 253 #define IDR6_TIMER_CTRL 0x06 254 #define IDR7_WAVE_ROMRAM 0x07 255 256 #define WRITEABLE_MAP 0xEFFFFF 257 #define READABLE_MAP 0x64003F 258 259 /* PCI Register */ 260 261 #define ESM_LEGACY_AUDIO_CONTROL 0x40 262 #define ESM_ACPI_COMMAND 0x54 263 #define ESM_CONFIG_A 0x50 264 #define ESM_CONFIG_B 0x52 265 #define ESM_DDMA 0x60 266 267 /* Bob Bits */ 268 #define ESM_BOB_ENABLE 0x0001 269 #define ESM_BOB_START 0x0001 270 271 /* Host IRQ Control Bits */ 272 #define ESM_RESET_MAESTRO 0x8000 273 #define ESM_RESET_DIRECTSOUND 0x4000 274 #define ESM_HIRQ_ClkRun 0x0100 275 #define ESM_HIRQ_HW_VOLUME 0x0040 276 #define ESM_HIRQ_HARPO 0x0030 /* What's that? */ 277 #define ESM_HIRQ_ASSP 0x0010 278 #define ESM_HIRQ_DSIE 0x0004 279 #define ESM_HIRQ_MPU401 0x0002 280 #define ESM_HIRQ_SB 0x0001 281 282 /* Host IRQ Status Bits */ 283 #define ESM_MPU401_IRQ 0x02 284 #define ESM_SB_IRQ 0x01 285 #define ESM_SOUND_IRQ 0x04 286 #define ESM_ASSP_IRQ 0x10 287 #define ESM_HWVOL_IRQ 0x40 288 289 #define ESS_SYSCLK 50000000 290 #define ESM_BOB_FREQ 200 291 #define ESM_BOB_FREQ_MAX 800 292 293 #define ESM_FREQ_ESM1 (49152000L / 1024L) /* default rate 48000 */ 294 #define ESM_FREQ_ESM2 (50000000L / 1024L) 295 296 /* APU Modes: reg 0x00, bit 4-7 */ 297 #define ESM_APU_MODE_SHIFT 4 298 #define ESM_APU_MODE_MASK (0xf << 4) 299 #define ESM_APU_OFF 0x00 300 #define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */ 301 #define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */ 302 #define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */ 303 #define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */ 304 #define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */ 305 #define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */ 306 #define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */ 307 #define ESM_APU_CORRELATOR 0x08 /* Correlator */ 308 #define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */ 309 #define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */ 310 #define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */ 311 #define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */ 312 #define ESM_APU_RESERVED1 0x0D /* Reserved 1 */ 313 #define ESM_APU_RESERVED2 0x0E /* Reserved 2 */ 314 #define ESM_APU_RESERVED3 0x0F /* Reserved 3 */ 315 316 /* reg 0x00 */ 317 #define ESM_APU_FILTER_Q_SHIFT 0 318 #define ESM_APU_FILTER_Q_MASK (3 << 0) 319 /* APU Filtey Q Control */ 320 #define ESM_APU_FILTER_LESSQ 0x00 321 #define ESM_APU_FILTER_MOREQ 0x03 322 323 #define ESM_APU_FILTER_TYPE_SHIFT 2 324 #define ESM_APU_FILTER_TYPE_MASK (3 << 2) 325 #define ESM_APU_ENV_TYPE_SHIFT 8 326 #define ESM_APU_ENV_TYPE_MASK (3 << 8) 327 #define ESM_APU_ENV_STATE_SHIFT 10 328 #define ESM_APU_ENV_STATE_MASK (3 << 10) 329 #define ESM_APU_END_CURVE (1 << 12) 330 #define ESM_APU_INT_ON_LOOP (1 << 13) 331 #define ESM_APU_DMA_ENABLE (1 << 14) 332 333 /* reg 0x02 */ 334 #define ESM_APU_SUBMIX_GROUP_SHIRT 0 335 #define ESM_APU_SUBMIX_GROUP_MASK (7 << 0) 336 #define ESM_APU_SUBMIX_MODE (1 << 3) 337 #define ESM_APU_6dB (1 << 4) 338 #define ESM_APU_DUAL_EFFECT (1 << 5) 339 #define ESM_APU_EFFECT_CHANNELS_SHIFT 6 340 #define ESM_APU_EFFECT_CHANNELS_MASK (3 << 6) 341 342 /* reg 0x03 */ 343 #define ESM_APU_STEP_SIZE_MASK 0x0fff 344 345 /* reg 0x04 */ 346 #define ESM_APU_PHASE_SHIFT 0 347 #define ESM_APU_PHASE_MASK (0xff << 0) 348 #define ESM_APU_WAVE64K_PAGE_SHIFT 8 /* most 8bit of wave start offset */ 349 #define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8) 350 351 /* reg 0x05 - wave start offset */ 352 /* reg 0x06 - wave end offset */ 353 /* reg 0x07 - wave loop length */ 354 355 /* reg 0x08 */ 356 #define ESM_APU_EFFECT_GAIN_SHIFT 0 357 #define ESM_APU_EFFECT_GAIN_MASK (0xff << 0) 358 #define ESM_APU_TREMOLO_DEPTH_SHIFT 8 359 #define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8) 360 #define ESM_APU_TREMOLO_RATE_SHIFT 12 361 #define ESM_APU_TREMOLO_RATE_MASK (0xf << 12) 362 363 /* reg 0x09 */ 364 /* bit 0-7 amplitude dest? */ 365 #define ESM_APU_AMPLITUDE_NOW_SHIFT 8 366 #define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8) 367 368 /* reg 0x0a */ 369 #define ESM_APU_POLAR_PAN_SHIFT 0 370 #define ESM_APU_POLAR_PAN_MASK (0x3f << 0) 371 /* Polar Pan Control */ 372 #define ESM_APU_PAN_CENTER_CIRCLE 0x00 373 #define ESM_APU_PAN_MIDDLE_RADIUS 0x01 374 #define ESM_APU_PAN_OUTSIDE_RADIUS 0x02 375 376 #define ESM_APU_FILTER_TUNING_SHIFT 8 377 #define ESM_APU_FILTER_TUNING_MASK (0xff << 8) 378 379 /* reg 0x0b */ 380 #define ESM_APU_DATA_SRC_A_SHIFT 0 381 #define ESM_APU_DATA_SRC_A_MASK (0x7f << 0) 382 #define ESM_APU_INV_POL_A (1 << 7) 383 #define ESM_APU_DATA_SRC_B_SHIFT 8 384 #define ESM_APU_DATA_SRC_B_MASK (0x7f << 8) 385 #define ESM_APU_INV_POL_B (1 << 15) 386 387 #define ESM_APU_VIBRATO_RATE_SHIFT 0 388 #define ESM_APU_VIBRATO_RATE_MASK (0xf << 0) 389 #define ESM_APU_VIBRATO_DEPTH_SHIFT 4 390 #define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4) 391 #define ESM_APU_VIBRATO_PHASE_SHIFT 8 392 #define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8) 393 394 /* reg 0x0c */ 395 #define ESM_APU_RADIUS_SELECT (1 << 6) 396 397 /* APU Filter Control */ 398 #define ESM_APU_FILTER_2POLE_LOPASS 0x00 399 #define ESM_APU_FILTER_2POLE_BANDPASS 0x01 400 #define ESM_APU_FILTER_2POLE_HIPASS 0x02 401 #define ESM_APU_FILTER_1POLE_LOPASS 0x03 402 #define ESM_APU_FILTER_1POLE_HIPASS 0x04 403 #define ESM_APU_FILTER_OFF 0x05 404 405 /* APU ATFP Type */ 406 #define ESM_APU_ATFP_AMPLITUDE 0x00 407 #define ESM_APU_ATFP_TREMELO 0x01 408 #define ESM_APU_ATFP_FILTER 0x02 409 #define ESM_APU_ATFP_PAN 0x03 410 411 /* APU ATFP Flags */ 412 #define ESM_APU_ATFP_FLG_OFF 0x00 413 #define ESM_APU_ATFP_FLG_WAIT 0x01 414 #define ESM_APU_ATFP_FLG_DONE 0x02 415 #define ESM_APU_ATFP_FLG_INPROCESS 0x03 416 417 418 /* capture mixing buffer size */ 419 #define ESM_MEM_ALIGN 0x1000 420 #define ESM_MIXBUF_SIZE 0x400 421 422 #define ESM_MODE_PLAY 0 423 #define ESM_MODE_CAPTURE 1 424 425 426 /* APU use in the driver */ 427 enum snd_enum_apu_type { 428 ESM_APU_PCM_PLAY, 429 ESM_APU_PCM_CAPTURE, 430 ESM_APU_PCM_RATECONV, 431 ESM_APU_FREE 432 }; 433 434 /* chip type */ 435 enum { 436 TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E 437 }; 438 439 /* DMA Hack! */ 440 struct esm_memory { 441 struct snd_dma_buffer buf; 442 int empty; /* status */ 443 struct list_head list; 444 }; 445 446 /* Playback Channel */ 447 struct esschan { 448 int running; 449 450 u8 apu[4]; 451 u8 apu_mode[4]; 452 453 /* playback/capture pcm buffer */ 454 struct esm_memory *memory; 455 /* capture mixer buffer */ 456 struct esm_memory *mixbuf; 457 458 unsigned int hwptr; /* current hw pointer in bytes */ 459 unsigned int count; /* sample counter in bytes */ 460 unsigned int dma_size; /* total buffer size in bytes */ 461 unsigned int frag_size; /* period size in bytes */ 462 unsigned int wav_shift; 463 u16 base[4]; /* offset for ptr */ 464 465 /* stereo/16bit flag */ 466 unsigned char fmt; 467 int mode; /* playback / capture */ 468 469 int bob_freq; /* required timer frequency */ 470 471 struct snd_pcm_substream *substream; 472 473 /* linked list */ 474 struct list_head list; 475 476 u16 wc_map[4]; 477 }; 478 479 struct es1968 { 480 /* Module Config */ 481 int total_bufsize; /* in bytes */ 482 483 int playback_streams, capture_streams; 484 485 unsigned int clock; /* clock */ 486 /* for clock measurement */ 487 unsigned int in_measurement: 1; 488 unsigned int measure_apu; 489 unsigned int measure_lastpos; 490 unsigned int measure_count; 491 492 /* buffer */ 493 struct snd_dma_buffer dma; 494 495 /* Resources... */ 496 int irq; 497 unsigned long io_port; 498 int type; 499 struct pci_dev *pci; 500 struct snd_card *card; 501 struct snd_pcm *pcm; 502 int do_pm; /* power-management enabled */ 503 504 /* DMA memory block */ 505 struct list_head buf_list; 506 507 /* ALSA Stuff */ 508 struct snd_ac97 *ac97; 509 struct snd_rawmidi *rmidi; 510 511 spinlock_t reg_lock; 512 unsigned int in_suspend; 513 514 /* Maestro Stuff */ 515 u16 maestro_map[32]; 516 int bobclient; /* active timer instancs */ 517 int bob_freq; /* timer frequency */ 518 struct mutex memory_mutex; /* memory lock */ 519 520 /* APU states */ 521 unsigned char apu[NR_APUS]; 522 523 /* active substreams */ 524 struct list_head substream_list; 525 spinlock_t substream_lock; 526 527 u16 apu_map[NR_APUS][NR_APU_REGS]; 528 529 #ifdef SUPPORT_JOYSTICK 530 struct gameport *gameport; 531 #endif 532 533 #ifdef CONFIG_SND_ES1968_INPUT 534 struct input_dev *input_dev; 535 char phys[64]; /* physical device path */ 536 #else 537 struct snd_kcontrol *master_switch; /* for h/w volume control */ 538 struct snd_kcontrol *master_volume; 539 #endif 540 struct work_struct hwvol_work; 541 542 #ifdef CONFIG_SND_ES1968_RADIO 543 struct v4l2_device v4l2_dev; 544 struct snd_tea575x tea; 545 unsigned int tea575x_tuner; 546 #endif 547 }; 548 549 static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id); 550 551 static const struct pci_device_id snd_es1968_ids[] = { 552 { 553 /* Maestro 1 */ 554 PCI_DEVICE(0x1285, 0x0100), 555 .class = PCI_CLASS_MULTIMEDIA_AUDIO << 8, 556 .class_mask = 0xffff00, 557 .driver_data = TYPE_MAESTRO, 558 }, { 559 /* Maestro 2 */ 560 PCI_DEVICE(0x125d, 0x1968), 561 .class = PCI_CLASS_MULTIMEDIA_AUDIO << 8, 562 .class_mask = 0xffff00, 563 .driver_data = TYPE_MAESTRO2, 564 }, { 565 /* Maestro 2E */ 566 PCI_DEVICE(0x125d, 0x1978), 567 .class = PCI_CLASS_MULTIMEDIA_AUDIO << 8, 568 .class_mask = 0xffff00, 569 .driver_data = TYPE_MAESTRO2E, 570 }, 571 { } 572 }; 573 574 MODULE_DEVICE_TABLE(pci, snd_es1968_ids); 575 576 /* ********************* 577 * Low Level Funcs! * 578 *********************/ 579 580 /* no spinlock */ 581 static void __maestro_write(struct es1968 *chip, u16 reg, u16 data) 582 { 583 outw(reg, chip->io_port + ESM_INDEX); 584 outw(data, chip->io_port + ESM_DATA); 585 chip->maestro_map[reg] = data; 586 } 587 588 static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data) 589 { 590 guard(spinlock_irqsave)(&chip->reg_lock); 591 __maestro_write(chip, reg, data); 592 } 593 594 /* no spinlock */ 595 static u16 __maestro_read(struct es1968 *chip, u16 reg) 596 { 597 if (READABLE_MAP & (1 << reg)) { 598 outw(reg, chip->io_port + ESM_INDEX); 599 chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA); 600 } 601 return chip->maestro_map[reg]; 602 } 603 604 static inline u16 maestro_read(struct es1968 *chip, u16 reg) 605 { 606 guard(spinlock_irqsave)(&chip->reg_lock); 607 return __maestro_read(chip, reg); 608 } 609 610 /* Wait for the codec bus to be free */ 611 static int snd_es1968_ac97_wait(struct es1968 *chip) 612 { 613 int timeout = 100000; 614 615 while (timeout-- > 0) { 616 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1)) 617 return 0; 618 cond_resched(); 619 } 620 dev_dbg(chip->card->dev, "ac97 timeout\n"); 621 return 1; /* timeout */ 622 } 623 624 static int snd_es1968_ac97_wait_poll(struct es1968 *chip) 625 { 626 int timeout = 100000; 627 628 while (timeout-- > 0) { 629 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1)) 630 return 0; 631 } 632 dev_dbg(chip->card->dev, "ac97 timeout\n"); 633 return 1; /* timeout */ 634 } 635 636 static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 637 { 638 struct es1968 *chip = ac97->private_data; 639 640 snd_es1968_ac97_wait(chip); 641 642 /* Write the bus */ 643 outw(val, chip->io_port + ESM_AC97_DATA); 644 /*msleep(1);*/ 645 outb(reg, chip->io_port + ESM_AC97_INDEX); 646 /*msleep(1);*/ 647 } 648 649 static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 650 { 651 u16 data = 0; 652 struct es1968 *chip = ac97->private_data; 653 654 snd_es1968_ac97_wait(chip); 655 656 outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX); 657 /*msleep(1);*/ 658 659 if (!snd_es1968_ac97_wait_poll(chip)) { 660 data = inw(chip->io_port + ESM_AC97_DATA); 661 /*msleep(1);*/ 662 } 663 664 return data; 665 } 666 667 /* no spinlock */ 668 static void apu_index_set(struct es1968 *chip, u16 index) 669 { 670 int i; 671 __maestro_write(chip, IDR1_CRAM_POINTER, index); 672 for (i = 0; i < 1000; i++) 673 if (__maestro_read(chip, IDR1_CRAM_POINTER) == index) 674 return; 675 dev_dbg(chip->card->dev, "APU register select failed. (Timeout)\n"); 676 } 677 678 /* no spinlock */ 679 static void apu_data_set(struct es1968 *chip, u16 data) 680 { 681 int i; 682 for (i = 0; i < 1000; i++) { 683 if (__maestro_read(chip, IDR0_DATA_PORT) == data) 684 return; 685 __maestro_write(chip, IDR0_DATA_PORT, data); 686 } 687 dev_dbg(chip->card->dev, "APU register set probably failed (Timeout)!\n"); 688 } 689 690 /* no spinlock */ 691 static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data) 692 { 693 if (snd_BUG_ON(channel >= NR_APUS)) 694 return; 695 chip->apu_map[channel][reg] = data; 696 reg |= (channel << 4); 697 apu_index_set(chip, reg); 698 apu_data_set(chip, data); 699 } 700 701 static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data) 702 { 703 guard(spinlock_irqsave)(&chip->reg_lock); 704 __apu_set_register(chip, channel, reg, data); 705 } 706 707 static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg) 708 { 709 if (snd_BUG_ON(channel >= NR_APUS)) 710 return 0; 711 reg |= (channel << 4); 712 apu_index_set(chip, reg); 713 return __maestro_read(chip, IDR0_DATA_PORT); 714 } 715 716 static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg) 717 { 718 guard(spinlock_irqsave)(&chip->reg_lock); 719 return __apu_get_register(chip, channel, reg); 720 } 721 722 #if 0 /* ASSP is not supported */ 723 724 static void assp_set_register(struct es1968 *chip, u32 reg, u32 value) 725 { 726 guard(spinlock_irqsave),(&chip->reg_lock); 727 outl(reg, chip->io_port + ASSP_INDEX); 728 outl(value, chip->io_port + ASSP_DATA); 729 } 730 731 static u32 assp_get_register(struct es1968 *chip, u32 reg) 732 { 733 guard(spinlock_irqsave)(&chip->reg_lock); 734 outl(reg, chip->io_port + ASSP_INDEX); 735 return inl(chip->io_port + ASSP_DATA); 736 } 737 738 #endif 739 740 static void wave_set_register(struct es1968 *chip, u16 reg, u16 value) 741 { 742 guard(spinlock_irqsave)(&chip->reg_lock); 743 outw(reg, chip->io_port + WC_INDEX); 744 outw(value, chip->io_port + WC_DATA); 745 } 746 747 static u16 wave_get_register(struct es1968 *chip, u16 reg) 748 { 749 guard(spinlock_irqsave)(&chip->reg_lock); 750 outw(reg, chip->io_port + WC_INDEX); 751 return inw(chip->io_port + WC_DATA); 752 } 753 754 /* ******************* 755 * Bob the Timer! * 756 *******************/ 757 758 static void snd_es1968_bob_stop(struct es1968 *chip) 759 { 760 u16 reg; 761 762 reg = __maestro_read(chip, 0x11); 763 reg &= ~ESM_BOB_ENABLE; 764 __maestro_write(chip, 0x11, reg); 765 reg = __maestro_read(chip, 0x17); 766 reg &= ~ESM_BOB_START; 767 __maestro_write(chip, 0x17, reg); 768 } 769 770 static void snd_es1968_bob_start(struct es1968 *chip) 771 { 772 int prescale; 773 int divide; 774 775 /* compute ideal interrupt frequency for buffer size & play rate */ 776 /* first, find best prescaler value to match freq */ 777 for (prescale = 5; prescale < 12; prescale++) 778 if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9))) 779 break; 780 781 /* next, back off prescaler whilst getting divider into optimum range */ 782 divide = 1; 783 while ((prescale > 5) && (divide < 32)) { 784 prescale--; 785 divide <<= 1; 786 } 787 divide >>= 1; 788 789 /* now fine-tune the divider for best match */ 790 for (; divide < 31; divide++) 791 if (chip->bob_freq > 792 ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break; 793 794 /* divide = 0 is illegal, but don't let prescale = 4! */ 795 if (divide == 0) { 796 divide++; 797 if (prescale > 5) 798 prescale--; 799 } else if (divide > 1) 800 divide--; 801 802 __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide); /* set reg */ 803 804 /* Now set IDR 11/17 */ 805 __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1); 806 __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1); 807 } 808 809 /* call with substream spinlock */ 810 static void snd_es1968_bob_inc(struct es1968 *chip, int freq) 811 { 812 chip->bobclient++; 813 if (chip->bobclient == 1) { 814 chip->bob_freq = freq; 815 snd_es1968_bob_start(chip); 816 } else if (chip->bob_freq < freq) { 817 snd_es1968_bob_stop(chip); 818 chip->bob_freq = freq; 819 snd_es1968_bob_start(chip); 820 } 821 } 822 823 /* call with substream spinlock */ 824 static void snd_es1968_bob_dec(struct es1968 *chip) 825 { 826 chip->bobclient--; 827 if (chip->bobclient <= 0) 828 snd_es1968_bob_stop(chip); 829 else if (chip->bob_freq > ESM_BOB_FREQ) { 830 /* check reduction of timer frequency */ 831 int max_freq = ESM_BOB_FREQ; 832 struct esschan *es; 833 list_for_each_entry(es, &chip->substream_list, list) { 834 if (max_freq < es->bob_freq) 835 max_freq = es->bob_freq; 836 } 837 if (max_freq != chip->bob_freq) { 838 snd_es1968_bob_stop(chip); 839 chip->bob_freq = max_freq; 840 snd_es1968_bob_start(chip); 841 } 842 } 843 } 844 845 static int 846 snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es, 847 struct snd_pcm_runtime *runtime) 848 { 849 /* we acquire 4 interrupts per period for precise control.. */ 850 int freq = runtime->rate * 4; 851 if (es->fmt & ESS_FMT_STEREO) 852 freq <<= 1; 853 if (es->fmt & ESS_FMT_16BIT) 854 freq <<= 1; 855 freq /= es->frag_size; 856 if (freq < ESM_BOB_FREQ) 857 freq = ESM_BOB_FREQ; 858 else if (freq > ESM_BOB_FREQ_MAX) 859 freq = ESM_BOB_FREQ_MAX; 860 return freq; 861 } 862 863 864 /************* 865 * PCM Part * 866 *************/ 867 868 static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq) 869 { 870 u32 rate = (freq << 16) / chip->clock; 871 #if 0 /* XXX: do we need this? */ 872 if (rate > 0x10000) 873 rate = 0x10000; 874 #endif 875 return rate; 876 } 877 878 /* get current pointer */ 879 static inline unsigned int 880 snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es) 881 { 882 unsigned int offset; 883 884 offset = apu_get_register(chip, es->apu[0], 5); 885 886 offset -= es->base[0]; 887 888 return (offset & 0xFFFE); /* hardware is in words */ 889 } 890 891 static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq) 892 { 893 apu_set_register(chip, apu, 2, 894 (apu_get_register(chip, apu, 2) & 0x00FF) | 895 ((freq & 0xff) << 8) | 0x10); 896 apu_set_register(chip, apu, 3, freq >> 8); 897 } 898 899 /* spin lock held */ 900 static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode) 901 { 902 /* set the APU mode */ 903 __apu_set_register(esm, apu, 0, 904 (__apu_get_register(esm, apu, 0) & 0xff0f) | 905 (mode << 4)); 906 } 907 908 static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es) 909 { 910 guard(spinlock)(&chip->reg_lock); 911 __apu_set_register(chip, es->apu[0], 5, es->base[0]); 912 snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]); 913 if (es->mode == ESM_MODE_CAPTURE) { 914 __apu_set_register(chip, es->apu[2], 5, es->base[2]); 915 snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]); 916 } 917 if (es->fmt & ESS_FMT_STEREO) { 918 __apu_set_register(chip, es->apu[1], 5, es->base[1]); 919 snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]); 920 if (es->mode == ESM_MODE_CAPTURE) { 921 __apu_set_register(chip, es->apu[3], 5, es->base[3]); 922 snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]); 923 } 924 } 925 } 926 927 static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es) 928 { 929 guard(spinlock)(&chip->reg_lock); 930 snd_es1968_trigger_apu(chip, es->apu[0], 0); 931 snd_es1968_trigger_apu(chip, es->apu[1], 0); 932 if (es->mode == ESM_MODE_CAPTURE) { 933 snd_es1968_trigger_apu(chip, es->apu[2], 0); 934 snd_es1968_trigger_apu(chip, es->apu[3], 0); 935 } 936 } 937 938 /* set the wavecache control reg */ 939 static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es, 940 int channel, u32 addr, int capture) 941 { 942 u32 tmpval = (addr - 0x10) & 0xFFF8; 943 944 if (! capture) { 945 if (!(es->fmt & ESS_FMT_16BIT)) 946 tmpval |= 4; /* 8bit */ 947 if (es->fmt & ESS_FMT_STEREO) 948 tmpval |= 2; /* stereo */ 949 } 950 951 /* set the wavecache control reg */ 952 wave_set_register(chip, es->apu[channel] << 3, tmpval); 953 954 es->wc_map[channel] = tmpval; 955 } 956 957 958 static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es, 959 struct snd_pcm_runtime *runtime) 960 { 961 u32 pa; 962 int high_apu = 0; 963 int channel, apu; 964 int i, size; 965 u32 freq; 966 967 size = es->dma_size >> es->wav_shift; 968 969 if (es->fmt & ESS_FMT_STEREO) 970 high_apu++; 971 972 for (channel = 0; channel <= high_apu; channel++) { 973 apu = es->apu[channel]; 974 975 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0); 976 977 /* Offset to PCMBAR */ 978 pa = es->memory->buf.addr; 979 pa -= chip->dma.addr; 980 pa >>= 1; /* words */ 981 982 pa |= 0x00400000; /* System RAM (Bit 22) */ 983 984 if (es->fmt & ESS_FMT_STEREO) { 985 /* Enable stereo */ 986 if (channel) 987 pa |= 0x00800000; /* (Bit 23) */ 988 if (es->fmt & ESS_FMT_16BIT) 989 pa >>= 1; 990 } 991 992 /* base offset of dma calcs when reading the pointer 993 on this left one */ 994 es->base[channel] = pa & 0xFFFF; 995 996 for (i = 0; i < 16; i++) 997 apu_set_register(chip, apu, i, 0x0000); 998 999 /* Load the buffer into the wave engine */ 1000 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); 1001 apu_set_register(chip, apu, 5, pa & 0xFFFF); 1002 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF); 1003 /* setting loop == sample len */ 1004 apu_set_register(chip, apu, 7, size); 1005 1006 /* clear effects/env.. */ 1007 apu_set_register(chip, apu, 8, 0x0000); 1008 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */ 1009 apu_set_register(chip, apu, 9, 0xD000); 1010 1011 /* clear routing stuff */ 1012 apu_set_register(chip, apu, 11, 0x0000); 1013 /* dma on, no envelopes, filter to all 1s) */ 1014 apu_set_register(chip, apu, 0, 0x400F); 1015 1016 if (es->fmt & ESS_FMT_16BIT) 1017 es->apu_mode[channel] = ESM_APU_16BITLINEAR; 1018 else 1019 es->apu_mode[channel] = ESM_APU_8BITLINEAR; 1020 1021 if (es->fmt & ESS_FMT_STEREO) { 1022 /* set panning: left or right */ 1023 /* Check: different panning. On my Canyon 3D Chipset the 1024 Channels are swapped. I don't know, about the output 1025 to the SPDif Link. Perhaps you have to change this 1026 and not the APU Regs 4-5. */ 1027 apu_set_register(chip, apu, 10, 1028 0x8F00 | (channel ? 0 : 0x10)); 1029 es->apu_mode[channel] += 1; /* stereo */ 1030 } else 1031 apu_set_register(chip, apu, 10, 0x8F08); 1032 } 1033 1034 scoped_guard(spinlock_irqsave, &chip->reg_lock) { 1035 /* clear WP interrupts */ 1036 outw(1, chip->io_port + 0x04); 1037 /* enable WP ints */ 1038 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); 1039 } 1040 1041 freq = runtime->rate; 1042 /* set frequency */ 1043 if (freq > 48000) 1044 freq = 48000; 1045 if (freq < 4000) 1046 freq = 4000; 1047 1048 /* hmmm.. */ 1049 if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO)) 1050 freq >>= 1; 1051 1052 freq = snd_es1968_compute_rate(chip, freq); 1053 1054 /* Load the frequency, turn on 6dB */ 1055 snd_es1968_apu_set_freq(chip, es->apu[0], freq); 1056 snd_es1968_apu_set_freq(chip, es->apu[1], freq); 1057 } 1058 1059 1060 static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel, 1061 unsigned int pa, unsigned int bsize, 1062 int mode, int route) 1063 { 1064 int i, apu = es->apu[channel]; 1065 1066 es->apu_mode[channel] = mode; 1067 1068 /* set the wavecache control reg */ 1069 snd_es1968_program_wavecache(chip, es, channel, pa, 1); 1070 1071 /* Offset to PCMBAR */ 1072 pa -= chip->dma.addr; 1073 pa >>= 1; /* words */ 1074 1075 /* base offset of dma calcs when reading the pointer 1076 on this left one */ 1077 es->base[channel] = pa & 0xFFFF; 1078 pa |= 0x00400000; /* bit 22 -> System RAM */ 1079 1080 /* Begin loading the APU */ 1081 for (i = 0; i < 16; i++) 1082 apu_set_register(chip, apu, i, 0x0000); 1083 1084 /* need to enable subgroups.. and we should probably 1085 have different groups for different /dev/dsps.. */ 1086 apu_set_register(chip, apu, 2, 0x8); 1087 1088 /* Load the buffer into the wave engine */ 1089 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); 1090 apu_set_register(chip, apu, 5, pa & 0xFFFF); 1091 apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF); 1092 apu_set_register(chip, apu, 7, bsize); 1093 /* clear effects/env.. */ 1094 apu_set_register(chip, apu, 8, 0x00F0); 1095 /* amplitude now? sure. why not. */ 1096 apu_set_register(chip, apu, 9, 0x0000); 1097 /* set filter tune, radius, polar pan */ 1098 apu_set_register(chip, apu, 10, 0x8F08); 1099 /* route input */ 1100 apu_set_register(chip, apu, 11, route); 1101 /* dma on, no envelopes, filter to all 1s) */ 1102 apu_set_register(chip, apu, 0, 0x400F); 1103 } 1104 1105 static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es, 1106 struct snd_pcm_runtime *runtime) 1107 { 1108 int size; 1109 u32 freq; 1110 1111 size = es->dma_size >> es->wav_shift; 1112 1113 /* APU assignments: 1114 0 = mono/left SRC 1115 1 = right SRC 1116 2 = mono/left Input Mixer 1117 3 = right Input Mixer 1118 */ 1119 /* data seems to flow from the codec, through an apu into 1120 the 'mixbuf' bit of page, then through the SRC apu 1121 and out to the real 'buffer'. ok. sure. */ 1122 1123 /* input mixer (left/mono) */ 1124 /* parallel in crap, see maestro reg 0xC [8-11] */ 1125 init_capture_apu(chip, es, 2, 1126 es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */ 1127 ESM_APU_INPUTMIXER, 0x14); 1128 /* SRC (left/mono); get input from inputing apu */ 1129 init_capture_apu(chip, es, 0, es->memory->buf.addr, size, 1130 ESM_APU_SRCONVERTOR, es->apu[2]); 1131 if (es->fmt & ESS_FMT_STEREO) { 1132 /* input mixer (right) */ 1133 init_capture_apu(chip, es, 3, 1134 es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2, 1135 ESM_MIXBUF_SIZE/4, /* in words */ 1136 ESM_APU_INPUTMIXER, 0x15); 1137 /* SRC (right) */ 1138 init_capture_apu(chip, es, 1, 1139 es->memory->buf.addr + size*2, size, 1140 ESM_APU_SRCONVERTOR, es->apu[3]); 1141 } 1142 1143 freq = runtime->rate; 1144 /* Sample Rate conversion APUs don't like 0x10000 for their rate */ 1145 if (freq > 47999) 1146 freq = 47999; 1147 if (freq < 4000) 1148 freq = 4000; 1149 1150 freq = snd_es1968_compute_rate(chip, freq); 1151 1152 /* Load the frequency, turn on 6dB */ 1153 snd_es1968_apu_set_freq(chip, es->apu[0], freq); 1154 snd_es1968_apu_set_freq(chip, es->apu[1], freq); 1155 1156 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */ 1157 freq = 0x10000; 1158 snd_es1968_apu_set_freq(chip, es->apu[2], freq); 1159 snd_es1968_apu_set_freq(chip, es->apu[3], freq); 1160 1161 guard(spinlock_irqsave)(&chip->reg_lock); 1162 /* clear WP interrupts */ 1163 outw(1, chip->io_port + 0x04); 1164 /* enable WP ints */ 1165 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); 1166 } 1167 1168 /******************* 1169 * ALSA Interface * 1170 *******************/ 1171 1172 static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream) 1173 { 1174 struct es1968 *chip = snd_pcm_substream_chip(substream); 1175 struct snd_pcm_runtime *runtime = substream->runtime; 1176 struct esschan *es = runtime->private_data; 1177 1178 es->dma_size = snd_pcm_lib_buffer_bytes(substream); 1179 es->frag_size = snd_pcm_lib_period_bytes(substream); 1180 1181 es->wav_shift = 1; /* maestro handles always 16bit */ 1182 es->fmt = 0; 1183 if (snd_pcm_format_width(runtime->format) == 16) 1184 es->fmt |= ESS_FMT_16BIT; 1185 if (runtime->channels > 1) { 1186 es->fmt |= ESS_FMT_STEREO; 1187 if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */ 1188 es->wav_shift++; 1189 } 1190 es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime); 1191 1192 switch (es->mode) { 1193 case ESM_MODE_PLAY: 1194 snd_es1968_playback_setup(chip, es, runtime); 1195 break; 1196 case ESM_MODE_CAPTURE: 1197 snd_es1968_capture_setup(chip, es, runtime); 1198 break; 1199 } 1200 1201 return 0; 1202 } 1203 1204 static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 1205 { 1206 struct es1968 *chip = snd_pcm_substream_chip(substream); 1207 struct esschan *es = substream->runtime->private_data; 1208 1209 guard(spinlock)(&chip->substream_lock); 1210 switch (cmd) { 1211 case SNDRV_PCM_TRIGGER_START: 1212 case SNDRV_PCM_TRIGGER_RESUME: 1213 if (es->running) 1214 break; 1215 snd_es1968_bob_inc(chip, es->bob_freq); 1216 es->count = 0; 1217 es->hwptr = 0; 1218 snd_es1968_pcm_start(chip, es); 1219 es->running = 1; 1220 break; 1221 case SNDRV_PCM_TRIGGER_STOP: 1222 case SNDRV_PCM_TRIGGER_SUSPEND: 1223 if (! es->running) 1224 break; 1225 snd_es1968_pcm_stop(chip, es); 1226 es->running = 0; 1227 snd_es1968_bob_dec(chip); 1228 break; 1229 } 1230 return 0; 1231 } 1232 1233 static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream) 1234 { 1235 struct es1968 *chip = snd_pcm_substream_chip(substream); 1236 struct esschan *es = substream->runtime->private_data; 1237 unsigned int ptr; 1238 1239 ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift; 1240 1241 return bytes_to_frames(substream->runtime, ptr % es->dma_size); 1242 } 1243 1244 static const struct snd_pcm_hardware snd_es1968_playback = { 1245 .info = (SNDRV_PCM_INFO_MMAP | 1246 SNDRV_PCM_INFO_MMAP_VALID | 1247 SNDRV_PCM_INFO_INTERLEAVED | 1248 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1249 /*SNDRV_PCM_INFO_PAUSE |*/ 1250 SNDRV_PCM_INFO_RESUME), 1251 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 1252 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 1253 .rate_min = 4000, 1254 .rate_max = 48000, 1255 .channels_min = 1, 1256 .channels_max = 2, 1257 .buffer_bytes_max = 65536, 1258 .period_bytes_min = 256, 1259 .period_bytes_max = 65536, 1260 .periods_min = 1, 1261 .periods_max = 1024, 1262 .fifo_size = 0, 1263 }; 1264 1265 static const struct snd_pcm_hardware snd_es1968_capture = { 1266 .info = (SNDRV_PCM_INFO_NONINTERLEAVED | 1267 SNDRV_PCM_INFO_MMAP | 1268 SNDRV_PCM_INFO_MMAP_VALID | 1269 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1270 /*SNDRV_PCM_INFO_PAUSE |*/ 1271 SNDRV_PCM_INFO_RESUME), 1272 .formats = /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE, 1273 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 1274 .rate_min = 4000, 1275 .rate_max = 48000, 1276 .channels_min = 1, 1277 .channels_max = 2, 1278 .buffer_bytes_max = 65536, 1279 .period_bytes_min = 256, 1280 .period_bytes_max = 65536, 1281 .periods_min = 1, 1282 .periods_max = 1024, 1283 .fifo_size = 0, 1284 }; 1285 1286 /* ************************* 1287 * DMA memory management * 1288 *************************/ 1289 1290 /* Because the Maestro can only take addresses relative to the PCM base address 1291 register :( */ 1292 1293 static int calc_available_memory_size(struct es1968 *chip) 1294 { 1295 int max_size = 0; 1296 struct esm_memory *buf; 1297 1298 guard(mutex)(&chip->memory_mutex); 1299 list_for_each_entry(buf, &chip->buf_list, list) { 1300 if (buf->empty && buf->buf.bytes > max_size) 1301 max_size = buf->buf.bytes; 1302 } 1303 if (max_size >= 128*1024) 1304 max_size = 127*1024; 1305 return max_size; 1306 } 1307 1308 /* allocate a new memory chunk with the specified size */ 1309 static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size) 1310 { 1311 struct esm_memory *buf; 1312 1313 size = ALIGN(size, ESM_MEM_ALIGN); 1314 guard(mutex)(&chip->memory_mutex); 1315 list_for_each_entry(buf, &chip->buf_list, list) { 1316 if (buf->empty && buf->buf.bytes >= size) 1317 goto __found; 1318 } 1319 return NULL; 1320 1321 __found: 1322 if (buf->buf.bytes > size) { 1323 struct esm_memory *chunk = kmalloc_obj(*chunk); 1324 if (chunk == NULL) 1325 return NULL; 1326 chunk->buf = buf->buf; 1327 chunk->buf.bytes -= size; 1328 chunk->buf.area += size; 1329 chunk->buf.addr += size; 1330 chunk->empty = 1; 1331 buf->buf.bytes = size; 1332 list_add(&chunk->list, &buf->list); 1333 } 1334 buf->empty = 0; 1335 return buf; 1336 } 1337 1338 /* free a memory chunk */ 1339 static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf) 1340 { 1341 struct esm_memory *chunk; 1342 1343 guard(mutex)(&chip->memory_mutex); 1344 buf->empty = 1; 1345 if (buf->list.prev != &chip->buf_list) { 1346 chunk = list_entry(buf->list.prev, struct esm_memory, list); 1347 if (chunk->empty) { 1348 chunk->buf.bytes += buf->buf.bytes; 1349 list_del(&buf->list); 1350 kfree(buf); 1351 buf = chunk; 1352 } 1353 } 1354 if (buf->list.next != &chip->buf_list) { 1355 chunk = list_entry(buf->list.next, struct esm_memory, list); 1356 if (chunk->empty) { 1357 buf->buf.bytes += chunk->buf.bytes; 1358 list_del(&chunk->list); 1359 kfree(chunk); 1360 } 1361 } 1362 } 1363 1364 static void snd_es1968_free_dmabuf(struct es1968 *chip) 1365 { 1366 struct list_head *p; 1367 1368 if (! chip->dma.area) 1369 return; 1370 snd_dma_free_pages(&chip->dma); 1371 while ((p = chip->buf_list.next) != &chip->buf_list) { 1372 struct esm_memory *chunk = list_entry(p, struct esm_memory, list); 1373 list_del(p); 1374 kfree(chunk); 1375 } 1376 } 1377 1378 static int 1379 snd_es1968_init_dmabuf(struct es1968 *chip) 1380 { 1381 int err; 1382 struct esm_memory *chunk; 1383 1384 err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV, 1385 &chip->pci->dev, 1386 chip->total_bufsize, &chip->dma); 1387 if (err < 0 || ! chip->dma.area) { 1388 dev_err(chip->card->dev, 1389 "can't allocate dma pages for size %d\n", 1390 chip->total_bufsize); 1391 return -ENOMEM; 1392 } 1393 if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) { 1394 snd_dma_free_pages(&chip->dma); 1395 dev_err(chip->card->dev, "DMA buffer beyond 256MB.\n"); 1396 return -ENOMEM; 1397 } 1398 1399 INIT_LIST_HEAD(&chip->buf_list); 1400 /* allocate an empty chunk */ 1401 chunk = kmalloc_obj(*chunk); 1402 if (chunk == NULL) { 1403 snd_es1968_free_dmabuf(chip); 1404 return -ENOMEM; 1405 } 1406 memset(chip->dma.area, 0, ESM_MEM_ALIGN); 1407 chunk->buf = chip->dma; 1408 chunk->buf.area += ESM_MEM_ALIGN; 1409 chunk->buf.addr += ESM_MEM_ALIGN; 1410 chunk->buf.bytes -= ESM_MEM_ALIGN; 1411 chunk->empty = 1; 1412 list_add(&chunk->list, &chip->buf_list); 1413 1414 return 0; 1415 } 1416 1417 /* setup the dma_areas */ 1418 /* buffer is extracted from the pre-allocated memory chunk */ 1419 static int snd_es1968_hw_params(struct snd_pcm_substream *substream, 1420 struct snd_pcm_hw_params *hw_params) 1421 { 1422 struct es1968 *chip = snd_pcm_substream_chip(substream); 1423 struct snd_pcm_runtime *runtime = substream->runtime; 1424 struct esschan *chan = runtime->private_data; 1425 int size = params_buffer_bytes(hw_params); 1426 1427 if (chan->memory) { 1428 if (chan->memory->buf.bytes >= size) { 1429 runtime->dma_bytes = size; 1430 return 0; 1431 } 1432 snd_es1968_free_memory(chip, chan->memory); 1433 } 1434 chan->memory = snd_es1968_new_memory(chip, size); 1435 if (chan->memory == NULL) { 1436 dev_dbg(chip->card->dev, 1437 "cannot allocate dma buffer: size = %d\n", size); 1438 return -ENOMEM; 1439 } 1440 snd_pcm_set_runtime_buffer(substream, &chan->memory->buf); 1441 return 1; /* area was changed */ 1442 } 1443 1444 /* remove dma areas if allocated */ 1445 static int snd_es1968_hw_free(struct snd_pcm_substream *substream) 1446 { 1447 struct es1968 *chip = snd_pcm_substream_chip(substream); 1448 struct snd_pcm_runtime *runtime = substream->runtime; 1449 struct esschan *chan; 1450 1451 if (runtime->private_data == NULL) 1452 return 0; 1453 chan = runtime->private_data; 1454 if (chan->memory) { 1455 snd_es1968_free_memory(chip, chan->memory); 1456 chan->memory = NULL; 1457 } 1458 return 0; 1459 } 1460 1461 1462 /* 1463 * allocate APU pair 1464 */ 1465 static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type) 1466 { 1467 int apu; 1468 1469 for (apu = 0; apu < NR_APUS; apu += 2) { 1470 if (chip->apu[apu] == ESM_APU_FREE && 1471 chip->apu[apu + 1] == ESM_APU_FREE) { 1472 chip->apu[apu] = chip->apu[apu + 1] = type; 1473 return apu; 1474 } 1475 } 1476 return -EBUSY; 1477 } 1478 1479 /* 1480 * release APU pair 1481 */ 1482 static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu) 1483 { 1484 chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE; 1485 } 1486 1487 1488 /****************** 1489 * PCM open/close * 1490 ******************/ 1491 1492 static int snd_es1968_playback_open(struct snd_pcm_substream *substream) 1493 { 1494 struct es1968 *chip = snd_pcm_substream_chip(substream); 1495 struct snd_pcm_runtime *runtime = substream->runtime; 1496 struct esschan *es; 1497 int apu1; 1498 1499 /* search 2 APUs */ 1500 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY); 1501 if (apu1 < 0) 1502 return apu1; 1503 1504 es = kzalloc_obj(*es); 1505 if (!es) { 1506 snd_es1968_free_apu_pair(chip, apu1); 1507 return -ENOMEM; 1508 } 1509 1510 es->apu[0] = apu1; 1511 es->apu[1] = apu1 + 1; 1512 es->apu_mode[0] = 0; 1513 es->apu_mode[1] = 0; 1514 es->running = 0; 1515 es->substream = substream; 1516 es->mode = ESM_MODE_PLAY; 1517 1518 runtime->private_data = es; 1519 runtime->hw = snd_es1968_playback; 1520 runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max = 1521 calc_available_memory_size(chip); 1522 1523 guard(spinlock_irq)(&chip->substream_lock); 1524 list_add(&es->list, &chip->substream_list); 1525 1526 return 0; 1527 } 1528 1529 static int snd_es1968_capture_open(struct snd_pcm_substream *substream) 1530 { 1531 struct snd_pcm_runtime *runtime = substream->runtime; 1532 struct es1968 *chip = snd_pcm_substream_chip(substream); 1533 struct esschan *es; 1534 int err, apu1, apu2; 1535 1536 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE); 1537 if (apu1 < 0) 1538 return apu1; 1539 apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV); 1540 if (apu2 < 0) { 1541 snd_es1968_free_apu_pair(chip, apu1); 1542 return apu2; 1543 } 1544 1545 es = kzalloc_obj(*es); 1546 if (!es) { 1547 snd_es1968_free_apu_pair(chip, apu1); 1548 snd_es1968_free_apu_pair(chip, apu2); 1549 return -ENOMEM; 1550 } 1551 1552 es->apu[0] = apu1; 1553 es->apu[1] = apu1 + 1; 1554 es->apu[2] = apu2; 1555 es->apu[3] = apu2 + 1; 1556 es->apu_mode[0] = 0; 1557 es->apu_mode[1] = 0; 1558 es->apu_mode[2] = 0; 1559 es->apu_mode[3] = 0; 1560 es->running = 0; 1561 es->substream = substream; 1562 es->mode = ESM_MODE_CAPTURE; 1563 1564 /* get mixbuffer */ 1565 es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE); 1566 if (!es->mixbuf) { 1567 snd_es1968_free_apu_pair(chip, apu1); 1568 snd_es1968_free_apu_pair(chip, apu2); 1569 kfree(es); 1570 return -ENOMEM; 1571 } 1572 memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE); 1573 1574 runtime->private_data = es; 1575 runtime->hw = snd_es1968_capture; 1576 runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max = 1577 calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */ 1578 err = snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES); 1579 if (err < 0) 1580 return err; 1581 1582 guard(spinlock_irq)(&chip->substream_lock); 1583 list_add(&es->list, &chip->substream_list); 1584 1585 return 0; 1586 } 1587 1588 static int snd_es1968_playback_close(struct snd_pcm_substream *substream) 1589 { 1590 struct es1968 *chip = snd_pcm_substream_chip(substream); 1591 struct esschan *es; 1592 1593 if (substream->runtime->private_data == NULL) 1594 return 0; 1595 es = substream->runtime->private_data; 1596 scoped_guard(spinlock_irq, &chip->substream_lock) { 1597 list_del(&es->list); 1598 } 1599 snd_es1968_free_apu_pair(chip, es->apu[0]); 1600 kfree(es); 1601 1602 return 0; 1603 } 1604 1605 static int snd_es1968_capture_close(struct snd_pcm_substream *substream) 1606 { 1607 struct es1968 *chip = snd_pcm_substream_chip(substream); 1608 struct esschan *es; 1609 1610 if (substream->runtime->private_data == NULL) 1611 return 0; 1612 es = substream->runtime->private_data; 1613 scoped_guard(spinlock_irq, &chip->substream_lock) { 1614 list_del(&es->list); 1615 } 1616 snd_es1968_free_memory(chip, es->mixbuf); 1617 snd_es1968_free_apu_pair(chip, es->apu[0]); 1618 snd_es1968_free_apu_pair(chip, es->apu[2]); 1619 kfree(es); 1620 1621 return 0; 1622 } 1623 1624 static const struct snd_pcm_ops snd_es1968_playback_ops = { 1625 .open = snd_es1968_playback_open, 1626 .close = snd_es1968_playback_close, 1627 .hw_params = snd_es1968_hw_params, 1628 .hw_free = snd_es1968_hw_free, 1629 .prepare = snd_es1968_pcm_prepare, 1630 .trigger = snd_es1968_pcm_trigger, 1631 .pointer = snd_es1968_pcm_pointer, 1632 }; 1633 1634 static const struct snd_pcm_ops snd_es1968_capture_ops = { 1635 .open = snd_es1968_capture_open, 1636 .close = snd_es1968_capture_close, 1637 .hw_params = snd_es1968_hw_params, 1638 .hw_free = snd_es1968_hw_free, 1639 .prepare = snd_es1968_pcm_prepare, 1640 .trigger = snd_es1968_pcm_trigger, 1641 .pointer = snd_es1968_pcm_pointer, 1642 }; 1643 1644 1645 /* 1646 * measure clock 1647 */ 1648 #define CLOCK_MEASURE_BUFSIZE 16768 /* enough large for a single shot */ 1649 1650 static void es1968_measure_clock(struct es1968 *chip) 1651 { 1652 int i, apu; 1653 unsigned int pa, offset, t; 1654 struct esm_memory *memory; 1655 ktime_t start_time, stop_time; 1656 ktime_t diff; 1657 1658 if (chip->clock == 0) 1659 chip->clock = 48000; /* default clock value */ 1660 1661 /* search 2 APUs (although one apu is enough) */ 1662 apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY); 1663 if (apu < 0) { 1664 dev_err(chip->card->dev, "Hmm, cannot find empty APU pair!?\n"); 1665 return; 1666 } 1667 memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE); 1668 if (!memory) { 1669 dev_warn(chip->card->dev, 1670 "cannot allocate dma buffer - using default clock %d\n", 1671 chip->clock); 1672 snd_es1968_free_apu_pair(chip, apu); 1673 return; 1674 } 1675 1676 memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE); 1677 1678 wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8); 1679 1680 pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1); 1681 pa |= 0x00400000; /* System RAM (Bit 22) */ 1682 1683 /* initialize apu */ 1684 for (i = 0; i < 16; i++) 1685 apu_set_register(chip, apu, i, 0x0000); 1686 1687 apu_set_register(chip, apu, 0, 0x400f); 1688 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8); 1689 apu_set_register(chip, apu, 5, pa & 0xffff); 1690 apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff); 1691 apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2); 1692 apu_set_register(chip, apu, 8, 0x0000); 1693 apu_set_register(chip, apu, 9, 0xD000); 1694 apu_set_register(chip, apu, 10, 0x8F08); 1695 apu_set_register(chip, apu, 11, 0x0000); 1696 scoped_guard(spinlock_irq, &chip->reg_lock) { 1697 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ 1698 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */ 1699 } 1700 1701 snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */ 1702 1703 chip->in_measurement = 1; 1704 chip->measure_apu = apu; 1705 scoped_guard(spinlock_irq, &chip->reg_lock) { 1706 snd_es1968_bob_inc(chip, ESM_BOB_FREQ); 1707 __apu_set_register(chip, apu, 5, pa & 0xffff); 1708 snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR); 1709 start_time = ktime_get(); 1710 } 1711 msleep(50); 1712 scoped_guard(spinlock_irq, &chip->reg_lock) { 1713 offset = __apu_get_register(chip, apu, 5); 1714 stop_time = ktime_get(); 1715 snd_es1968_trigger_apu(chip, apu, 0); /* stop */ 1716 snd_es1968_bob_dec(chip); 1717 chip->in_measurement = 0; 1718 } 1719 1720 /* check the current position */ 1721 offset -= (pa & 0xffff); 1722 offset &= 0xfffe; 1723 offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2); 1724 1725 diff = ktime_sub(stop_time, start_time); 1726 t = ktime_to_us(diff); 1727 if (t == 0) { 1728 dev_err(chip->card->dev, "?? calculation error..\n"); 1729 } else { 1730 offset *= 1000; 1731 offset = (offset / t) * 1000 + ((offset % t) * 1000) / t; 1732 if (offset < 47500 || offset > 48500) { 1733 if (offset >= 40000 && offset <= 50000) 1734 chip->clock = (chip->clock * offset) / 48000; 1735 } 1736 dev_info(chip->card->dev, "clocking to %d\n", chip->clock); 1737 } 1738 snd_es1968_free_memory(chip, memory); 1739 snd_es1968_free_apu_pair(chip, apu); 1740 } 1741 1742 1743 /* 1744 */ 1745 1746 static void snd_es1968_pcm_free(struct snd_pcm *pcm) 1747 { 1748 struct es1968 *esm = pcm->private_data; 1749 snd_es1968_free_dmabuf(esm); 1750 esm->pcm = NULL; 1751 } 1752 1753 static int 1754 snd_es1968_pcm(struct es1968 *chip, int device) 1755 { 1756 struct snd_pcm *pcm; 1757 int err; 1758 1759 /* get DMA buffer */ 1760 err = snd_es1968_init_dmabuf(chip); 1761 if (err < 0) 1762 return err; 1763 1764 /* set PCMBAR */ 1765 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); 1766 wave_set_register(chip, 0x01FD, chip->dma.addr >> 12); 1767 wave_set_register(chip, 0x01FE, chip->dma.addr >> 12); 1768 wave_set_register(chip, 0x01FF, chip->dma.addr >> 12); 1769 1770 err = snd_pcm_new(chip->card, "ESS Maestro", device, 1771 chip->playback_streams, 1772 chip->capture_streams, &pcm); 1773 if (err < 0) 1774 return err; 1775 1776 pcm->private_data = chip; 1777 pcm->private_free = snd_es1968_pcm_free; 1778 1779 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops); 1780 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops); 1781 1782 pcm->info_flags = 0; 1783 1784 strscpy(pcm->name, "ESS Maestro"); 1785 1786 chip->pcm = pcm; 1787 1788 return 0; 1789 } 1790 /* 1791 * suppress jitter on some maestros when playing stereo 1792 */ 1793 static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es) 1794 { 1795 unsigned int cp1; 1796 unsigned int cp2; 1797 unsigned int diff; 1798 1799 cp1 = __apu_get_register(chip, 0, 5); 1800 cp2 = __apu_get_register(chip, 1, 5); 1801 diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1); 1802 1803 if (diff > 1) 1804 __maestro_write(chip, IDR0_DATA_PORT, cp1); 1805 } 1806 1807 /* 1808 * update pointer 1809 */ 1810 static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es) 1811 { 1812 unsigned int hwptr; 1813 unsigned int diff; 1814 struct snd_pcm_substream *subs = es->substream; 1815 1816 if (subs == NULL || !es->running) 1817 return; 1818 1819 hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift; 1820 hwptr %= es->dma_size; 1821 1822 diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size; 1823 1824 es->hwptr = hwptr; 1825 es->count += diff; 1826 1827 if (es->count > es->frag_size) { 1828 spin_unlock(&chip->substream_lock); 1829 snd_pcm_period_elapsed(subs); 1830 spin_lock(&chip->substream_lock); 1831 es->count %= es->frag_size; 1832 } 1833 } 1834 1835 /* The hardware volume works by incrementing / decrementing 2 counters 1836 (without wrap around) in response to volume button presses and then 1837 generating an interrupt. The pair of counters is stored in bits 1-3 and 5-7 1838 of a byte wide register. The meaning of bits 0 and 4 is unknown. */ 1839 static void es1968_update_hw_volume(struct work_struct *work) 1840 { 1841 struct es1968 *chip = container_of(work, struct es1968, hwvol_work); 1842 int x, val; 1843 1844 /* Figure out which volume control button was pushed, 1845 based on differences from the default register 1846 values. */ 1847 x = inb(chip->io_port + 0x1c) & 0xee; 1848 /* Reset the volume control registers. */ 1849 outb(0x88, chip->io_port + 0x1c); 1850 outb(0x88, chip->io_port + 0x1d); 1851 outb(0x88, chip->io_port + 0x1e); 1852 outb(0x88, chip->io_port + 0x1f); 1853 1854 if (chip->in_suspend) 1855 return; 1856 1857 #ifndef CONFIG_SND_ES1968_INPUT 1858 if (! chip->master_switch || ! chip->master_volume) 1859 return; 1860 1861 val = snd_ac97_read(chip->ac97, AC97_MASTER); 1862 switch (x) { 1863 case 0x88: 1864 /* mute */ 1865 val ^= 0x8000; 1866 break; 1867 case 0xaa: 1868 /* volume up */ 1869 if ((val & 0x7f) > 0) 1870 val--; 1871 if ((val & 0x7f00) > 0) 1872 val -= 0x0100; 1873 break; 1874 case 0x66: 1875 /* volume down */ 1876 if ((val & 0x7f) < 0x1f) 1877 val++; 1878 if ((val & 0x7f00) < 0x1f00) 1879 val += 0x0100; 1880 break; 1881 } 1882 if (snd_ac97_update(chip->ac97, AC97_MASTER, val)) 1883 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, 1884 &chip->master_volume->id); 1885 #else 1886 if (!chip->input_dev) 1887 return; 1888 1889 val = 0; 1890 switch (x) { 1891 case 0x88: 1892 /* The counters have not changed, yet we've received a HV 1893 interrupt. According to tests run by various people this 1894 happens when pressing the mute button. */ 1895 val = KEY_MUTE; 1896 break; 1897 case 0xaa: 1898 /* counters increased by 1 -> volume up */ 1899 val = KEY_VOLUMEUP; 1900 break; 1901 case 0x66: 1902 /* counters decreased by 1 -> volume down */ 1903 val = KEY_VOLUMEDOWN; 1904 break; 1905 } 1906 1907 if (val) { 1908 input_report_key(chip->input_dev, val, 1); 1909 input_sync(chip->input_dev); 1910 input_report_key(chip->input_dev, val, 0); 1911 input_sync(chip->input_dev); 1912 } 1913 #endif 1914 } 1915 1916 /* 1917 * interrupt handler 1918 */ 1919 static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id) 1920 { 1921 struct es1968 *chip = dev_id; 1922 u32 event; 1923 1924 event = inb(chip->io_port + 0x1A); 1925 if (!event) 1926 return IRQ_NONE; 1927 1928 outw(inw(chip->io_port + 4) & 1, chip->io_port + 4); 1929 1930 if (event & ESM_HWVOL_IRQ) 1931 schedule_work(&chip->hwvol_work); 1932 1933 /* else ack 'em all, i imagine */ 1934 outb(0xFF, chip->io_port + 0x1A); 1935 1936 if ((event & ESM_MPU401_IRQ) && chip->rmidi) { 1937 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 1938 } 1939 1940 if (event & ESM_SOUND_IRQ) { 1941 struct esschan *es; 1942 scoped_guard(spinlock, &chip->substream_lock) { 1943 list_for_each_entry(es, &chip->substream_list, list) { 1944 if (es->running) { 1945 snd_es1968_update_pcm(chip, es); 1946 if (es->fmt & ESS_FMT_STEREO) 1947 snd_es1968_suppress_jitter(chip, es); 1948 } 1949 } 1950 } 1951 if (chip->in_measurement) { 1952 unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5); 1953 if (curp < chip->measure_lastpos) 1954 chip->measure_count++; 1955 chip->measure_lastpos = curp; 1956 } 1957 } 1958 1959 return IRQ_HANDLED; 1960 } 1961 1962 /* 1963 * Mixer stuff 1964 */ 1965 1966 static int 1967 snd_es1968_mixer(struct es1968 *chip) 1968 { 1969 struct snd_ac97_bus *pbus; 1970 struct snd_ac97_template ac97; 1971 int err; 1972 static const struct snd_ac97_bus_ops ops = { 1973 .write = snd_es1968_ac97_write, 1974 .read = snd_es1968_ac97_read, 1975 }; 1976 1977 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus); 1978 if (err < 0) 1979 return err; 1980 pbus->no_vra = 1; /* ES1968 doesn't need VRA */ 1981 1982 memset(&ac97, 0, sizeof(ac97)); 1983 ac97.private_data = chip; 1984 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); 1985 if (err < 0) 1986 return err; 1987 1988 #ifndef CONFIG_SND_ES1968_INPUT 1989 /* attach master switch / volumes for h/w volume control */ 1990 chip->master_switch = snd_ctl_find_id_mixer(chip->card, 1991 "Master Playback Switch"); 1992 chip->master_volume = snd_ctl_find_id_mixer(chip->card, 1993 "Master Playback Volume"); 1994 #endif 1995 1996 return 0; 1997 } 1998 1999 /* 2000 * reset ac97 codec 2001 */ 2002 2003 static void snd_es1968_ac97_reset(struct es1968 *chip) 2004 { 2005 unsigned long ioaddr = chip->io_port; 2006 2007 unsigned short save_ringbus_a; 2008 unsigned short save_68; 2009 unsigned short w; 2010 unsigned int vend; 2011 2012 /* save configuration */ 2013 save_ringbus_a = inw(ioaddr + 0x36); 2014 2015 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */ 2016 /* set command/status address i/o to 1st codec */ 2017 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); 2018 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); 2019 2020 /* disable ac link */ 2021 outw(0x0000, ioaddr + 0x36); 2022 save_68 = inw(ioaddr + 0x68); 2023 pci_read_config_word(chip->pci, 0x58, &w); /* something magical with gpio and bus arb. */ 2024 pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend); 2025 if (w & 1) 2026 save_68 |= 0x10; 2027 outw(0xfffe, ioaddr + 0x64); /* unmask gpio 0 */ 2028 outw(0x0001, ioaddr + 0x68); /* gpio write */ 2029 outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */ 2030 udelay(20); 2031 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */ 2032 msleep(20); 2033 2034 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */ 2035 outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38); 2036 outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a); 2037 outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c); 2038 2039 /* now the second codec */ 2040 /* disable ac link */ 2041 outw(0x0000, ioaddr + 0x36); 2042 outw(0xfff7, ioaddr + 0x64); /* unmask gpio 3 */ 2043 save_68 = inw(ioaddr + 0x68); 2044 outw(0x0009, ioaddr + 0x68); /* gpio write 0 & 3 ?? */ 2045 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */ 2046 udelay(20); 2047 outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */ 2048 msleep(500); 2049 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); 2050 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); 2051 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); 2052 2053 #if 0 /* the loop here needs to be much better if we want it.. */ 2054 dev_info(chip->card->dev, "trying software reset\n"); 2055 /* try and do a software reset */ 2056 outb(0x80 | 0x7c, ioaddr + 0x30); 2057 for (w = 0;; w++) { 2058 if ((inw(ioaddr + 0x30) & 1) == 0) { 2059 if (inb(ioaddr + 0x32) != 0) 2060 break; 2061 2062 outb(0x80 | 0x7d, ioaddr + 0x30); 2063 if (((inw(ioaddr + 0x30) & 1) == 0) 2064 && (inb(ioaddr + 0x32) != 0)) 2065 break; 2066 outb(0x80 | 0x7f, ioaddr + 0x30); 2067 if (((inw(ioaddr + 0x30) & 1) == 0) 2068 && (inb(ioaddr + 0x32) != 0)) 2069 break; 2070 } 2071 2072 if (w > 10000) { 2073 outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */ 2074 msleep(500); /* oh my.. */ 2075 outb(inb(ioaddr + 0x37) & ~0x08, 2076 ioaddr + 0x37); 2077 udelay(1); 2078 outw(0x80, ioaddr + 0x30); 2079 for (w = 0; w < 10000; w++) { 2080 if ((inw(ioaddr + 0x30) & 1) == 0) 2081 break; 2082 } 2083 } 2084 } 2085 #endif 2086 if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) { 2087 /* turn on external amp? */ 2088 outw(0xf9ff, ioaddr + 0x64); 2089 outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68); 2090 outw(0x0209, ioaddr + 0x60); 2091 } 2092 2093 /* restore.. */ 2094 outw(save_ringbus_a, ioaddr + 0x36); 2095 2096 /* Turn on the 978 docking chip. 2097 First frob the "master output enable" bit, 2098 then set most of the playback volume control registers to max. */ 2099 outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0); 2100 outb(0xff, ioaddr+0xc3); 2101 outb(0xff, ioaddr+0xc4); 2102 outb(0xff, ioaddr+0xc6); 2103 outb(0xff, ioaddr+0xc8); 2104 outb(0x3f, ioaddr+0xcf); 2105 outb(0x3f, ioaddr+0xd0); 2106 } 2107 2108 static void snd_es1968_reset(struct es1968 *chip) 2109 { 2110 /* Reset */ 2111 outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND, 2112 chip->io_port + ESM_PORT_HOST_IRQ); 2113 udelay(10); 2114 outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ); 2115 udelay(10); 2116 } 2117 2118 /* 2119 * initialize maestro chip 2120 */ 2121 static void snd_es1968_chip_init(struct es1968 *chip) 2122 { 2123 struct pci_dev *pci = chip->pci; 2124 int i; 2125 unsigned long iobase = chip->io_port; 2126 u16 w; 2127 u32 n; 2128 2129 /* We used to muck around with pci config space that 2130 * we had no business messing with. We don't know enough 2131 * about the machine to know which DMA mode is appropriate, 2132 * etc. We were guessing wrong on some machines and making 2133 * them unhappy. We now trust in the BIOS to do things right, 2134 * which almost certainly means a new host of problems will 2135 * arise with broken BIOS implementations. screw 'em. 2136 * We're already intolerant of machines that don't assign 2137 * IRQs. 2138 */ 2139 2140 /* Config Reg A */ 2141 pci_read_config_word(pci, ESM_CONFIG_A, &w); 2142 2143 w &= ~DMA_CLEAR; /* Clear DMA bits */ 2144 w &= ~(PIC_SNOOP1 | PIC_SNOOP2); /* Clear Pic Snoop Mode Bits */ 2145 w &= ~SAFEGUARD; /* Safeguard off */ 2146 w |= POST_WRITE; /* Posted write */ 2147 w |= PCI_TIMING; /* PCI timing on */ 2148 /* XXX huh? claims to be reserved.. */ 2149 w &= ~SWAP_LR; /* swap left/right 2150 seems to only have effect on SB 2151 Emulation */ 2152 w &= ~SUBTR_DECODE; /* Subtractive decode off */ 2153 2154 pci_write_config_word(pci, ESM_CONFIG_A, w); 2155 2156 /* Config Reg B */ 2157 2158 pci_read_config_word(pci, ESM_CONFIG_B, &w); 2159 2160 w &= ~(1 << 15); /* Turn off internal clock multiplier */ 2161 /* XXX how do we know which to use? */ 2162 w &= ~(1 << 14); /* External clock */ 2163 2164 w &= ~SPDIF_CONFB; /* disable S/PDIF output */ 2165 w |= HWV_CONFB; /* HWV on */ 2166 w |= DEBOUNCE; /* Debounce off: easier to push the HW buttons */ 2167 w &= ~GPIO_CONFB; /* GPIO 4:5 */ 2168 w |= CHI_CONFB; /* Disconnect from the CHI. Enabling this made a dell 7500 work. */ 2169 w &= ~IDMA_CONFB; /* IDMA off (undocumented) */ 2170 w &= ~MIDI_FIX; /* MIDI fix off (undoc) */ 2171 w &= ~(1 << 1); /* reserved, always write 0 */ 2172 w &= ~IRQ_TO_ISA; /* IRQ to ISA off (undoc) */ 2173 2174 pci_write_config_word(pci, ESM_CONFIG_B, w); 2175 2176 /* DDMA off */ 2177 2178 pci_read_config_word(pci, ESM_DDMA, &w); 2179 w &= ~(1 << 0); 2180 pci_write_config_word(pci, ESM_DDMA, w); 2181 2182 /* 2183 * Legacy mode 2184 */ 2185 2186 pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w); 2187 2188 w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */ 2189 w &= ~ESS_ENABLE_SERIAL_IRQ; /* Disable SIRQ */ 2190 w &= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */ 2191 2192 pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w); 2193 2194 /* Set up 978 docking control chip. */ 2195 pci_read_config_word(pci, 0x58, &w); 2196 w|=1<<2; /* Enable 978. */ 2197 w|=1<<3; /* Turn on 978 hardware volume control. */ 2198 w&=~(1<<11); /* Turn on 978 mixer volume control. */ 2199 pci_write_config_word(pci, 0x58, w); 2200 2201 /* Sound Reset */ 2202 2203 snd_es1968_reset(chip); 2204 2205 /* 2206 * Ring Bus Setup 2207 */ 2208 2209 /* setup usual 0x34 stuff.. 0x36 may be chip specific */ 2210 outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */ 2211 udelay(20); 2212 outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */ 2213 udelay(20); 2214 2215 /* 2216 * Reset the CODEC 2217 */ 2218 2219 snd_es1968_ac97_reset(chip); 2220 2221 /* Ring Bus Control B */ 2222 2223 n = inl(iobase + ESM_RING_BUS_CONTR_B); 2224 n &= ~RINGB_EN_SPDIF; /* SPDIF off */ 2225 //w |= RINGB_EN_2CODEC; /* enable 2nd codec */ 2226 outl(n, iobase + ESM_RING_BUS_CONTR_B); 2227 2228 /* Set hardware volume control registers to midpoints. 2229 We can tell which button was pushed based on how they change. */ 2230 outb(0x88, iobase+0x1c); 2231 outb(0x88, iobase+0x1d); 2232 outb(0x88, iobase+0x1e); 2233 outb(0x88, iobase+0x1f); 2234 2235 /* it appears some maestros (dell 7500) only work if these are set, 2236 regardless of whether we use the assp or not. */ 2237 2238 outb(0, iobase + ASSP_CONTROL_B); 2239 outb(3, iobase + ASSP_CONTROL_A); /* M: Reserved bits... */ 2240 outb(0, iobase + ASSP_CONTROL_C); /* M: Disable ASSP, ASSP IRQ's and FM Port */ 2241 2242 /* 2243 * set up wavecache 2244 */ 2245 for (i = 0; i < 16; i++) { 2246 /* Write 0 into the buffer area 0x1E0->1EF */ 2247 outw(0x01E0 + i, iobase + WC_INDEX); 2248 outw(0x0000, iobase + WC_DATA); 2249 2250 /* The 1.10 test program seem to write 0 into the buffer area 2251 * 0x1D0-0x1DF too.*/ 2252 outw(0x01D0 + i, iobase + WC_INDEX); 2253 outw(0x0000, iobase + WC_DATA); 2254 } 2255 wave_set_register(chip, IDR7_WAVE_ROMRAM, 2256 (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00)); 2257 wave_set_register(chip, IDR7_WAVE_ROMRAM, 2258 wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100); 2259 wave_set_register(chip, IDR7_WAVE_ROMRAM, 2260 wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200); 2261 wave_set_register(chip, IDR7_WAVE_ROMRAM, 2262 wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400); 2263 2264 2265 maestro_write(chip, IDR2_CRAM_DATA, 0x0000); 2266 /* Now back to the DirectSound stuff */ 2267 /* audio serial configuration.. ? */ 2268 maestro_write(chip, 0x08, 0xB004); 2269 maestro_write(chip, 0x09, 0x001B); 2270 maestro_write(chip, 0x0A, 0x8000); 2271 maestro_write(chip, 0x0B, 0x3F37); 2272 maestro_write(chip, 0x0C, 0x0098); 2273 2274 /* parallel in, has something to do with recording :) */ 2275 maestro_write(chip, 0x0C, 2276 (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000); 2277 /* parallel out */ 2278 maestro_write(chip, 0x0C, 2279 (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500); 2280 2281 maestro_write(chip, 0x0D, 0x7632); 2282 2283 /* Wave cache control on - test off, sg off, 2284 enable, enable extra chans 1Mb */ 2285 2286 w = inw(iobase + WC_CONTROL); 2287 2288 w &= ~0xFA00; /* Seems to be reserved? I don't know */ 2289 w |= 0xA000; /* reserved... I don't know */ 2290 w &= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable 2291 Seems to crash the Computer if enabled... */ 2292 w |= 0x0100; /* Wave Cache Operation Enabled */ 2293 w |= 0x0080; /* Channels 60/61 as Placback/Record enabled */ 2294 w &= ~0x0060; /* Clear Wavtable Size */ 2295 w |= 0x0020; /* Wavetable Size : 1MB */ 2296 /* Bit 4 is reserved */ 2297 w &= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */ 2298 /* Bit 1 is reserved */ 2299 w &= ~0x0001; /* Test Mode off */ 2300 2301 outw(w, iobase + WC_CONTROL); 2302 2303 /* Now clear the APU control ram */ 2304 for (i = 0; i < NR_APUS; i++) { 2305 for (w = 0; w < NR_APU_REGS; w++) 2306 apu_set_register(chip, i, w, 0); 2307 2308 } 2309 } 2310 2311 /* Enable IRQ's */ 2312 static void snd_es1968_start_irq(struct es1968 *chip) 2313 { 2314 unsigned short w; 2315 w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME; 2316 if (chip->rmidi) 2317 w |= ESM_HIRQ_MPU401; 2318 outb(w, chip->io_port + 0x1A); 2319 outw(w, chip->io_port + ESM_PORT_HOST_IRQ); 2320 } 2321 2322 /* 2323 * PM support 2324 */ 2325 static int es1968_suspend(struct device *dev) 2326 { 2327 struct snd_card *card = dev_get_drvdata(dev); 2328 struct es1968 *chip = card->private_data; 2329 2330 if (! chip->do_pm) 2331 return 0; 2332 2333 chip->in_suspend = 1; 2334 cancel_work_sync(&chip->hwvol_work); 2335 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2336 snd_ac97_suspend(chip->ac97); 2337 snd_es1968_bob_stop(chip); 2338 return 0; 2339 } 2340 2341 static int es1968_resume(struct device *dev) 2342 { 2343 struct snd_card *card = dev_get_drvdata(dev); 2344 struct es1968 *chip = card->private_data; 2345 struct esschan *es; 2346 2347 if (! chip->do_pm) 2348 return 0; 2349 2350 snd_es1968_chip_init(chip); 2351 2352 /* need to restore the base pointers.. */ 2353 if (chip->dma.addr) { 2354 /* set PCMBAR */ 2355 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); 2356 } 2357 2358 snd_es1968_start_irq(chip); 2359 2360 /* restore ac97 state */ 2361 snd_ac97_resume(chip->ac97); 2362 2363 list_for_each_entry(es, &chip->substream_list, list) { 2364 switch (es->mode) { 2365 case ESM_MODE_PLAY: 2366 snd_es1968_playback_setup(chip, es, es->substream->runtime); 2367 break; 2368 case ESM_MODE_CAPTURE: 2369 snd_es1968_capture_setup(chip, es, es->substream->runtime); 2370 break; 2371 } 2372 } 2373 2374 /* start timer again */ 2375 if (chip->bobclient) 2376 snd_es1968_bob_start(chip); 2377 2378 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2379 chip->in_suspend = 0; 2380 return 0; 2381 } 2382 2383 static DEFINE_SIMPLE_DEV_PM_OPS(es1968_pm, es1968_suspend, es1968_resume); 2384 2385 #ifdef SUPPORT_JOYSTICK 2386 #define JOYSTICK_ADDR 0x200 2387 static int snd_es1968_create_gameport(struct es1968 *chip, int dev) 2388 { 2389 struct gameport *gp; 2390 struct resource *r; 2391 u16 val; 2392 2393 if (!joystick[dev]) 2394 return -ENODEV; 2395 2396 r = devm_request_region(&chip->pci->dev, JOYSTICK_ADDR, 8, 2397 "ES1968 gameport"); 2398 if (!r) 2399 return -EBUSY; 2400 2401 chip->gameport = gp = gameport_allocate_port(); 2402 if (!gp) { 2403 dev_err(chip->card->dev, 2404 "cannot allocate memory for gameport\n"); 2405 return -ENOMEM; 2406 } 2407 2408 pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val); 2409 pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04); 2410 2411 gameport_set_name(gp, "ES1968 Gameport"); 2412 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 2413 gameport_set_dev_parent(gp, &chip->pci->dev); 2414 gp->io = JOYSTICK_ADDR; 2415 2416 gameport_register_port(gp); 2417 2418 return 0; 2419 } 2420 2421 static void snd_es1968_free_gameport(struct es1968 *chip) 2422 { 2423 if (chip->gameport) { 2424 gameport_unregister_port(chip->gameport); 2425 chip->gameport = NULL; 2426 } 2427 } 2428 #else 2429 static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; } 2430 static inline void snd_es1968_free_gameport(struct es1968 *chip) { } 2431 #endif 2432 2433 #ifdef CONFIG_SND_ES1968_INPUT 2434 static int snd_es1968_input_register(struct es1968 *chip) 2435 { 2436 struct input_dev *input_dev; 2437 int err; 2438 2439 input_dev = devm_input_allocate_device(&chip->pci->dev); 2440 if (!input_dev) 2441 return -ENOMEM; 2442 2443 snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0", 2444 pci_name(chip->pci)); 2445 2446 input_dev->name = chip->card->driver; 2447 input_dev->phys = chip->phys; 2448 input_dev->id.bustype = BUS_PCI; 2449 input_dev->id.vendor = chip->pci->vendor; 2450 input_dev->id.product = chip->pci->device; 2451 input_dev->dev.parent = &chip->pci->dev; 2452 2453 __set_bit(EV_KEY, input_dev->evbit); 2454 __set_bit(KEY_MUTE, input_dev->keybit); 2455 __set_bit(KEY_VOLUMEDOWN, input_dev->keybit); 2456 __set_bit(KEY_VOLUMEUP, input_dev->keybit); 2457 2458 err = input_register_device(input_dev); 2459 if (err) 2460 return err; 2461 2462 chip->input_dev = input_dev; 2463 return 0; 2464 } 2465 #endif /* CONFIG_SND_ES1968_INPUT */ 2466 2467 #ifdef CONFIG_SND_ES1968_RADIO 2468 #define GPIO_DATA 0x60 2469 #define IO_MASK 4 /* mask register offset from GPIO_DATA 2470 bits 1=unmask write to given bit */ 2471 #define IO_DIR 8 /* direction register offset from GPIO_DATA 2472 bits 0/1=read/write direction */ 2473 2474 /* GPIO to TEA575x maps */ 2475 struct snd_es1968_tea575x_gpio { 2476 u8 data, clk, wren, most; 2477 char *name; 2478 }; 2479 2480 static const struct snd_es1968_tea575x_gpio snd_es1968_tea575x_gpios[] = { 2481 { .data = 6, .clk = 7, .wren = 8, .most = 9, .name = "SF64-PCE2" }, 2482 { .data = 7, .clk = 8, .wren = 6, .most = 10, .name = "M56VAP" }, 2483 }; 2484 2485 #define get_tea575x_gpio(chip) \ 2486 (&snd_es1968_tea575x_gpios[(chip)->tea575x_tuner]) 2487 2488 2489 static void snd_es1968_tea575x_set_pins(struct snd_tea575x *tea, u8 pins) 2490 { 2491 struct es1968 *chip = tea->private_data; 2492 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip); 2493 u16 val = 0; 2494 2495 val |= (pins & TEA575X_DATA) ? (1 << gpio.data) : 0; 2496 val |= (pins & TEA575X_CLK) ? (1 << gpio.clk) : 0; 2497 val |= (pins & TEA575X_WREN) ? (1 << gpio.wren) : 0; 2498 2499 outw(val, chip->io_port + GPIO_DATA); 2500 } 2501 2502 static u8 snd_es1968_tea575x_get_pins(struct snd_tea575x *tea) 2503 { 2504 struct es1968 *chip = tea->private_data; 2505 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip); 2506 u16 val = inw(chip->io_port + GPIO_DATA); 2507 u8 ret = 0; 2508 2509 if (val & (1 << gpio.data)) 2510 ret |= TEA575X_DATA; 2511 if (val & (1 << gpio.most)) 2512 ret |= TEA575X_MOST; 2513 2514 return ret; 2515 } 2516 2517 static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output) 2518 { 2519 struct es1968 *chip = tea->private_data; 2520 unsigned long io = chip->io_port + GPIO_DATA; 2521 u16 odir = inw(io + IO_DIR); 2522 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip); 2523 2524 if (output) { 2525 outw(~((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren)), 2526 io + IO_MASK); 2527 outw(odir | (1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren), 2528 io + IO_DIR); 2529 } else { 2530 outw(~((1 << gpio.clk) | (1 << gpio.wren) | (1 << gpio.data) | (1 << gpio.most)), 2531 io + IO_MASK); 2532 outw((odir & ~((1 << gpio.data) | (1 << gpio.most))) 2533 | (1 << gpio.clk) | (1 << gpio.wren), io + IO_DIR); 2534 } 2535 } 2536 2537 static const struct snd_tea575x_ops snd_es1968_tea_ops = { 2538 .set_pins = snd_es1968_tea575x_set_pins, 2539 .get_pins = snd_es1968_tea575x_get_pins, 2540 .set_direction = snd_es1968_tea575x_set_direction, 2541 }; 2542 #endif 2543 2544 static void snd_es1968_free(struct snd_card *card) 2545 { 2546 struct es1968 *chip = card->private_data; 2547 2548 cancel_work_sync(&chip->hwvol_work); 2549 2550 if (chip->io_port) { 2551 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ 2552 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */ 2553 } 2554 2555 #ifdef CONFIG_SND_ES1968_RADIO 2556 snd_tea575x_exit(&chip->tea); 2557 v4l2_device_unregister(&chip->v4l2_dev); 2558 #endif 2559 2560 snd_es1968_free_gameport(chip); 2561 } 2562 2563 struct ess_device_list { 2564 unsigned short type; /* chip type */ 2565 unsigned short vendor; /* subsystem vendor id */ 2566 }; 2567 2568 static const struct ess_device_list pm_allowlist[] = { 2569 { TYPE_MAESTRO2E, 0x0e11 }, /* Compaq Armada */ 2570 { TYPE_MAESTRO2E, 0x1028 }, 2571 { TYPE_MAESTRO2E, 0x103c }, 2572 { TYPE_MAESTRO2E, 0x1179 }, 2573 { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */ 2574 { TYPE_MAESTRO2E, 0x1558 }, 2575 { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */ 2576 { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */ 2577 }; 2578 2579 static const struct ess_device_list mpu_denylist[] = { 2580 { TYPE_MAESTRO2, 0x125d }, 2581 }; 2582 2583 static int snd_es1968_create(struct snd_card *card, 2584 struct pci_dev *pci, 2585 int total_bufsize, 2586 int play_streams, 2587 int capt_streams, 2588 int chip_type, 2589 int do_pm, 2590 int radio_nr) 2591 { 2592 struct es1968 *chip = card->private_data; 2593 int i, err; 2594 2595 /* enable PCI device */ 2596 err = pcim_enable_device(pci); 2597 if (err < 0) 2598 return err; 2599 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2600 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28))) { 2601 dev_err(card->dev, 2602 "architecture does not support 28bit PCI busmaster DMA\n"); 2603 return -ENXIO; 2604 } 2605 2606 /* Set Vars */ 2607 chip->type = chip_type; 2608 spin_lock_init(&chip->reg_lock); 2609 spin_lock_init(&chip->substream_lock); 2610 INIT_LIST_HEAD(&chip->buf_list); 2611 INIT_LIST_HEAD(&chip->substream_list); 2612 mutex_init(&chip->memory_mutex); 2613 INIT_WORK(&chip->hwvol_work, es1968_update_hw_volume); 2614 chip->card = card; 2615 chip->pci = pci; 2616 chip->irq = -1; 2617 chip->total_bufsize = total_bufsize; /* in bytes */ 2618 chip->playback_streams = play_streams; 2619 chip->capture_streams = capt_streams; 2620 2621 err = pcim_request_all_regions(pci, "ESS Maestro"); 2622 if (err < 0) 2623 return err; 2624 chip->io_port = pci_resource_start(pci, 0); 2625 if (devm_request_irq(&pci->dev, pci->irq, snd_es1968_interrupt, 2626 IRQF_SHARED, KBUILD_MODNAME, chip)) { 2627 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2628 return -EBUSY; 2629 } 2630 chip->irq = pci->irq; 2631 card->sync_irq = chip->irq; 2632 card->private_free = snd_es1968_free; 2633 2634 /* Clear Maestro_map */ 2635 for (i = 0; i < 32; i++) 2636 chip->maestro_map[i] = 0; 2637 2638 /* Clear Apu Map */ 2639 for (i = 0; i < NR_APUS; i++) 2640 chip->apu[i] = ESM_APU_FREE; 2641 2642 /* just to be sure */ 2643 pci_set_master(pci); 2644 2645 if (do_pm > 1) { 2646 /* disable power-management if not on the allowlist */ 2647 unsigned short vend; 2648 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend); 2649 for (i = 0; i < (int)ARRAY_SIZE(pm_allowlist); i++) { 2650 if (chip->type == pm_allowlist[i].type && 2651 vend == pm_allowlist[i].vendor) { 2652 do_pm = 1; 2653 break; 2654 } 2655 } 2656 if (do_pm > 1) { 2657 /* not matched; disabling pm */ 2658 dev_info(card->dev, "not attempting power management.\n"); 2659 do_pm = 0; 2660 } 2661 } 2662 chip->do_pm = do_pm; 2663 2664 snd_es1968_chip_init(chip); 2665 2666 #ifdef CONFIG_SND_ES1968_RADIO 2667 /* don't play with GPIOs on laptops */ 2668 if (chip->pci->subsystem_vendor != 0x125d) 2669 return 0; 2670 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev); 2671 if (err < 0) 2672 return err; 2673 chip->tea.v4l2_dev = &chip->v4l2_dev; 2674 chip->tea.private_data = chip; 2675 chip->tea.radio_nr = radio_nr; 2676 chip->tea.ops = &snd_es1968_tea_ops; 2677 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci)); 2678 for (i = 0; i < ARRAY_SIZE(snd_es1968_tea575x_gpios); i++) { 2679 chip->tea575x_tuner = i; 2680 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) { 2681 dev_info(card->dev, "detected TEA575x radio type %s\n", 2682 get_tea575x_gpio(chip)->name); 2683 strscpy(chip->tea.card, get_tea575x_gpio(chip)->name, 2684 sizeof(chip->tea.card)); 2685 break; 2686 } 2687 } 2688 #endif 2689 return 0; 2690 } 2691 2692 2693 /* 2694 */ 2695 static int __snd_es1968_probe(struct pci_dev *pci, 2696 const struct pci_device_id *pci_id) 2697 { 2698 static int dev; 2699 struct snd_card *card; 2700 struct es1968 *chip; 2701 unsigned int i; 2702 int err; 2703 2704 if (dev >= SNDRV_CARDS) 2705 return -ENODEV; 2706 if (!enable[dev]) { 2707 dev++; 2708 return -ENOENT; 2709 } 2710 2711 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2712 sizeof(*chip), &card); 2713 if (err < 0) 2714 return err; 2715 chip = card->private_data; 2716 2717 if (total_bufsize[dev] < 128) 2718 total_bufsize[dev] = 128; 2719 if (total_bufsize[dev] > 4096) 2720 total_bufsize[dev] = 4096; 2721 err = snd_es1968_create(card, pci, 2722 total_bufsize[dev] * 1024, /* in bytes */ 2723 pcm_substreams_p[dev], 2724 pcm_substreams_c[dev], 2725 pci_id->driver_data, 2726 use_pm[dev], 2727 radio_nr[dev]); 2728 if (err < 0) 2729 return err; 2730 2731 switch (chip->type) { 2732 case TYPE_MAESTRO2E: 2733 strscpy(card->driver, "ES1978"); 2734 strscpy(card->shortname, "ESS ES1978 (Maestro 2E)"); 2735 break; 2736 case TYPE_MAESTRO2: 2737 strscpy(card->driver, "ES1968"); 2738 strscpy(card->shortname, "ESS ES1968 (Maestro 2)"); 2739 break; 2740 case TYPE_MAESTRO: 2741 strscpy(card->driver, "ESM1"); 2742 strscpy(card->shortname, "ESS Maestro 1"); 2743 break; 2744 } 2745 2746 err = snd_es1968_pcm(chip, 0); 2747 if (err < 0) 2748 return err; 2749 2750 err = snd_es1968_mixer(chip); 2751 if (err < 0) 2752 return err; 2753 2754 if (enable_mpu[dev] == 2) { 2755 /* check the deny list */ 2756 unsigned short vend; 2757 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend); 2758 for (i = 0; i < ARRAY_SIZE(mpu_denylist); i++) { 2759 if (chip->type == mpu_denylist[i].type && 2760 vend == mpu_denylist[i].vendor) { 2761 enable_mpu[dev] = 0; 2762 break; 2763 } 2764 } 2765 } 2766 if (enable_mpu[dev]) { 2767 err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, 2768 chip->io_port + ESM_MPU401_PORT, 2769 MPU401_INFO_INTEGRATED | 2770 MPU401_INFO_IRQ_HOOK, 2771 -1, &chip->rmidi); 2772 if (err < 0) 2773 dev_warn(card->dev, "skipping MPU-401 MIDI support..\n"); 2774 } 2775 2776 snd_es1968_create_gameport(chip, dev); 2777 2778 #ifdef CONFIG_SND_ES1968_INPUT 2779 err = snd_es1968_input_register(chip); 2780 if (err) 2781 dev_warn(card->dev, 2782 "Input device registration failed with error %i", err); 2783 #endif 2784 2785 snd_es1968_start_irq(chip); 2786 2787 chip->clock = clock[dev]; 2788 if (! chip->clock) 2789 es1968_measure_clock(chip); 2790 2791 sprintf(card->longname, "%s at 0x%lx, irq %i", 2792 card->shortname, chip->io_port, chip->irq); 2793 2794 err = snd_card_register(card); 2795 if (err < 0) 2796 return err; 2797 pci_set_drvdata(pci, card); 2798 dev++; 2799 return 0; 2800 } 2801 2802 static int snd_es1968_probe(struct pci_dev *pci, 2803 const struct pci_device_id *pci_id) 2804 { 2805 return snd_card_free_on_error(&pci->dev, __snd_es1968_probe(pci, pci_id)); 2806 } 2807 2808 static struct pci_driver es1968_driver = { 2809 .name = KBUILD_MODNAME, 2810 .id_table = snd_es1968_ids, 2811 .probe = snd_es1968_probe, 2812 .driver = { 2813 .pm = &es1968_pm, 2814 }, 2815 }; 2816 2817 module_pci_driver(es1968_driver); 2818