1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * dwc3-google.c - Google DWC3 Specific Glue Layer 4 * 5 * Copyright (c) 2025, Google LLC 6 * Author: Roy Luo <royluo@google.com> 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/clk.h> 11 #include <linux/iopoll.h> 12 #include <linux/irq.h> 13 #include <linux/kernel.h> 14 #include <linux/mfd/syscon.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm_domain.h> 19 #include <linux/regmap.h> 20 #include <linux/reset.h> 21 #include "core.h" 22 #include "glue.h" 23 24 /* HOST CFG registers */ 25 #define HC_STATUS_OFFSET 0x0 26 #define HC_STATUS_CURRENT_POWER_STATE_U2PMU GENMASK(1, 0) 27 #define HC_STATUS_CURRENT_POWER_STATE_U3PMU GENMASK(4, 3) 28 29 #define HOST_CFG1_OFFSET 0x4 30 #define HOST_CFG1_PME_EN BIT(3) 31 #define HOST_CFG1_PM_POWER_STATE_REQUEST GENMASK(5, 4) 32 #define HOST_CFG1_PM_POWER_STATE_D0 0x0 33 #define HOST_CFG1_PM_POWER_STATE_D3 0x3 34 35 /* USBINT registers */ 36 #define USBINT_CFG1_OFFSET 0x0 37 #define USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK BIT(2) 38 #define USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK BIT(3) 39 #define USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN BIT(8) 40 #define USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN BIT(9) 41 #define USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR BIT(14) 42 #define USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR BIT(15) 43 44 #define USBINT_STATUS_OFFSET 0x4 45 #define USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW BIT(2) 46 #define USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW BIT(3) 47 48 #define USBCS_TOP_CTRL_CFG1_OFFSET 0xc 49 #define USBCS_TOP_CTRL_CFG1_USB2ONLY_MODE BIT(5) 50 51 #define DWC3_GOOGLE_MAX_RESETS 4 52 53 struct dwc3_google { 54 struct device *dev; 55 struct dwc3 dwc; 56 struct clk_bulk_data *clks; 57 int num_clks; 58 struct reset_control_bulk_data rsts[DWC3_GOOGLE_MAX_RESETS]; 59 int num_rsts; 60 struct reset_control *non_sticky_rst; 61 struct device *usb_psw_pd; 62 struct device_link *usb_psw_pd_dl; 63 struct notifier_block usb_psw_pd_nb; 64 struct device *usb_top_pd; 65 struct device_link *usb_top_pd_dl; 66 struct regmap *usb_cfg_regmap; 67 unsigned int host_cfg_offset; 68 unsigned int usbint_cfg_offset; 69 int hs_pme_irq; 70 int ss_pme_irq; 71 bool is_usb2only; 72 bool is_hibernation; 73 }; 74 75 #define to_dwc3_google(d) container_of_const((d), struct dwc3_google, dwc) 76 77 static int dwc3_google_rst_init(struct dwc3_google *google) 78 { 79 int ret; 80 81 google->num_rsts = 4; 82 google->rsts[0].id = "non_sticky"; 83 google->rsts[1].id = "sticky"; 84 google->rsts[2].id = "drd_bus"; 85 google->rsts[3].id = "top"; 86 87 ret = devm_reset_control_bulk_get_exclusive(google->dev, 88 google->num_rsts, 89 google->rsts); 90 91 if (ret < 0) 92 return ret; 93 94 google->non_sticky_rst = google->rsts[0].rstc; 95 96 return 0; 97 } 98 99 static int dwc3_google_set_pmu_state(struct dwc3_google *google, int state) 100 { 101 u32 reg; 102 int ret; 103 104 regmap_read(google->usb_cfg_regmap, 105 google->host_cfg_offset + HOST_CFG1_OFFSET, ®); 106 107 FIELD_MODIFY(HOST_CFG1_PM_POWER_STATE_REQUEST, ®, state); 108 reg |= HOST_CFG1_PME_EN; 109 regmap_write(google->usb_cfg_regmap, 110 google->host_cfg_offset + HOST_CFG1_OFFSET, reg); 111 112 ret = regmap_read_poll_timeout(google->usb_cfg_regmap, 113 google->host_cfg_offset + HC_STATUS_OFFSET, reg, 114 (FIELD_GET(HC_STATUS_CURRENT_POWER_STATE_U2PMU, 115 reg) == state && 116 FIELD_GET(HC_STATUS_CURRENT_POWER_STATE_U3PMU, 117 reg) == state), 118 10, 10000); 119 120 if (ret) 121 dev_err(google->dev, "failed to set PMU state %d\n", state); 122 123 return ret; 124 } 125 126 /* 127 * Clear pme interrupts and report their status. 128 * The hardware requires write-1 then write-0 sequence to clear the interrupt bits. 129 */ 130 static u32 dwc3_google_clear_pme_irqs(struct dwc3_google *google) 131 { 132 u32 irq_status, reg_set, reg_clear; 133 134 regmap_read(google->usb_cfg_regmap, 135 google->usbint_cfg_offset + USBINT_STATUS_OFFSET, &irq_status); 136 137 irq_status &= (USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW | 138 USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW); 139 if (!irq_status) 140 return irq_status; 141 142 regmap_read(google->usb_cfg_regmap, 143 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®_set); 144 145 reg_clear = reg_set; 146 if (irq_status & USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW) { 147 reg_set |= USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR; 148 reg_clear &= ~USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR; 149 } 150 if (irq_status & USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW) { 151 reg_set |= USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR; 152 reg_clear &= ~USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR; 153 } 154 155 regmap_write(google->usb_cfg_regmap, 156 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg_set); 157 regmap_write(google->usb_cfg_regmap, 158 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg_clear); 159 160 return irq_status; 161 } 162 163 static void dwc3_google_enable_pme_irq(struct dwc3_google *google) 164 { 165 u32 reg; 166 167 regmap_read(google->usb_cfg_regmap, 168 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®); 169 reg &= ~(USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK | 170 USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK); 171 reg |= (USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN | 172 USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN); 173 regmap_write(google->usb_cfg_regmap, 174 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg); 175 176 enable_irq(google->hs_pme_irq); 177 enable_irq(google->ss_pme_irq); 178 enable_irq_wake(google->hs_pme_irq); 179 enable_irq_wake(google->ss_pme_irq); 180 } 181 182 static void dwc3_google_disable_pme_irq(struct dwc3_google *google) 183 { 184 u32 reg; 185 186 regmap_read(google->usb_cfg_regmap, 187 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®); 188 reg &= ~(USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN | 189 USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN); 190 reg |= (USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK | 191 USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK); 192 regmap_write(google->usb_cfg_regmap, 193 google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg); 194 195 disable_irq_wake(google->hs_pme_irq); 196 disable_irq_wake(google->ss_pme_irq); 197 disable_irq_nosync(google->hs_pme_irq); 198 disable_irq_nosync(google->ss_pme_irq); 199 } 200 201 static irqreturn_t dwc3_google_resume_irq(int irq, void *data) 202 { 203 struct dwc3_google *google = data; 204 struct dwc3 *dwc = &google->dwc; 205 u32 irq_status, dr_role; 206 207 irq_status = dwc3_google_clear_pme_irqs(google); 208 dr_role = dwc->current_dr_role; 209 210 if (!irq_status || !google->is_hibernation || 211 dr_role != DWC3_GCTL_PRTCAP_HOST) { 212 dev_dbg(google->dev, "spurious pme irq %d, hibernation %d, dr_role %u\n", 213 irq, google->is_hibernation, dr_role); 214 return IRQ_HANDLED; 215 } 216 217 if (dwc->xhci) 218 pm_runtime_resume(&dwc->xhci->dev); 219 220 return IRQ_HANDLED; 221 } 222 223 static int dwc3_google_request_irq(struct dwc3_google *google, struct platform_device *pdev, 224 const char *irq_name, const char *req_name) 225 { 226 int ret; 227 int irq; 228 229 irq = platform_get_irq_byname(pdev, irq_name); 230 if (irq < 0) 231 return irq; 232 233 irq_set_status_flags(irq, IRQ_NOAUTOEN); 234 ret = devm_request_threaded_irq(google->dev, irq, NULL, 235 dwc3_google_resume_irq, 236 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 237 req_name, google); 238 if (ret < 0) 239 return ret; 240 241 return irq; 242 } 243 244 static int dwc3_google_usb_psw_pd_notifier(struct notifier_block *nb, unsigned long action, void *d) 245 { 246 struct dwc3_google *google = container_of(nb, struct dwc3_google, usb_psw_pd_nb); 247 int ret; 248 249 if (!google->is_hibernation) 250 return NOTIFY_OK; 251 252 if (action == GENPD_NOTIFY_OFF) { 253 dev_dbg(google->dev, "enter D3 power state\n"); 254 dwc3_google_set_pmu_state(google, HOST_CFG1_PM_POWER_STATE_D3); 255 ret = reset_control_assert(google->non_sticky_rst); 256 if (ret) 257 dev_err(google->dev, "non sticky reset assert failed: %d\n", ret); 258 } else if (action == GENPD_NOTIFY_ON) { 259 dev_dbg(google->dev, "enter D0 power state\n"); 260 dwc3_google_clear_pme_irqs(google); 261 ret = reset_control_deassert(google->non_sticky_rst); 262 if (ret) 263 dev_err(google->dev, "non sticky reset deassert failed: %d\n", ret); 264 dwc3_google_set_pmu_state(google, HOST_CFG1_PM_POWER_STATE_D0); 265 } 266 267 return NOTIFY_OK; 268 } 269 270 static void dwc3_google_pm_domain_deinit(struct dwc3_google *google) 271 { 272 if (google->usb_top_pd_dl) 273 device_link_del(google->usb_top_pd_dl); 274 275 if (!IS_ERR_OR_NULL(google->usb_top_pd)) { 276 device_set_wakeup_capable(google->usb_top_pd, false); 277 dev_pm_domain_detach(google->usb_top_pd, true); 278 } 279 280 if (google->usb_psw_pd_dl) 281 device_link_del(google->usb_psw_pd_dl); 282 283 if (!IS_ERR_OR_NULL(google->usb_psw_pd)) { 284 dev_pm_genpd_remove_notifier(google->usb_psw_pd); 285 dev_pm_domain_detach(google->usb_psw_pd, true); 286 } 287 } 288 289 static int dwc3_google_pm_domain_init(struct dwc3_google *google) 290 { 291 int ret; 292 293 /* 294 * Establish PM RUNTIME link between dwc dev and its power domain usb_psw_pd, 295 * register notifier block to handle hibernation. 296 */ 297 google->usb_psw_pd = dev_pm_domain_attach_by_name(google->dev, "psw"); 298 if (IS_ERR_OR_NULL(google->usb_psw_pd)) { 299 dev_err(google->dev, "failed to get psw pd"); 300 ret = google->usb_psw_pd ? PTR_ERR(google->usb_psw_pd) : -ENODATA; 301 return ret; 302 } 303 304 google->usb_psw_pd_nb.notifier_call = dwc3_google_usb_psw_pd_notifier; 305 ret = dev_pm_genpd_add_notifier(google->usb_psw_pd, &google->usb_psw_pd_nb); 306 if (ret) { 307 dev_err(google->dev, "failed to add psw pd notifier"); 308 goto err; 309 } 310 311 google->usb_psw_pd_dl = device_link_add(google->dev, google->usb_psw_pd, 312 DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME | 313 DL_FLAG_RPM_ACTIVE); 314 if (!google->usb_psw_pd_dl) { 315 dev_err(google->usb_psw_pd, "failed to add device link"); 316 ret = -ENODEV; 317 goto err; 318 } 319 320 /* 321 * usb_top_pd is the parent power domain of usb_psw_pd. Keeping usb_top_pd on 322 * while usb_psw_pd is off places the controller in a power-gated state, 323 * essential for hibernation. Acquire a handle to usb_top_pd and sets it as 324 * wakeup-capable to allow the domain to be left on during system suspend. 325 */ 326 google->usb_top_pd = dev_pm_domain_attach_by_name(google->dev, "top"); 327 if (IS_ERR_OR_NULL(google->usb_top_pd)) { 328 dev_err(google->dev, "failed to get top pd"); 329 ret = google->usb_top_pd ? PTR_ERR(google->usb_top_pd) : -ENODATA; 330 goto err; 331 } 332 device_set_wakeup_capable(google->usb_top_pd, true); 333 334 google->usb_top_pd_dl = device_link_add(google->dev, google->usb_top_pd, 335 DL_FLAG_STATELESS); 336 if (!google->usb_top_pd_dl) { 337 dev_err(google->usb_top_pd, "failed to add device link"); 338 ret = -ENODEV; 339 goto err; 340 } 341 342 return 0; 343 344 err: 345 dwc3_google_pm_domain_deinit(google); 346 347 return ret; 348 } 349 350 static void dwc3_google_program_usb2only(struct dwc3_google *google) 351 { 352 u32 reg; 353 354 regmap_read(google->usb_cfg_regmap, 355 google->usbint_cfg_offset + USBCS_TOP_CTRL_CFG1_OFFSET, ®); 356 reg |= USBCS_TOP_CTRL_CFG1_USB2ONLY_MODE; 357 regmap_write(google->usb_cfg_regmap, 358 google->usbint_cfg_offset + USBCS_TOP_CTRL_CFG1_OFFSET, reg); 359 } 360 361 static int dwc3_google_probe(struct platform_device *pdev) 362 { 363 struct dwc3_probe_data probe_data = {}; 364 struct device *dev = &pdev->dev; 365 struct dwc3_google *google; 366 struct resource *res; 367 int ret; 368 u32 args[2]; 369 370 google = devm_kzalloc(&pdev->dev, sizeof(*google), GFP_KERNEL); 371 if (!google) 372 return -ENOMEM; 373 374 google->dev = &pdev->dev; 375 376 ret = dwc3_google_pm_domain_init(google); 377 if (ret < 0) 378 return dev_err_probe(dev, ret, "failed to init pdom\n"); 379 380 google->usb_cfg_regmap = 381 syscon_regmap_lookup_by_phandle_args(dev->of_node, 382 "google,usb-cfg-csr", 383 ARRAY_SIZE(args), args); 384 if (IS_ERR(google->usb_cfg_regmap)) { 385 ret = dev_err_probe(dev, PTR_ERR(google->usb_cfg_regmap), 386 "invalid usb cfg csr\n"); 387 goto err_deinit_pdom; 388 } 389 390 google->host_cfg_offset = args[0]; 391 google->usbint_cfg_offset = args[1]; 392 393 if (device_property_match_string(dev, "phy-names", "usb3-phy") < 0) { 394 google->is_usb2only = true; 395 dwc3_google_program_usb2only(google); 396 } 397 398 ret = devm_clk_bulk_get_all_enabled(dev, &google->clks); 399 if (ret < 0) { 400 ret = dev_err_probe(dev, ret, "failed to get and enable clks\n"); 401 goto err_deinit_pdom; 402 } 403 google->num_clks = ret; 404 405 ret = dwc3_google_rst_init(google); 406 if (ret) { 407 ret = dev_err_probe(dev, ret, "failed to get resets\n"); 408 goto err_deinit_pdom; 409 } 410 411 ret = reset_control_bulk_deassert(google->num_rsts, google->rsts); 412 if (ret) { 413 ret = dev_err_probe(dev, ret, "failed to deassert rsts\n"); 414 goto err_deinit_pdom; 415 } 416 417 ret = dwc3_google_request_irq(google, pdev, "hs_pme", "USB HS wakeup"); 418 if (ret < 0) { 419 ret = dev_err_probe(dev, ret, "failed to request hs pme irq"); 420 goto err_reset_assert; 421 } 422 google->hs_pme_irq = ret; 423 424 ret = dwc3_google_request_irq(google, pdev, "ss_pme", "USB SS wakeup"); 425 if (ret < 0) { 426 ret = dev_err_probe(dev, ret, "failed to request ss pme irq"); 427 goto err_reset_assert; 428 } 429 google->ss_pme_irq = ret; 430 431 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 432 if (!res) { 433 ret = dev_err_probe(dev, -ENODEV, "invalid memory\n"); 434 goto err_reset_assert; 435 } 436 437 device_init_wakeup(dev, true); 438 439 google->dwc.dev = dev; 440 probe_data.dwc = &google->dwc; 441 probe_data.res = res; 442 probe_data.ignore_clocks_and_resets = true; 443 probe_data.properties = DWC3_DEFAULT_PROPERTIES; 444 ret = dwc3_core_probe(&probe_data); 445 if (ret) { 446 ret = dev_err_probe(dev, ret, "failed to register DWC3 Core\n"); 447 goto err_reset_assert; 448 } 449 450 return 0; 451 452 err_reset_assert: 453 reset_control_bulk_assert(google->num_rsts, google->rsts); 454 455 err_deinit_pdom: 456 dwc3_google_pm_domain_deinit(google); 457 458 return ret; 459 } 460 461 static void dwc3_google_remove(struct platform_device *pdev) 462 { 463 struct dwc3 *dwc = platform_get_drvdata(pdev); 464 struct dwc3_google *google = to_dwc3_google(dwc); 465 466 dwc3_core_remove(&google->dwc); 467 468 reset_control_bulk_assert(google->num_rsts, google->rsts); 469 470 dwc3_google_pm_domain_deinit(google); 471 } 472 473 static int dwc3_google_suspend(struct dwc3_google *google, pm_message_t msg) 474 { 475 if (pm_runtime_suspended(google->dev)) 476 return 0; 477 478 if (google->dwc.current_dr_role == DWC3_GCTL_PRTCAP_HOST) { 479 /* 480 * Follow dwc3_suspend_common() guidelines for deciding between 481 * a full teardown and hibernation. 482 */ 483 if (PMSG_IS_AUTO(msg) || device_may_wakeup(google->dev)) { 484 dev_dbg(google->dev, "enter hibernation"); 485 pm_runtime_get_sync(google->usb_top_pd); 486 device_wakeup_enable(google->usb_top_pd); 487 dwc3_google_enable_pme_irq(google); 488 google->is_hibernation = true; 489 return 0; 490 } 491 } 492 493 reset_control_bulk_assert(google->num_rsts, google->rsts); 494 clk_bulk_disable_unprepare(google->num_clks, google->clks); 495 496 return 0; 497 } 498 499 static int dwc3_google_resume(struct dwc3_google *google, pm_message_t msg) 500 { 501 int ret; 502 503 if (google->is_hibernation) { 504 dev_dbg(google->dev, "exit hibernation"); 505 dwc3_google_disable_pme_irq(google); 506 device_wakeup_disable(google->usb_top_pd); 507 pm_runtime_put_sync(google->usb_top_pd); 508 google->is_hibernation = false; 509 return 0; 510 } 511 512 if (google->is_usb2only) 513 dwc3_google_program_usb2only(google); 514 515 ret = clk_bulk_prepare_enable(google->num_clks, google->clks); 516 if (ret) 517 return ret; 518 519 ret = reset_control_bulk_deassert(google->num_rsts, google->rsts); 520 if (ret) { 521 clk_bulk_disable_unprepare(google->num_clks, google->clks); 522 return ret; 523 } 524 525 return 0; 526 } 527 528 static int dwc3_google_pm_suspend(struct device *dev) 529 { 530 struct dwc3 *dwc = dev_get_drvdata(dev); 531 struct dwc3_google *google = to_dwc3_google(dwc); 532 int ret; 533 534 ret = dwc3_pm_suspend(&google->dwc); 535 if (ret) 536 return ret; 537 538 return dwc3_google_suspend(google, PMSG_SUSPEND); 539 } 540 541 static int dwc3_google_pm_resume(struct device *dev) 542 { 543 struct dwc3 *dwc = dev_get_drvdata(dev); 544 struct dwc3_google *google = to_dwc3_google(dwc); 545 int ret; 546 547 ret = dwc3_google_resume(google, PMSG_RESUME); 548 if (ret) 549 return ret; 550 551 return dwc3_pm_resume(&google->dwc); 552 } 553 554 static void dwc3_google_complete(struct device *dev) 555 { 556 struct dwc3 *dwc = dev_get_drvdata(dev); 557 558 dwc3_pm_complete(dwc); 559 } 560 561 static int dwc3_google_prepare(struct device *dev) 562 { 563 struct dwc3 *dwc = dev_get_drvdata(dev); 564 565 return dwc3_pm_prepare(dwc); 566 } 567 568 static int dwc3_google_runtime_suspend(struct device *dev) 569 { 570 struct dwc3 *dwc = dev_get_drvdata(dev); 571 struct dwc3_google *google = to_dwc3_google(dwc); 572 int ret; 573 574 ret = dwc3_runtime_suspend(&google->dwc); 575 if (ret) 576 return ret; 577 578 return dwc3_google_suspend(google, PMSG_AUTO_SUSPEND); 579 } 580 581 static int dwc3_google_runtime_resume(struct device *dev) 582 { 583 struct dwc3 *dwc = dev_get_drvdata(dev); 584 struct dwc3_google *google = to_dwc3_google(dwc); 585 int ret; 586 587 ret = dwc3_google_resume(google, PMSG_AUTO_RESUME); 588 if (ret) 589 return ret; 590 591 return dwc3_runtime_resume(&google->dwc); 592 } 593 594 static int dwc3_google_runtime_idle(struct device *dev) 595 { 596 return dwc3_runtime_idle(dev_get_drvdata(dev)); 597 } 598 599 static const struct dev_pm_ops dwc3_google_dev_pm_ops = { 600 SYSTEM_SLEEP_PM_OPS(dwc3_google_pm_suspend, dwc3_google_pm_resume) 601 RUNTIME_PM_OPS(dwc3_google_runtime_suspend, dwc3_google_runtime_resume, 602 dwc3_google_runtime_idle) 603 .complete = pm_sleep_ptr(dwc3_google_complete), 604 .prepare = pm_sleep_ptr(dwc3_google_prepare), 605 }; 606 607 static const struct of_device_id dwc3_google_of_match[] = { 608 { .compatible = "google,lga-dwc3" }, 609 { } 610 }; 611 MODULE_DEVICE_TABLE(of, dwc3_google_of_match); 612 613 static struct platform_driver dwc3_google_driver = { 614 .probe = dwc3_google_probe, 615 .remove = dwc3_google_remove, 616 .driver = { 617 .name = "dwc3-google", 618 .pm = pm_ptr(&dwc3_google_dev_pm_ops), 619 .of_match_table = dwc3_google_of_match, 620 }, 621 }; 622 623 module_platform_driver(dwc3_google_driver); 624 MODULE_LICENSE("GPL"); 625 MODULE_DESCRIPTION("DesignWare DWC3 Google Glue Driver"); 626