xref: /linux/drivers/phy/starfive/phy-jh7110-usb.c (revision 21eeefe76919c904dd50d543bd6d3eee05d97e15)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * StarFive JH7110 USB 2.0 PHY driver
4  *
5  * Copyright (C) 2023 StarFive Technology Co., Ltd.
6  * Author: Minda Chen <minda.chen@starfivetech.com>
7  */
8 
9 #include <linux/bits.h>
10 #include <linux/clk.h>
11 #include <linux/err.h>
12 #include <linux/io.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/module.h>
15 #include <linux/phy/phy.h>
16 #include <linux/platform_device.h>
17 #include <linux/regmap.h>
18 #include <linux/usb/of.h>
19 
20 #define USB_125M_CLK_RATE		125000000
21 #define USB_CLK_MODE_OFF		0x0
22 #define USB_CLK_MODE_RX_NORMAL_PWR	BIT(1)
23 #define USB_LS_KEEPALIVE_OFF		0x4
24 #define USB_LS_KEEPALIVE_ENABLE		BIT(4)
25 
26 #define USB_PDRSTN_SPLIT		BIT(17)
27 #define SYSCON_USB_SPLIT_OFFSET		0x18
28 
29 struct jh7110_usb2_phy {
30 	struct phy *phy;
31 	void __iomem *regs;
32 	struct regmap *sys_syscon;
33 	struct clk *usb_125m_clk;
34 	struct clk *app_125m;
35 	enum phy_mode mode;
36 };
37 
usb2_set_ls_keepalive(struct jh7110_usb2_phy * phy,bool set)38 static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
39 {
40 	unsigned int val;
41 
42 	/* Host mode enable the LS speed keep-alive signal */
43 	val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
44 	if (set)
45 		val |= USB_LS_KEEPALIVE_ENABLE;
46 	else
47 		val &= ~USB_LS_KEEPALIVE_ENABLE;
48 
49 	writel(val, phy->regs + USB_LS_KEEPALIVE_OFF);
50 }
51 
usb2_phy_set_mode(struct phy * _phy,enum phy_mode mode,int submode)52 static int usb2_phy_set_mode(struct phy *_phy,
53 			     enum phy_mode mode, int submode)
54 {
55 	struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
56 
57 	switch (mode) {
58 	case PHY_MODE_USB_HOST:
59 	case PHY_MODE_USB_DEVICE:
60 	case PHY_MODE_USB_OTG:
61 		break;
62 	default:
63 		return -EINVAL;
64 	}
65 
66 	if (mode != phy->mode) {
67 		dev_dbg(&_phy->dev, "Changing phy to %d\n", mode);
68 		phy->mode = mode;
69 		usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
70 	}
71 
72 	/* Connect usb 2.0 phy mode */
73 	regmap_update_bits(phy->sys_syscon, SYSCON_USB_SPLIT_OFFSET,
74 			   USB_PDRSTN_SPLIT, USB_PDRSTN_SPLIT);
75 
76 	return 0;
77 }
78 
jh7110_usb2_phy_init(struct phy * _phy)79 static int jh7110_usb2_phy_init(struct phy *_phy)
80 {
81 	struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
82 	int ret;
83 	unsigned int val;
84 
85 	ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE);
86 	if (ret)
87 		return ret;
88 
89 	ret = clk_prepare_enable(phy->app_125m);
90 	if (ret)
91 		return ret;
92 
93 	val = readl(phy->regs + USB_CLK_MODE_OFF);
94 	val |= USB_CLK_MODE_RX_NORMAL_PWR;
95 	writel(val, phy->regs + USB_CLK_MODE_OFF);
96 
97 	return 0;
98 }
99 
jh7110_usb2_phy_exit(struct phy * _phy)100 static int jh7110_usb2_phy_exit(struct phy *_phy)
101 {
102 	struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
103 
104 	clk_disable_unprepare(phy->app_125m);
105 
106 	return 0;
107 }
108 
109 static const struct phy_ops jh7110_usb2_phy_ops = {
110 	.init		= jh7110_usb2_phy_init,
111 	.exit		= jh7110_usb2_phy_exit,
112 	.set_mode	= usb2_phy_set_mode,
113 	.owner		= THIS_MODULE,
114 };
115 
jh7110_usb_phy_probe(struct platform_device * pdev)116 static int jh7110_usb_phy_probe(struct platform_device *pdev)
117 {
118 	struct jh7110_usb2_phy *phy;
119 	struct device *dev = &pdev->dev;
120 	struct phy_provider *phy_provider;
121 
122 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
123 	if (!phy)
124 		return -ENOMEM;
125 
126 	phy->usb_125m_clk = devm_clk_get(dev, "125m");
127 	if (IS_ERR(phy->usb_125m_clk))
128 		return dev_err_probe(dev, PTR_ERR(phy->usb_125m_clk),
129 			"Failed to get 125m clock\n");
130 
131 	phy->app_125m = devm_clk_get(dev, "app_125m");
132 	if (IS_ERR(phy->app_125m))
133 		return dev_err_probe(dev, PTR_ERR(phy->app_125m),
134 			"Failed to get app 125m clock\n");
135 
136 	phy->regs = devm_platform_ioremap_resource(pdev, 0);
137 	if (IS_ERR(phy->regs))
138 		return dev_err_probe(dev, PTR_ERR(phy->regs),
139 			"Failed to map phy base\n");
140 
141 	phy->phy = devm_phy_create(dev, NULL, &jh7110_usb2_phy_ops);
142 	if (IS_ERR(phy->phy))
143 		return dev_err_probe(dev, PTR_ERR(phy->phy),
144 			"Failed to create phy\n");
145 
146 	phy_set_drvdata(phy->phy, phy);
147 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
148 
149 	phy->sys_syscon =
150 		syscon_regmap_lookup_by_compatible("starfive,jh7110-sys-syscon");
151 	if (IS_ERR(phy->sys_syscon))
152 		return dev_err_probe(dev, PTR_ERR(phy->sys_syscon),
153 				     "Failed to get sys-syscon\n");
154 
155 	return PTR_ERR_OR_ZERO(phy_provider);
156 }
157 
158 static const struct of_device_id jh7110_usb_phy_of_match[] = {
159 	{ .compatible = "starfive,jh7110-usb-phy" },
160 	{ /* sentinel */ },
161 };
162 MODULE_DEVICE_TABLE(of, jh7110_usb_phy_of_match);
163 
164 static struct platform_driver jh7110_usb_phy_driver = {
165 	.probe	= jh7110_usb_phy_probe,
166 	.driver = {
167 		.of_match_table	= jh7110_usb_phy_of_match,
168 		.name  = "jh7110-usb-phy",
169 	}
170 };
171 module_platform_driver(jh7110_usb_phy_driver);
172 
173 MODULE_DESCRIPTION("StarFive JH7110 USB 2.0 PHY driver");
174 MODULE_AUTHOR("Minda Chen <minda.chen@starfivetech.com>");
175 MODULE_LICENSE("GPL");
176