1 /******************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
3
4 Copyright (c) 2001-2020, Intel Corporation
5 All rights reserved.
6
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
9
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12
13 2. Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
15 documentation and/or other materials provided with the distribution.
16
17 3. Neither the name of the Intel Corporation nor the names of its
18 contributors may be used to endorse or promote products derived from
19 this software without specific prior written permission.
20
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32
33 ******************************************************************************/
34
35
36 #include "ixgbe.h"
37
38 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
39 #define IXGBE_VFREAD_REG IXGBE_READ_REG
40
41 /**
42 * ixgbe_init_ops_vf - Initialize the pointers for vf
43 * @hw: pointer to hardware structure
44 *
45 * This will assign function pointers, adapter-specific functions can
46 * override the assignment of generic function pointers by assigning
47 * their own adapter-specific function pointers.
48 * Does not touch the hardware.
49 **/
ixgbe_init_ops_vf(struct ixgbe_hw * hw)50 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
51 {
52 u16 i;
53
54 /* MAC */
55 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
56 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
57 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
58 /* Cannot clear stats on VF */
59 hw->mac.ops.clear_hw_cntrs = NULL;
60 hw->mac.ops.get_media_type = NULL;
61 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
62 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
63 hw->mac.ops.get_bus_info = NULL;
64 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
65
66 /* Link */
67 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
68 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
69 hw->mac.ops.get_link_capabilities = NULL;
70
71 /* RAR, Multicast, VLAN */
72 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
73 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
74 hw->mac.ops.init_rx_addrs = NULL;
75 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
76 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
77 hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;
78 hw->mac.ops.enable_mc = NULL;
79 hw->mac.ops.disable_mc = NULL;
80 hw->mac.ops.clear_vfta = NULL;
81 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
82 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
83
84 hw->mac.max_tx_queues = 1;
85 hw->mac.max_rx_queues = 1;
86
87 for (i = 0; i < 64; i++)
88 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf;
89
90 return IXGBE_SUCCESS;
91 }
92
93 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
94 * @hw: pointer to hardware structure
95 */
ixgbe_virt_clr_reg(struct ixgbe_hw * hw)96 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
97 {
98 int i;
99 u32 vfsrrctl;
100 u32 vfdca_rxctrl;
101 u32 vfdca_txctrl;
102
103 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
104 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
105 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
106
107 /* DCA_RXCTRL default value */
108 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
109 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
110 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
111
112 /* DCA_TXCTRL default value */
113 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
114 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
115 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
116
117 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
118
119 for (i = 0; i < 8; i++) {
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
123 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
131 }
132
133 IXGBE_WRITE_FLUSH(hw);
134 }
135
136 /**
137 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
138 * @hw: pointer to hardware structure
139 *
140 * Starts the hardware by filling the bus info structure and media type, clears
141 * all on chip counters, initializes receive address registers, multicast
142 * table, VLAN filter table, calls routine to set up link and flow control
143 * settings, and leaves transmit and receive units disabled and uninitialized
144 **/
ixgbe_start_hw_vf(struct ixgbe_hw * hw)145 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
146 {
147 /* Clear adapter stopped flag */
148 hw->adapter_stopped = false;
149
150 return IXGBE_SUCCESS;
151 }
152
153 /**
154 * ixgbe_init_hw_vf - virtual function hardware initialization
155 * @hw: pointer to hardware structure
156 *
157 * Initialize the hardware by resetting the hardware and then starting
158 * the hardware
159 **/
ixgbe_init_hw_vf(struct ixgbe_hw * hw)160 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
161 {
162 s32 status = hw->mac.ops.start_hw(hw);
163
164 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
165
166 return status;
167 }
168
169 /**
170 * ixgbe_reset_hw_vf - Performs hardware reset
171 * @hw: pointer to hardware structure
172 *
173 * Resets the hardware by resetting the transmit and receive units, masks and
174 * clears all interrupts.
175 **/
ixgbe_reset_hw_vf(struct ixgbe_hw * hw)176 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
177 {
178 struct ixgbe_mbx_info *mbx = &hw->mbx;
179 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
180 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
181 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
182 u8 *addr = (u8 *)(&msgbuf[1]);
183
184 DEBUGFUNC("ixgbevf_reset_hw_vf");
185
186 /* Call adapter stop to disable tx/rx and clear interrupts */
187 hw->mac.ops.stop_adapter(hw);
188
189 /* reset the api version */
190 hw->api_version = ixgbe_mbox_api_10;
191 ixgbe_init_mbx_params_vf(hw);
192
193 DEBUGOUT("Issuing a function level reset to MAC\n");
194
195 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
196 IXGBE_WRITE_FLUSH(hw);
197
198 msec_delay(50);
199
200 /* we cannot reset while the RSTI / RSTD bits are asserted */
201 while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) {
202 timeout--;
203 usec_delay(5);
204 }
205
206 if (!timeout)
207 return IXGBE_ERR_RESET_FAILED;
208
209 /* Reset VF registers to initial values */
210 ixgbe_virt_clr_reg(hw);
211
212 /*
213 * Some devices do not clear VFMAILBOX.VFU on VFLR. Drop stale
214 * ownership and cached read-to-clear status.
215 */
216 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, 0);
217 hw->mbx.vf_mailbox = 0;
218
219 /* mailbox timeout can now become active */
220 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
221
222 msgbuf[0] = IXGBE_VF_RESET;
223 ixgbe_write_mbx(hw, msgbuf, 1, 0);
224
225 msec_delay(10);
226
227 /*
228 * set our "perm_addr" based on info provided by PF
229 * also set up the mc_filter_type which is piggy backed
230 * on the mac address in word 3
231 */
232 ret_val = ixgbe_poll_mbx(hw, msgbuf,
233 IXGBE_VF_PERMADDR_MSG_LEN, 0);
234 if (ret_val)
235 return ret_val;
236
237 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) &&
238 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE))
239 return IXGBE_ERR_INVALID_MAC_ADDR;
240
241 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS))
242 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
243
244 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
245
246 return ret_val;
247 }
248
249 /**
250 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
251 * @hw: pointer to hardware structure
252 *
253 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
254 * disables transmit and receive units. The adapter_stopped flag is used by
255 * the shared code and drivers to determine if the adapter is in a stopped
256 * state and should not touch the hardware.
257 **/
ixgbe_stop_adapter_vf(struct ixgbe_hw * hw)258 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
259 {
260 u32 reg_val;
261 u16 i;
262
263 /*
264 * Set the adapter_stopped flag so other driver functions stop touching
265 * the hardware
266 */
267 hw->adapter_stopped = true;
268
269 /* Clear interrupt mask to stop from interrupts being generated */
270 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
271
272 /* Clear any pending interrupts, flush previous writes */
273 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
274
275 /* Disable the transmit unit. Each queue must be disabled. */
276 for (i = 0; i < hw->mac.max_tx_queues; i++)
277 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
278
279 /* Disable the receive unit by stopping each queue */
280 for (i = 0; i < hw->mac.max_rx_queues; i++) {
281 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
282 reg_val &= ~IXGBE_RXDCTL_ENABLE;
283 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
284 }
285 /* Clear packet split and pool config */
286 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
287
288 /* flush all queues disables */
289 IXGBE_WRITE_FLUSH(hw);
290 msec_delay(2);
291
292 return IXGBE_SUCCESS;
293 }
294
295 /**
296 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
297 * @hw: pointer to hardware structure
298 * @mc_addr: the multicast address
299 *
300 * Extracts the 12 bits, from a multicast address, to determine which
301 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
302 * incoming rx multicast addresses, to determine the bit-vector to check in
303 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
304 * by the MO field of the MCSTCTRL. The MO field is set during initialization
305 * to mc_filter_type.
306 **/
ixgbe_mta_vector(struct ixgbe_hw * hw,u8 * mc_addr)307 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
308 {
309 u32 vector = 0;
310
311 switch (hw->mac.mc_filter_type) {
312 case 0: /* use bits [47:36] of the address */
313 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
314 break;
315 case 1: /* use bits [46:35] of the address */
316 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
317 break;
318 case 2: /* use bits [45:34] of the address */
319 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
320 break;
321 case 3: /* use bits [43:32] of the address */
322 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
323 break;
324 default: /* Invalid mc_filter_type */
325 DEBUGOUT("MC filter type param set incorrectly\n");
326 ASSERT(0);
327 break;
328 }
329
330 /* vector can only be 12-bits or boundary will be exceeded */
331 vector &= 0xFFF;
332 return vector;
333 }
334
ixgbevf_write_msg_read_ack(struct ixgbe_hw * hw,u32 * msg,u32 * retmsg,u16 size)335 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
336 u32 *retmsg, u16 size)
337 {
338 s32 retval = ixgbe_write_mbx(hw, msg, size, 0);
339
340 if (retval)
341 return retval;
342
343 return ixgbe_poll_mbx(hw, retmsg, size, 0);
344 }
345
346 /**
347 * ixgbe_set_rar_vf - set device MAC address
348 * @hw: pointer to hardware structure
349 * @index: Receive address register to write
350 * @addr: Address to put into receive address register
351 * @vmdq: VMDq "set" or "pool" index
352 * @enable_addr: set flag that address is active
353 **/
ixgbe_set_rar_vf(struct ixgbe_hw * hw,u32 index,u8 * addr,u32 vmdq,u32 enable_addr)354 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
355 u32 enable_addr)
356 {
357 u32 msgbuf[3];
358 u8 *msg_addr = (u8 *)(&msgbuf[1]);
359 s32 ret_val;
360 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
361
362 memset(msgbuf, 0, 12);
363 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
364 memcpy(msg_addr, addr, 6);
365 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
366
367 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
368
369 /* if we had failure, the address was rejected, use "perm_addr" */
370 if (!ret_val &&
371 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) {
372 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
373 return IXGBE_ERR_MBX;
374 }
375
376 return ret_val;
377 }
378
379 /**
380 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
381 * @hw: pointer to the HW structure
382 * @mc_addr_list: array of multicast addresses to program
383 * @mc_addr_count: number of multicast addresses to program
384 * @next: caller supplied function to return next address in list
385 * @clear: unused
386 *
387 * Updates the Multicast Table Array.
388 **/
ixgbe_update_mc_addr_list_vf(struct ixgbe_hw * hw,u8 * mc_addr_list,u32 mc_addr_count,ixgbe_mc_addr_itr next,bool clear)389 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
390 u32 mc_addr_count, ixgbe_mc_addr_itr next,
391 bool clear)
392 {
393 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
394 u16 *vector_list = (u16 *)&msgbuf[1];
395 u32 vector;
396 u32 cnt, i;
397 u32 vmdq;
398
399 UNREFERENCED_1PARAMETER(clear);
400
401 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
402
403 /* Each entry in the list uses 1 16 bit word. We have 30
404 * 16 bit words available in our HW msg buffer (minus 1 for the
405 * msg type). That's 30 hash values if we pack 'em right. If
406 * there are more than 30 MC addresses to add then punt the
407 * extras for now and then add code to handle more than 30 later.
408 * It would be unusual for a server to request that many multi-cast
409 * addresses except for in large enterprise network environments.
410 */
411
412 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
413
414 cnt = min(mc_addr_count, IXGBE_MAX_VF_MC);
415 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
416 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
417
418 for (i = 0; i < cnt; i++) {
419 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
420 DEBUGOUT1("Hash value = 0x%03X\n", vector);
421 vector_list[i] = (u16)vector;
422 }
423
424 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE);
425 }
426
427 /**
428 * ixgbevf_update_xcast_mode - Update Multicast mode
429 * @hw: pointer to the HW structure
430 * @xcast_mode: new multicast mode
431 *
432 * Updates the Multicast Mode of VF.
433 **/
ixgbevf_update_xcast_mode(struct ixgbe_hw * hw,int xcast_mode)434 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
435 {
436 u32 msgbuf[2];
437 s32 err;
438
439 switch (hw->api_version) {
440 case ixgbe_mbox_api_12:
441 /* New modes were introduced in 1.3 version */
442 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
443 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
444 /* Fall through */
445 case ixgbe_mbox_api_13:
446 case ixgbe_mbox_api_15:
447 case ixgbe_mbox_api_16:
448 break;
449 default:
450 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
451 }
452
453 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
454 msgbuf[1] = xcast_mode;
455
456 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
457 if (err)
458 return err;
459
460 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
461 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE))
462 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
463 return IXGBE_SUCCESS;
464 }
465
466 /**
467 * ixgbe_get_link_state_vf - Get VF link state from PF
468 * @hw: pointer to the HW structure
469 * @link_state: link state storage
470 *
471 * Returns state of the operation error or success.
472 **/
ixgbe_get_link_state_vf(struct ixgbe_hw * hw,bool * link_state)473 s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)
474 {
475 u32 msgbuf[2];
476 s32 err;
477 s32 ret_val;
478
479 msgbuf[0] = IXGBE_VF_GET_LINK_STATE;
480 msgbuf[1] = 0x0;
481
482 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
483
484 if (err || (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) {
485 ret_val = IXGBE_ERR_MBX;
486 } else {
487 ret_val = IXGBE_SUCCESS;
488 *link_state = msgbuf[1];
489 }
490
491 return ret_val;
492 }
493
494 /**
495 * ixgbevf_get_pf_link_state - Get PF's link status
496 * @hw: pointer to the HW structure
497 * @speed: link speed
498 * @link_up: indicate if link is up/down
499 *
500 * Ask PF to provide link_up state and speed of the link.
501 *
502 * Return: IXGBE_ERR_MBX in the case of mailbox error,
503 * IXGBE_ERR_FEATURE_NOT_SUPPORTED if the op is not supported or 0 on success.
504 */
ixgbevf_get_pf_link_state(struct ixgbe_hw * hw,ixgbe_link_speed * speed,bool * link_up)505 int ixgbevf_get_pf_link_state(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
506 bool *link_up)
507 {
508 u32 msgbuf[3] = {};
509 int err;
510
511 if (hw->api_version != ixgbe_mbox_api_16)
512 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
513
514 msgbuf[0] = IXGBE_VF_GET_PF_LINK_STATE;
515 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
516 if (err)
517 return (err);
518 if (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE) {
519 *speed = IXGBE_LINK_SPEED_UNKNOWN;
520 return (IXGBE_ERR_MBX);
521 }
522 if ((msgbuf[0] & IXGBE_VT_MSGTYPE_CTS) == 0 ||
523 (msgbuf[0] & ~IXGBE_VT_MSGTYPE_CTS) !=
524 (IXGBE_VF_GET_PF_LINK_STATE | IXGBE_VT_MSGTYPE_SUCCESS)) {
525 *speed = IXGBE_LINK_SPEED_UNKNOWN;
526 return (IXGBE_ERR_MBX);
527 }
528
529 *speed = msgbuf[1];
530 *link_up = msgbuf[2];
531
532 return err;
533 }
534
535 /**
536 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
537 * @hw: pointer to the HW structure
538 * @vlan: 12 bit VLAN ID
539 * @vind: unused by VF drivers
540 * @vlan_on: if true then set bit, else clear bit
541 * @vlvf_bypass: boolean flag indicating updating default pool is okay
542 *
543 * Turn on/off specified VLAN in the VLAN filter table.
544 **/
ixgbe_set_vfta_vf(struct ixgbe_hw * hw,u32 vlan,u32 vind,bool vlan_on,bool vlvf_bypass)545 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
546 bool vlan_on, bool vlvf_bypass)
547 {
548 u32 msgbuf[2];
549 s32 ret_val;
550 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
551
552 msgbuf[0] = IXGBE_VF_SET_VLAN;
553 msgbuf[1] = vlan;
554 /* Setting the 8 bit field MSG INFO to true indicates "add" */
555 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
556
557 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
558 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS))
559 return IXGBE_SUCCESS;
560
561 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE);
562 }
563
564 /**
565 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
566 * @hw: pointer to hardware structure
567 *
568 * Returns the number of transmit queues for the given adapter.
569 **/
ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw * hw)570 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
571 {
572 UNREFERENCED_1PARAMETER(hw);
573 return IXGBE_VF_MAX_TX_QUEUES;
574 }
575
576 /**
577 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
578 * @hw: pointer to hardware structure
579 *
580 * Returns the number of receive queues for the given adapter.
581 **/
ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw * hw)582 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
583 {
584 UNREFERENCED_1PARAMETER(hw);
585 return IXGBE_VF_MAX_RX_QUEUES;
586 }
587
588 /**
589 * ixgbe_get_mac_addr_vf - Read device MAC address
590 * @hw: pointer to the HW structure
591 * @mac_addr: the MAC address
592 **/
ixgbe_get_mac_addr_vf(struct ixgbe_hw * hw,u8 * mac_addr)593 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
594 {
595 int i;
596
597 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
598 mac_addr[i] = hw->mac.perm_addr[i];
599
600 return IXGBE_SUCCESS;
601 }
602
ixgbevf_set_uc_addr_vf(struct ixgbe_hw * hw,u32 index,u8 * addr)603 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
604 {
605 u32 msgbuf[3], msgbuf_chk;
606 u8 *msg_addr = (u8 *)(&msgbuf[1]);
607 s32 ret_val;
608
609 memset(msgbuf, 0, sizeof(msgbuf));
610 /*
611 * If index is one then this is the start of a new list and needs
612 * indication to the PF so it can do it's own list management.
613 * If it is zero then that tells the PF to just clear all of
614 * this VF's macvlans and there is no new list.
615 */
616 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
617 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
618 msgbuf_chk = msgbuf[0];
619 if (addr)
620 memcpy(msg_addr, addr, 6);
621
622 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
623 if (!ret_val) {
624 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
625
626 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE))
627 return IXGBE_ERR_OUT_OF_MEM;
628 }
629
630 return ret_val;
631 }
632
633 /**
634 * ixgbe_setup_mac_link_vf - Setup MAC link settings
635 * @hw: pointer to hardware structure
636 * @speed: new link speed
637 * @autoneg_wait_to_complete: true when waiting for completion is needed
638 *
639 * Set the link speed in the AUTOC register and restarts link.
640 **/
ixgbe_setup_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed speed,bool autoneg_wait_to_complete)641 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
642 bool autoneg_wait_to_complete)
643 {
644 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
645 return IXGBE_SUCCESS;
646 }
647
648 /**
649 * ixgbe_check_mac_link_vf - Get link/speed status
650 * @hw: pointer to hardware structure
651 * @speed: pointer to link speed
652 * @link_up: true is link is up, false otherwise
653 * @autoneg_wait_to_complete: true when waiting for completion is needed
654 *
655 * Reads the links register to determine if link is up and the current speed
656 **/
ixgbe_check_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed * speed,bool * link_up,bool autoneg_wait_to_complete)657 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
658 bool *link_up, bool autoneg_wait_to_complete)
659 {
660 struct ixgbe_mbx_info *mbx = &hw->mbx;
661 struct ixgbe_mac_info *mac = &hw->mac;
662 s32 ret_val = IXGBE_SUCCESS;
663 u32 in_msg = 0;
664 u32 links_reg;
665
666 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
667
668 if (link_up == NULL)
669 return (IXGBE_ERR_PARAM);
670
671 /* If we were hit with a reset drop the link */
672 if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout)
673 mac->get_link_status = true;
674
675 if (!mac->get_link_status)
676 goto out;
677 if (mac->type == ixgbe_mac_E610_vf &&
678 hw->api_version == ixgbe_mbox_api_16) {
679 ret_val = ixgbevf_get_pf_link_state(hw, speed, link_up);
680 if (ret_val == IXGBE_ERR_MBX) {
681 /* A PF NACK means the VF has lost clear-to-send state. */
682 *link_up = false;
683 return (ret_val);
684 } else if (ret_val != IXGBE_SUCCESS) {
685 /* Let the driver debounce transient transport failures. */
686 return (ret_val);
687 }
688 mac->get_link_status = !*link_up;
689 return (IXGBE_SUCCESS);
690 }
691
692 /* if link status is down no point in checking to see if pf is up */
693 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
694 if (!(links_reg & IXGBE_LINKS_UP))
695 goto out;
696
697 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
698 * before the link status is correct
699 */
700 if (mac->type == ixgbe_mac_82599_vf) {
701 int i;
702
703 for (i = 0; i < 5; i++) {
704 usec_delay(100);
705 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
706
707 if (!(links_reg & IXGBE_LINKS_UP))
708 goto out;
709 }
710 }
711
712 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
713 case IXGBE_LINKS_SPEED_10G_82599:
714 *speed = IXGBE_LINK_SPEED_10GB_FULL;
715 if (hw->mac.type >= ixgbe_mac_X550_vf) {
716 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
717 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
718 }
719 break;
720 case IXGBE_LINKS_SPEED_1G_82599:
721 *speed = IXGBE_LINK_SPEED_1GB_FULL;
722 break;
723 case IXGBE_LINKS_SPEED_100_82599:
724 *speed = IXGBE_LINK_SPEED_100_FULL;
725 if (hw->mac.type == ixgbe_mac_X550_vf ||
726 hw->mac.type == ixgbe_mac_E610_vf) {
727 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
728 *speed = IXGBE_LINK_SPEED_5GB_FULL;
729 }
730 break;
731 case IXGBE_LINKS_SPEED_10_X550EM_A:
732 *speed = IXGBE_LINK_SPEED_UNKNOWN;
733 /* Since Reserved in older MAC's */
734 if (hw->mac.type >= ixgbe_mac_X550_vf)
735 *speed = IXGBE_LINK_SPEED_10_FULL;
736 break;
737 default:
738 *speed = IXGBE_LINK_SPEED_UNKNOWN;
739 }
740
741 /* if the read failed it could just be a mailbox collision, best wait
742 * until we are called again and don't report an error
743 */
744 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) {
745 if (hw->api_version >= ixgbe_mbox_api_15)
746 mac->get_link_status = false;
747 goto out;
748 }
749
750 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
751 /* msg is not CTS and is FAILURE we must have lost CTS status */
752 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE)
753 ret_val = IXGBE_ERR_MBX;
754 goto out;
755 }
756
757 /* the pf is talking, if we timed out in the past we reinit */
758 if (!mbx->timeout) {
759 ret_val = IXGBE_ERR_TIMEOUT;
760 goto out;
761 }
762
763 /* if we passed all the tests above then the link is up and we no
764 * longer need to check for link
765 */
766 mac->get_link_status = false;
767
768 out:
769 *link_up = !mac->get_link_status;
770 return ret_val;
771 }
772
773 /**
774 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
775 * @hw: pointer to the HW structure
776 * @max_size: value to assign to max frame size
777 **/
ixgbevf_rlpml_set_vf(struct ixgbe_hw * hw,u16 max_size)778 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
779 {
780 u32 msgbuf[2];
781 s32 retval;
782
783 msgbuf[0] = IXGBE_VF_SET_LPE;
784 msgbuf[1] = max_size;
785
786 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
787 if (retval)
788 return retval;
789 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
790 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE))
791 return IXGBE_ERR_MBX;
792
793 return 0;
794 }
795
796 /**
797 * ixgbevf_negotiate_api_version - Negotiate supported API version
798 * @hw: pointer to the HW structure
799 * @api: integer containing requested API version
800 **/
ixgbevf_negotiate_api_version(struct ixgbe_hw * hw,int api)801 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
802 {
803 int err;
804 u32 msg[3];
805
806 /* Negotiate the mailbox API version */
807 msg[0] = IXGBE_VF_API_NEGOTIATE;
808 msg[1] = api;
809 msg[2] = 0;
810
811 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
812 if (!err) {
813 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
814
815 /* Store value and return 0 on success */
816 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) {
817 hw->api_version = api;
818 return 0;
819 }
820
821 err = IXGBE_ERR_INVALID_ARGUMENT;
822 }
823
824 return err;
825 }
826
ixgbevf_get_queues(struct ixgbe_hw * hw,unsigned int * num_tcs,unsigned int * default_tc)827 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
828 unsigned int *default_tc)
829 {
830 int err;
831 u32 msg[5];
832
833 /* do nothing if API doesn't support ixgbevf_get_queues */
834 switch (hw->api_version) {
835 case ixgbe_mbox_api_11:
836 case ixgbe_mbox_api_12:
837 case ixgbe_mbox_api_13:
838 case ixgbe_mbox_api_15:
839 case ixgbe_mbox_api_16:
840 break;
841 default:
842 return 0;
843 }
844
845 /* Fetch queue configuration from the PF */
846 msg[0] = IXGBE_VF_GET_QUEUES;
847 msg[1] = msg[2] = msg[3] = msg[4] = 0;
848
849 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
850 if (!err) {
851 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
852
853 /*
854 * if we we didn't get a SUCCESS there must have been
855 * some sort of mailbox error so we should treat it
856 * as such
857 */
858 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS))
859 return IXGBE_ERR_MBX;
860
861 /* record and validate values from message */
862 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
863 if (hw->mac.max_tx_queues == 0 ||
864 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
865 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
866
867 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
868 if (hw->mac.max_rx_queues == 0 ||
869 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
870 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
871
872 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
873 /* in case of unknown state assume we cannot tag frames */
874 if (*num_tcs > hw->mac.max_rx_queues)
875 *num_tcs = 1;
876
877 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
878 /* default to queue 0 on out-of-bounds queue number */
879 if (*default_tc >= hw->mac.max_tx_queues)
880 *default_tc = 0;
881 }
882
883 return err;
884 }
885