xref: /linux/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 // SPDX-License-Identifier: MIT
2 //
3 // Copyright 2024 Advanced Micro Devices, Inc.
4 
5 #ifndef _DMUB_REPLAY_H_
6 #define _DMUB_REPLAY_H_
7 
8 #include "dc_types.h"
9 #include "dmub_cmd.h"
10 struct dc_link;
11 struct dmub_replay_funcs;
12 
13 struct dmub_replay {
14 	struct dc_context *ctx;
15 	const struct dmub_replay_funcs *funcs;
16 };
17 
18 struct dmub_replay_funcs {
19 	void (*replay_get_state)(struct dmub_replay *dmub, enum replay_state *state,
20 		uint8_t panel_inst);
21 	void (*replay_enable)(struct dmub_replay *dmub, bool enable, bool wait,
22 		uint8_t panel_inst);
23 	bool (*replay_copy_settings)(struct dmub_replay *dmub, struct dc_link *link,
24 		struct replay_context *replay_context, uint8_t panel_inst);
25 	void (*replay_set_power_opt)(struct dmub_replay *dmub, unsigned int power_opt,
26 		uint8_t panel_inst);
27 	void (*replay_send_cmd)(struct dmub_replay *dmub,
28 		enum replay_FW_Message_type msg, union dmub_replay_cmd_set *cmd_element);
29 	void (*replay_set_coasting_vtotal)(struct dmub_replay *dmub, uint32_t coasting_vtotal,
30 		uint8_t panel_inst);
31 	void (*replay_residency)(struct dmub_replay *dmub,
32 		uint8_t panel_inst, uint32_t *residency, const bool is_start, const enum pr_residency_mode mode);
33 	void (*replay_set_power_opt_and_coasting_vtotal)(struct dmub_replay *dmub,
34 		unsigned int power_opt, uint8_t panel_inst, uint32_t coasting_vtotal);
35 };
36 
37 struct dmub_replay *dmub_replay_create(struct dc_context *ctx);
38 void dmub_replay_destroy(struct dmub_replay **dmub);
39 
40 
41 #endif /* _DMUB_REPLAY_H_ */
42