1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> 4 */ 5 6#define SOC_PERIPHERAL_IRQ(nr) ((nr) + 16) 7 8#include <dt-bindings/pinctrl/pinctrl-cv1800b.h> 9#include "cv180x-cpus.dtsi" 10#include "cv180x.dtsi" 11 12/ { 13 compatible = "sophgo,cv1800b"; 14 15 memory@80000000 { 16 device_type = "memory"; 17 reg = <0x80000000 0x4000000>; 18 }; 19 20 soc { 21 interrupt-parent = <&plic>; 22 dma-noncoherent; 23 24 pinctrl: pinctrl@3001000 { 25 compatible = "sophgo,cv1800b-pinctrl"; 26 reg = <0x03001000 0x1000>, 27 <0x05027000 0x1000>; 28 reg-names = "sys", "rtc"; 29 }; 30 31 clk: clock-controller@3002000 { 32 compatible = "sophgo,cv1800b-clk"; 33 reg = <0x03002000 0x1000>; 34 clocks = <&osc>; 35 #clock-cells = <1>; 36 }; 37 38 plic: interrupt-controller@70000000 { 39 compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; 40 reg = <0x70000000 0x4000000>; 41 interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; 42 interrupt-controller; 43 #address-cells = <0>; 44 #interrupt-cells = <2>; 45 riscv,ndev = <101>; 46 }; 47 48 clint: timer@74000000 { 49 compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; 50 reg = <0x74000000 0x10000>; 51 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; 52 }; 53 }; 54}; 55