1 /* SPDX-License-Identifier: MIT */ 2 #ifndef __NVKM_DEVICE_TEGRA_H__ 3 #define __NVKM_DEVICE_TEGRA_H__ 4 #include <core/device.h> 5 #include <core/mm.h> 6 7 struct nvkm_device_tegra { 8 const struct nvkm_device_tegra_func *func; 9 struct nvkm_device device; 10 struct platform_device *pdev; 11 12 void __iomem *regs; 13 14 struct reset_control *rst; 15 struct clk *clk; 16 struct clk *clk_ref; 17 struct clk *clk_pwr; 18 19 struct regulator *vdd; 20 21 struct { 22 /* 23 * Protects accesses to mm from subsystems 24 */ 25 struct mutex mutex; 26 27 struct nvkm_mm mm; 28 struct iommu_domain *domain; 29 unsigned long pgshift; 30 } iommu; 31 32 int gpu_speedo; 33 int gpu_speedo_id; 34 }; 35 36 struct nvkm_device_tegra_func { 37 /* 38 * If an IOMMU is used, indicates which address bit will trigger a 39 * IOMMU translation when set (when this bit is not set, IOMMU is 40 * bypassed). A value of 0 means an IOMMU is never used. 41 */ 42 u8 iommu_bit; 43 /* 44 * Whether the chip requires a reference clock 45 */ 46 bool require_ref_clk; 47 /* 48 * Whether the chip requires the VDD regulator 49 */ 50 bool require_vdd; 51 }; 52 53 int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *, 54 struct platform_device *, 55 const char *cfg, const char *dbg, 56 struct nvkm_device **); 57 #endif 58