xref: /linux/sound/pci/ca0106/ca0106_main.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
4  *  Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
5  *  Version: 0.0.25
6  *
7  *  FEATURES currently supported:
8  *    Front, Rear and Center/LFE.
9  *    Surround40 and Surround51.
10  *    Capture from MIC an LINE IN input.
11  *    SPDIF digital playback of PCM stereo and AC3/DTS works.
12  *    (One can use a standard mono mini-jack to one RCA plugs cable.
13  *     or one can use a standard stereo mini-jack to two RCA plugs cable.
14  *     Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
15  *    ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
16  *    Notes on how to capture sound:
17  *      The AC97 is used in the PLAYBACK direction.
18  *      The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
19  *      So, to record from the MIC, set the MIC Playback volume to max,
20  *      unmute the MIC and turn up the MASTER Playback volume.
21  *      So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
22  *
23  *    The only playback controls that currently do anything are: -
24  *    Analog Front
25  *    Analog Rear
26  *    Analog Center/LFE
27  *    SPDIF Front
28  *    SPDIF Rear
29  *    SPDIF Center/LFE
30  *
31  *    For capture from Mic in or Line in.
32  *    Digital/Analog ( switch must be in Analog mode for CAPTURE. )
33  *
34  *    CAPTURE feedback into PLAYBACK
35  *
36  *  Changelog:
37  *    Support interrupts per period.
38  *    Removed noise from Center/LFE channel when in Analog mode.
39  *    Rename and remove mixer controls.
40  *  0.0.6
41  *    Use separate card based DMA buffer for periods table list.
42  *  0.0.7
43  *    Change remove and rename ctrls into lists.
44  *  0.0.8
45  *    Try to fix capture sources.
46  *  0.0.9
47  *    Fix AC3 output.
48  *    Enable S32_LE format support.
49  *  0.0.10
50  *    Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
51  *  0.0.11
52  *    Add Model name recognition.
53  *  0.0.12
54  *    Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
55  *    Remove redundent "voice" handling.
56  *  0.0.13
57  *    Single trigger call for multi channels.
58  *  0.0.14
59  *    Set limits based on what the sound card hardware can do.
60  *    playback periods_min=2, periods_max=8
61  *    capture hw constraints require period_size = n * 64 bytes.
62  *    playback hw constraints require period_size = n * 64 bytes.
63  *  0.0.15
64  *    Minor updates.
65  *  0.0.16
66  *    Implement 192000 sample rate.
67  *  0.0.17
68  *    Add support for SB0410 and SB0413.
69  *  0.0.18
70  *    Modified Copyright message.
71  *  0.0.19
72  *    Finally fix support for SB Live 24 bit. SB0410 and SB0413.
73  *    The output codec needs resetting, otherwise all output is muted.
74  *  0.0.20
75  *    Merge "pci_disable_device(pci);" fixes.
76  *  0.0.21
77  *    Add 4 capture channels. (SPDIF only comes in on channel 0. )
78  *    Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
79  *  0.0.22
80  *    Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
81  *  0.0.23
82  *    Implement support for Line-in capture on SB Live 24bit.
83  *  0.0.24
84  *    Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
85  *  0.0.25
86  *    Powerdown SPI DAC channels when not in use
87  *
88  *  BUGS:
89  *    Some stability problems when unloading the snd-ca0106 kernel module.
90  *    --
91  *
92  *  TODO:
93  *    4 Capture channels, only one implemented so far.
94  *    Other capture rates apart from 48khz not implemented.
95  *    MIDI
96  *    --
97  *  GENERAL INFO:
98  *    Model: SB0310
99  *    P17 Chip: CA0106-DAT
100  *    AC97 Codec: STAC 9721
101  *    ADC: Philips 1361T (Stereo 24bit)
102  *    DAC: WM8746EDS (6-channel, 24bit, 192Khz)
103  *
104  *  GENERAL INFO:
105  *    Model: SB0410
106  *    P17 Chip: CA0106-DAT
107  *    AC97 Codec: None
108  *    ADC: WM8775EDS (4 Channel)
109  *    DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
110  *    SPDIF Out control switches between Mic in and SPDIF out.
111  *    No sound out or mic input working yet.
112  *
113  *  GENERAL INFO:
114  *    Model: SB0413
115  *    P17 Chip: CA0106-DAT
116  *    AC97 Codec: None.
117  *    ADC: Unknown
118  *    DAC: Unknown
119  *    Trying to handle it like the SB0410.
120  *
121  *  This code was initially based on code from ALSA's emu10k1x.c which is:
122  *  Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
123  */
124 #include <linux/delay.h>
125 #include <linux/init.h>
126 #include <linux/interrupt.h>
127 #include <linux/pci.h>
128 #include <linux/slab.h>
129 #include <linux/module.h>
130 #include <linux/dma-mapping.h>
131 #include <sound/core.h>
132 #include <sound/initval.h>
133 #include <sound/pcm.h>
134 #include <sound/ac97_codec.h>
135 #include <sound/info.h>
136 
137 MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
138 MODULE_DESCRIPTION("CA0106");
139 MODULE_LICENSE("GPL");
140 
141 // module parameters (see "Module Parameters")
142 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
143 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
144 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
145 static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
146 
147 module_param_array(index, int, NULL, 0444);
148 MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
149 module_param_array(id, charp, NULL, 0444);
150 MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
151 module_param_array(enable, bool, NULL, 0444);
152 MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
153 module_param_array(subsystem, uint, NULL, 0444);
154 MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
155 
156 #include "ca0106.h"
157 
158 static const struct snd_ca0106_details ca0106_chip_details[] = {
159 	 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
160 	 /* It is really just a normal SB Live 24bit. */
161 	 /* Tested:
162 	  * See ALSA bug#3251
163 	  */
164 	 { .serial = 0x10131102,
165 	   .name   = "X-Fi Extreme Audio [SBxxxx]",
166 	   .gpio_type = 1,
167 	   .i2c_adc = 1 } ,
168 	 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
169 	 /* It is really just a normal SB Live 24bit. */
170 	 /*
171  	  * CTRL:CA0111-WTLF
172 	  * ADC: WM8775SEDS
173 	  * DAC: CS4382-KQZ
174 	  */
175 	 /* Tested:
176 	  * Playback on front, rear, center/lfe speakers
177 	  * Capture from Mic in.
178 	  * Not-Tested:
179 	  * Capture from Line in.
180 	  * Playback to digital out.
181 	  */
182 	 { .serial = 0x10121102,
183 	   .name   = "X-Fi Extreme Audio [SB0790]",
184 	   .gpio_type = 1,
185 	   .i2c_adc = 1 } ,
186 	 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97.  */
187 	 /* AudigyLS[SB0310] */
188 	 { .serial = 0x10021102,
189 	   .name   = "AudigyLS [SB0310]",
190 	   .ac97   = 1 } ,
191 	 /* Unknown AudigyLS that also says SB0310 on it */
192 	 { .serial = 0x10051102,
193 	   .name   = "AudigyLS [SB0310b]",
194 	   .ac97   = 1 } ,
195 	 /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
196 	 { .serial = 0x10061102,
197 	   .name   = "Live! 7.1 24bit [SB0410]",
198 	   .gpio_type = 1,
199 	   .i2c_adc = 1 } ,
200 	 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97.  */
201 	 { .serial = 0x10071102,
202 	   .name   = "Live! 7.1 24bit [SB0413]",
203 	   .gpio_type = 1,
204 	   .i2c_adc = 1 } ,
205 	 /* New Audigy SE. Has a different DAC. */
206 	 /* SB0570:
207 	  * CTRL:CA0106-DAT
208 	  * ADC: WM8775EDS
209 	  * DAC: WM8768GEDS
210 	  */
211 	 { .serial = 0x100a1102,
212 	   .name   = "Audigy SE [SB0570]",
213 	   .gpio_type = 1,
214 	   .i2c_adc = 1,
215 	   .spi_dac = 0x4021 } ,
216 	 /* New Audigy LS. Has a different DAC. */
217 	 /* SB0570:
218 	  * CTRL:CA0106-DAT
219 	  * ADC: WM8775EDS
220 	  * DAC: WM8768GEDS
221 	  */
222 	 { .serial = 0x10111102,
223 	   .name   = "Audigy SE OEM [SB0570a]",
224 	   .gpio_type = 1,
225 	   .i2c_adc = 1,
226 	   .spi_dac = 0x4021 } ,
227 	/* Sound Blaster 5.1vx
228 	 * Tested: Playback on front, rear, center/lfe speakers
229 	 * Not-Tested: Capture
230 	 */
231 	{ .serial = 0x10041102,
232 	  .name   = "Sound Blaster 5.1vx [SB1070]",
233 	  .gpio_type = 1,
234 	  .i2c_adc = 0,
235 	  .spi_dac = 0x0124
236 	 } ,
237 	 /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
238 	 /* SB0438
239 	  * CTRL:CA0106-DAT
240 	  * ADC: WM8775SEDS
241 	  * DAC: CS4382-KQZ
242 	  */
243 	 { .serial = 0x10091462,
244 	   .name   = "MSI K8N Diamond MB [SB0438]",
245 	   .gpio_type = 2,
246 	   .i2c_adc = 1 } ,
247 	 /* MSI K8N Diamond PLUS MB */
248 	 { .serial = 0x10091102,
249 	   .name   = "MSI K8N Diamond MB",
250 	   .gpio_type = 2,
251 	   .i2c_adc = 1,
252 	   .spi_dac = 0x4021 } ,
253 	/* Giga-byte GA-G1975X mobo
254 	 * Novell bnc#395807
255 	 */
256 	/* FIXME: the GPIO and I2C setting aren't tested well */
257 	{ .serial = 0x1458a006,
258 	  .name = "Giga-byte GA-G1975X",
259 	  .gpio_type = 1,
260 	  .i2c_adc = 1 },
261 	 /* Shuttle XPC SD31P which has an onboard Creative Labs
262 	  * Sound Blaster Live! 24-bit EAX
263 	  * high-definition 7.1 audio processor".
264 	  * Added using info from andrewvegan in alsa bug #1298
265 	  */
266 	 { .serial = 0x30381297,
267 	   .name   = "Shuttle XPC SD31P [SD31P]",
268 	   .gpio_type = 1,
269 	   .i2c_adc = 1 } ,
270 	/* Shuttle XPC SD11G5 which has an onboard Creative Labs
271 	 * Sound Blaster Live! 24-bit EAX
272 	 * high-definition 7.1 audio processor".
273 	 * Fixes ALSA bug#1600
274          */
275 	{ .serial = 0x30411297,
276 	  .name = "Shuttle XPC SD11G5 [SD11G5]",
277 	  .gpio_type = 1,
278 	  .i2c_adc = 1 } ,
279 	 { .serial = 0,
280 	   .name   = "AudigyLS [Unknown]" }
281 };
282 
283 /* hardware definition */
284 static const struct snd_pcm_hardware snd_ca0106_playback_hw = {
285 	.info =			SNDRV_PCM_INFO_MMAP |
286 				SNDRV_PCM_INFO_INTERLEAVED |
287 				SNDRV_PCM_INFO_BLOCK_TRANSFER |
288 				SNDRV_PCM_INFO_MMAP_VALID |
289 				SNDRV_PCM_INFO_SYNC_START,
290 	.formats =		SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
291 	.rates =		(SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
292 				 SNDRV_PCM_RATE_192000),
293 	.rate_min =		48000,
294 	.rate_max =		192000,
295 	.channels_min =		2,  //1,
296 	.channels_max =		2,  //6,
297 	.buffer_bytes_max =	((65536 - 64) * 8),
298 	.period_bytes_min =	64,
299 	.period_bytes_max =	(65536 - 64),
300 	.periods_min =		2,
301 	.periods_max =		8,
302 	.fifo_size =		0,
303 };
304 
305 static const struct snd_pcm_hardware snd_ca0106_capture_hw = {
306 	.info =			(SNDRV_PCM_INFO_MMAP |
307 				 SNDRV_PCM_INFO_INTERLEAVED |
308 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
309 				 SNDRV_PCM_INFO_MMAP_VALID),
310 	.formats =		SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
311 #if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
312 	.rates =		(SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
313 				 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
314 	.rate_min =		44100,
315 #else
316 	.rates =		(SNDRV_PCM_RATE_48000 |
317 				 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
318 	.rate_min =		48000,
319 #endif /* FIXME */
320 	.rate_max =		192000,
321 	.channels_min =		2,
322 	.channels_max =		2,
323 	.buffer_bytes_max =	65536 - 128,
324 	.period_bytes_min =	64,
325 	.period_bytes_max =	32768 - 64,
326 	.periods_min =		2,
327 	.periods_max =		2,
328 	.fifo_size =		0,
329 };
330 
snd_ca0106_ptr_read(struct snd_ca0106 * emu,unsigned int reg,unsigned int chn)331 unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
332 					  unsigned int reg,
333 					  unsigned int chn)
334 {
335 	unsigned long flags;
336 	unsigned int regptr, val;
337 
338 	regptr = (reg << 16) | chn;
339 
340 	spin_lock_irqsave(&emu->emu_lock, flags);
341 	outl(regptr, emu->port + CA0106_PTR);
342 	val = inl(emu->port + CA0106_DATA);
343 	spin_unlock_irqrestore(&emu->emu_lock, flags);
344 	return val;
345 }
346 
snd_ca0106_ptr_write(struct snd_ca0106 * emu,unsigned int reg,unsigned int chn,unsigned int data)347 void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
348 				   unsigned int reg,
349 				   unsigned int chn,
350 				   unsigned int data)
351 {
352 	unsigned int regptr;
353 	unsigned long flags;
354 
355 	regptr = (reg << 16) | chn;
356 
357 	spin_lock_irqsave(&emu->emu_lock, flags);
358 	outl(regptr, emu->port + CA0106_PTR);
359 	outl(data, emu->port + CA0106_DATA);
360 	spin_unlock_irqrestore(&emu->emu_lock, flags);
361 }
362 
snd_ca0106_spi_write(struct snd_ca0106 * emu,unsigned int data)363 int snd_ca0106_spi_write(struct snd_ca0106 * emu,
364 				   unsigned int data)
365 {
366 	unsigned int reset, set;
367 	unsigned int reg, tmp;
368 	int n, result;
369 	reg = SPI;
370 	if (data > 0xffff) /* Only 16bit values allowed */
371 		return 1;
372 	tmp = snd_ca0106_ptr_read(emu, reg, 0);
373 	reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
374 	set = reset | 0x10000; /* Set xxx1xxxx */
375 	snd_ca0106_ptr_write(emu, reg, 0, reset | data);
376 	tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
377 	snd_ca0106_ptr_write(emu, reg, 0, set | data);
378 	result = 1;
379 	/* Wait for status bit to return to 0 */
380 	for (n = 0; n < 100; n++) {
381 		udelay(10);
382 		tmp = snd_ca0106_ptr_read(emu, reg, 0);
383 		if (!(tmp & 0x10000)) {
384 			result = 0;
385 			break;
386 		}
387 	}
388 	if (result) /* Timed out */
389 		return 1;
390 	snd_ca0106_ptr_write(emu, reg, 0, reset | data);
391 	tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
392 	return 0;
393 }
394 
395 /* The ADC does not support i2c read, so only write is implemented */
snd_ca0106_i2c_write(struct snd_ca0106 * emu,u32 reg,u32 value)396 int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
397 				u32 reg,
398 				u32 value)
399 {
400 	u32 tmp;
401 	int timeout = 0;
402 	int status;
403 	int retry;
404 	if ((reg > 0x7f) || (value > 0x1ff)) {
405 		dev_err(emu->card->dev, "i2c_write: invalid values.\n");
406 		return -EINVAL;
407 	}
408 
409 	tmp = reg << 25 | value << 16;
410 	/*
411 	dev_dbg(emu->card->dev, "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
412 	*/
413 	/* Not sure what this I2C channel controls. */
414 	/* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
415 
416 	/* This controls the I2C connected to the WM8775 ADC Codec */
417 	snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
418 
419 	for (retry = 0; retry < 10; retry++) {
420 		/* Send the data to i2c */
421 		//tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
422 		//tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
423 		tmp = 0;
424 		tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
425 		snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
426 
427 		/* Wait till the transaction ends */
428 		while (1) {
429 			status = snd_ca0106_ptr_read(emu, I2C_A, 0);
430 			/*dev_dbg(emu->card->dev, "I2C:status=0x%x\n", status);*/
431 			timeout++;
432 			if ((status & I2C_A_ADC_START) == 0)
433 				break;
434 
435 			if (timeout > 1000)
436 				break;
437 		}
438 		//Read back and see if the transaction is successful
439 		if ((status & I2C_A_ADC_ABORT) == 0)
440 			break;
441 	}
442 
443 	if (retry == 10) {
444 		dev_err(emu->card->dev, "Writing to ADC failed!\n");
445 		return -EINVAL;
446 	}
447 
448     	return 0;
449 }
450 
451 
snd_ca0106_intr_enable(struct snd_ca0106 * emu,unsigned int intrenb)452 static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
453 {
454 	unsigned long flags;
455 	unsigned int intr_enable;
456 
457 	spin_lock_irqsave(&emu->emu_lock, flags);
458 	intr_enable = inl(emu->port + CA0106_INTE) | intrenb;
459 	outl(intr_enable, emu->port + CA0106_INTE);
460 	spin_unlock_irqrestore(&emu->emu_lock, flags);
461 }
462 
snd_ca0106_intr_disable(struct snd_ca0106 * emu,unsigned int intrenb)463 static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
464 {
465 	unsigned long flags;
466 	unsigned int intr_enable;
467 
468 	spin_lock_irqsave(&emu->emu_lock, flags);
469 	intr_enable = inl(emu->port + CA0106_INTE) & ~intrenb;
470 	outl(intr_enable, emu->port + CA0106_INTE);
471 	spin_unlock_irqrestore(&emu->emu_lock, flags);
472 }
473 
474 
snd_ca0106_pcm_free_substream(struct snd_pcm_runtime * runtime)475 static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
476 {
477 	kfree(runtime->private_data);
478 }
479 
480 static const int spi_dacd_reg[] = {
481 	SPI_DACD0_REG,
482 	SPI_DACD1_REG,
483 	SPI_DACD2_REG,
484 	0,
485 	SPI_DACD4_REG,
486 };
487 static const int spi_dacd_bit[] = {
488 	SPI_DACD0_BIT,
489 	SPI_DACD1_BIT,
490 	SPI_DACD2_BIT,
491 	0,
492 	SPI_DACD4_BIT,
493 };
494 
restore_spdif_bits(struct snd_ca0106 * chip,int idx)495 static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
496 {
497 	if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
498 		chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
499 		snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
500 				     chip->spdif_str_bits[idx]);
501 	}
502 }
503 
snd_ca0106_channel_dac(struct snd_ca0106 * chip,const struct snd_ca0106_details * details,int channel_id)504 static int snd_ca0106_channel_dac(struct snd_ca0106 *chip,
505 				  const struct snd_ca0106_details *details,
506 				  int channel_id)
507 {
508 	switch (channel_id) {
509 	case PCM_FRONT_CHANNEL:
510 		return (details->spi_dac & 0xf000) >> (4 * 3);
511 	case PCM_REAR_CHANNEL:
512 		return (details->spi_dac & 0x0f00) >> (4 * 2);
513 	case PCM_CENTER_LFE_CHANNEL:
514 		return (details->spi_dac & 0x00f0) >> (4 * 1);
515 	case PCM_UNKNOWN_CHANNEL:
516 		return (details->spi_dac & 0x000f) >> (4 * 0);
517 	default:
518 		dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n",
519 			   channel_id);
520 	}
521 	return 0;
522 }
523 
snd_ca0106_pcm_power_dac(struct snd_ca0106 * chip,int channel_id,int power)524 static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id,
525 				    int power)
526 {
527 	if (chip->details->spi_dac) {
528 		const int dac = snd_ca0106_channel_dac(chip, chip->details,
529 						       channel_id);
530 		const int reg = spi_dacd_reg[dac];
531 		const int bit = spi_dacd_bit[dac];
532 
533 		if (power)
534 			/* Power up */
535 			chip->spi_dac_reg[reg] &= ~bit;
536 		else
537 			/* Power down */
538 			chip->spi_dac_reg[reg] |= bit;
539 		if (snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]) != 0)
540 			return -ENXIO;
541 	}
542 	return 0;
543 }
544 
545 /* open_playback callback */
snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream * substream,int channel_id)546 static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
547 						int channel_id)
548 {
549 	struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
550         struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
551 	struct snd_ca0106_pcm *epcm;
552 	struct snd_pcm_runtime *runtime = substream->runtime;
553 	int err;
554 
555 	epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
556 
557 	if (epcm == NULL)
558 		return -ENOMEM;
559 	epcm->emu = chip;
560 	epcm->substream = substream;
561         epcm->channel_id=channel_id;
562 
563 	runtime->private_data = epcm;
564 	runtime->private_free = snd_ca0106_pcm_free_substream;
565 
566 	runtime->hw = snd_ca0106_playback_hw;
567 
568         channel->emu = chip;
569         channel->number = channel_id;
570 
571 	channel->use = 1;
572 	/*
573 	dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
574 	       channel_id, chip, channel);
575 	*/
576         //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
577 	channel->epcm = epcm;
578 	err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
579 	if (err < 0)
580                 return err;
581 	err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
582 	if (err < 0)
583                 return err;
584 	snd_pcm_set_sync(substream);
585 
586 	/* Front channel dac should already be on */
587 	if (channel_id != PCM_FRONT_CHANNEL) {
588 		err = snd_ca0106_pcm_power_dac(chip, channel_id, 1);
589 		if (err < 0)
590 			return err;
591 	}
592 
593 	restore_spdif_bits(chip, channel_id);
594 
595 	return 0;
596 }
597 
598 /* close callback */
snd_ca0106_pcm_close_playback(struct snd_pcm_substream * substream)599 static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
600 {
601 	struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
602 	struct snd_pcm_runtime *runtime = substream->runtime;
603         struct snd_ca0106_pcm *epcm = runtime->private_data;
604 	chip->playback_channels[epcm->channel_id].use = 0;
605 
606 	restore_spdif_bits(chip, epcm->channel_id);
607 
608 	/* Front channel dac should stay on */
609 	if (epcm->channel_id != PCM_FRONT_CHANNEL) {
610 		int err;
611 		err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0);
612 		if (err < 0)
613 			return err;
614 	}
615 
616 	/* FIXME: maybe zero others */
617 	return 0;
618 }
619 
snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream * substream)620 static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
621 {
622 	return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
623 }
624 
snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream * substream)625 static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
626 {
627 	return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
628 }
629 
snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream * substream)630 static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
631 {
632 	return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
633 }
634 
snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream * substream)635 static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
636 {
637 	return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
638 }
639 
640 /* open_capture callback */
snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream * substream,int channel_id)641 static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
642 					       int channel_id)
643 {
644 	struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
645         struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
646 	struct snd_ca0106_pcm *epcm;
647 	struct snd_pcm_runtime *runtime = substream->runtime;
648 	int err;
649 
650 	epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
651 	if (!epcm)
652 		return -ENOMEM;
653 
654 	epcm->emu = chip;
655 	epcm->substream = substream;
656         epcm->channel_id=channel_id;
657 
658 	runtime->private_data = epcm;
659 	runtime->private_free = snd_ca0106_pcm_free_substream;
660 
661 	runtime->hw = snd_ca0106_capture_hw;
662 
663         channel->emu = chip;
664         channel->number = channel_id;
665 
666 	channel->use = 1;
667 	/*
668 	dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
669 	       channel_id, chip, channel);
670 	*/
671         //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
672         channel->epcm = epcm;
673 	err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
674 	if (err < 0)
675                 return err;
676 	//snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
677 	err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
678 	if (err < 0)
679                 return err;
680 	return 0;
681 }
682 
683 /* close callback */
snd_ca0106_pcm_close_capture(struct snd_pcm_substream * substream)684 static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
685 {
686 	struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
687 	struct snd_pcm_runtime *runtime = substream->runtime;
688         struct snd_ca0106_pcm *epcm = runtime->private_data;
689 	chip->capture_channels[epcm->channel_id].use = 0;
690 	/* FIXME: maybe zero others */
691 	return 0;
692 }
693 
snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream * substream)694 static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
695 {
696 	return snd_ca0106_pcm_open_capture_channel(substream, 0);
697 }
698 
snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream * substream)699 static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
700 {
701 	return snd_ca0106_pcm_open_capture_channel(substream, 1);
702 }
703 
snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream * substream)704 static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
705 {
706 	return snd_ca0106_pcm_open_capture_channel(substream, 2);
707 }
708 
snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream * substream)709 static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
710 {
711 	return snd_ca0106_pcm_open_capture_channel(substream, 3);
712 }
713 
714 /* prepare playback callback */
snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream * substream)715 static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
716 {
717 	struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
718 	struct snd_pcm_runtime *runtime = substream->runtime;
719 	struct snd_ca0106_pcm *epcm = runtime->private_data;
720 	int channel = epcm->channel_id;
721 	u32 *table_base = (u32 *)(emu->buffer->area+(8*16*channel));
722 	u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
723 	u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
724 	u32 hcfg_set = 0x00000000;
725 	u32 hcfg;
726 	u32 reg40_mask = 0x30000 << (channel<<1);
727 	u32 reg40_set = 0;
728 	u32 reg40;
729 	/* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
730 	u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
731 	u32 reg71_set = 0;
732 	u32 reg71;
733 	int i;
734 
735 #if 0 /* debug */
736 	dev_dbg(emu->card->dev,
737 		   "prepare:channel_number=%d, rate=%d, format=0x%x, "
738 		   "channels=%d, buffer_size=%ld, period_size=%ld, "
739 		   "periods=%u, frames_to_bytes=%d\n",
740 		   channel, runtime->rate, runtime->format,
741 		   runtime->channels, runtime->buffer_size,
742 		   runtime->period_size, runtime->periods,
743 		   frames_to_bytes(runtime, 1));
744 	dev_dbg(emu->card->dev,
745 		"dma_addr=%x, dma_area=%p, table_base=%p\n",
746 		   runtime->dma_addr, runtime->dma_area, table_base);
747 	dev_dbg(emu->card->dev,
748 		"dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
749 		   emu->buffer->addr, emu->buffer->area, emu->buffer->bytes);
750 #endif /* debug */
751 	/* Rate can be set per channel. */
752 	/* reg40 control host to fifo */
753 	/* reg71 controls DAC rate. */
754 	switch (runtime->rate) {
755 	case 44100:
756 		reg40_set = 0x10000 << (channel<<1);
757 		reg71_set = 0x01010000;
758 		break;
759         case 48000:
760 		reg40_set = 0;
761 		reg71_set = 0;
762 		break;
763 	case 96000:
764 		reg40_set = 0x20000 << (channel<<1);
765 		reg71_set = 0x02020000;
766 		break;
767 	case 192000:
768 		reg40_set = 0x30000 << (channel<<1);
769 		reg71_set = 0x03030000;
770 		break;
771 	default:
772 		reg40_set = 0;
773 		reg71_set = 0;
774 		break;
775 	}
776 	/* Format is a global setting */
777 	/* FIXME: Only let the first channel accessed set this. */
778 	switch (runtime->format) {
779 	case SNDRV_PCM_FORMAT_S16_LE:
780 		hcfg_set = 0;
781 		break;
782 	case SNDRV_PCM_FORMAT_S32_LE:
783 		hcfg_set = HCFG_PLAYBACK_S32_LE;
784 		break;
785 	default:
786 		hcfg_set = 0;
787 		break;
788 	}
789 	hcfg = inl(emu->port + CA0106_HCFG) ;
790 	hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
791 	outl(hcfg, emu->port + CA0106_HCFG);
792 	reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
793 	reg40 = (reg40 & ~reg40_mask) | reg40_set;
794 	snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
795 	reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
796 	reg71 = (reg71 & ~reg71_mask) | reg71_set;
797 	snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
798 
799 	/* FIXME: Check emu->buffer->size before actually writing to it. */
800         for(i=0; i < runtime->periods; i++) {
801 		table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
802 		table_base[i*2+1] = period_size_bytes << 16;
803 	}
804 
805 	snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer->addr+(8*16*channel));
806 	snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
807 	snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
808 	snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
809 	snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
810 	/* FIXME  test what 0 bytes does. */
811 	snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
812 	snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
813 	snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
814 	snd_ca0106_ptr_write(emu, 0x08, channel, 0);
815         snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
816 #if 0
817 	snd_ca0106_ptr_write(emu, SPCS0, 0,
818 			       SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
819 			       SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
820 			       SPCS_GENERATIONSTATUS | 0x00001200 |
821 			       0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
822 #endif
823 
824 	return 0;
825 }
826 
827 /* prepare capture callback */
snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream * substream)828 static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
829 {
830 	struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
831 	struct snd_pcm_runtime *runtime = substream->runtime;
832 	struct snd_ca0106_pcm *epcm = runtime->private_data;
833 	int channel = epcm->channel_id;
834 	u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
835 	u32 hcfg_set = 0x00000000;
836 	u32 hcfg;
837 	u32 over_sampling=0x2;
838 	u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
839 	u32 reg71_set = 0;
840 	u32 reg71;
841 
842 #if 0 /* debug */
843 	dev_dbg(emu->card->dev,
844 		   "prepare:channel_number=%d, rate=%d, format=0x%x, "
845 		   "channels=%d, buffer_size=%ld, period_size=%ld, "
846 		   "periods=%u, frames_to_bytes=%d\n",
847 		   channel, runtime->rate, runtime->format,
848 		   runtime->channels, runtime->buffer_size,
849 		   runtime->period_size, runtime->periods,
850 		   frames_to_bytes(runtime, 1));
851 	dev_dbg(emu->card->dev,
852 		"dma_addr=%x, dma_area=%p, table_base=%p\n",
853 		   runtime->dma_addr, runtime->dma_area, table_base);
854 	dev_dbg(emu->card->dev,
855 		"dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
856 		   emu->buffer->addr, emu->buffer->area, emu->buffer->bytes);
857 #endif /* debug */
858 	/* reg71 controls ADC rate. */
859 	switch (runtime->rate) {
860 	case 44100:
861 		reg71_set = 0x00004000;
862 		break;
863         case 48000:
864 		reg71_set = 0;
865 		break;
866 	case 96000:
867 		reg71_set = 0x00008000;
868 		over_sampling=0xa;
869 		break;
870 	case 192000:
871 		reg71_set = 0x0000c000;
872 		over_sampling=0xa;
873 		break;
874 	default:
875 		reg71_set = 0;
876 		break;
877 	}
878 	/* Format is a global setting */
879 	/* FIXME: Only let the first channel accessed set this. */
880 	switch (runtime->format) {
881 	case SNDRV_PCM_FORMAT_S16_LE:
882 		hcfg_set = 0;
883 		break;
884 	case SNDRV_PCM_FORMAT_S32_LE:
885 		hcfg_set = HCFG_CAPTURE_S32_LE;
886 		break;
887 	default:
888 		hcfg_set = 0;
889 		break;
890 	}
891 	hcfg = inl(emu->port + CA0106_HCFG) ;
892 	hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
893 	outl(hcfg, emu->port + CA0106_HCFG);
894 	reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
895 	reg71 = (reg71 & ~reg71_mask) | reg71_set;
896 	snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
897         if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
898 	        snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
899 	}
900 
901 
902 	/*
903 	dev_dbg(emu->card->dev,
904 	       "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
905 	       "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
906 	       channel, runtime->rate, runtime->format, runtime->channels,
907 	       runtime->buffer_size, runtime->period_size,
908 	       frames_to_bytes(runtime, 1));
909 	*/
910 	snd_ca0106_ptr_write(emu, 0x13, channel, 0);
911 	snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
912 	snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
913 	snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
914 
915 	return 0;
916 }
917 
918 /* trigger_playback callback */
snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream * substream,int cmd)919 static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
920 				    int cmd)
921 {
922 	struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
923 	struct snd_pcm_runtime *runtime;
924 	struct snd_ca0106_pcm *epcm;
925 	int channel;
926 	int result = 0;
927         struct snd_pcm_substream *s;
928 	u32 basic = 0;
929 	u32 extended = 0;
930 	u32 bits;
931 	int running = 0;
932 
933 	switch (cmd) {
934 	case SNDRV_PCM_TRIGGER_START:
935 	case SNDRV_PCM_TRIGGER_RESUME:
936 		running = 1;
937 		break;
938 	case SNDRV_PCM_TRIGGER_STOP:
939 	case SNDRV_PCM_TRIGGER_SUSPEND:
940 	default:
941 		running = 0;
942 		break;
943 	}
944         snd_pcm_group_for_each_entry(s, substream) {
945 		if (snd_pcm_substream_chip(s) != emu ||
946 		    s->stream != SNDRV_PCM_STREAM_PLAYBACK)
947 			continue;
948 		runtime = s->runtime;
949 		epcm = runtime->private_data;
950 		channel = epcm->channel_id;
951 		/* dev_dbg(emu->card->dev, "channel=%d\n", channel); */
952 		epcm->running = running;
953 		basic |= (0x1 << channel);
954 		extended |= (0x10 << channel);
955                 snd_pcm_trigger_done(s, substream);
956         }
957 	/* dev_dbg(emu->card->dev, "basic=0x%x, extended=0x%x\n",basic, extended); */
958 
959 	switch (cmd) {
960 	case SNDRV_PCM_TRIGGER_START:
961 	case SNDRV_PCM_TRIGGER_RESUME:
962 		bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
963 		bits |= extended;
964 		snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
965 		bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
966 		bits |= basic;
967 		snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
968 		break;
969 	case SNDRV_PCM_TRIGGER_STOP:
970 	case SNDRV_PCM_TRIGGER_SUSPEND:
971 		bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
972 		bits &= ~basic;
973 		snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
974 		bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
975 		bits &= ~extended;
976 		snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
977 		break;
978 	default:
979 		result = -EINVAL;
980 		break;
981 	}
982 	return result;
983 }
984 
985 /* trigger_capture callback */
snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream * substream,int cmd)986 static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
987 				    int cmd)
988 {
989 	struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
990 	struct snd_pcm_runtime *runtime = substream->runtime;
991 	struct snd_ca0106_pcm *epcm = runtime->private_data;
992 	int channel = epcm->channel_id;
993 	int result = 0;
994 
995 	switch (cmd) {
996 	case SNDRV_PCM_TRIGGER_START:
997 		snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
998 		snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
999 		epcm->running = 1;
1000 		break;
1001 	case SNDRV_PCM_TRIGGER_STOP:
1002 		snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
1003 		snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
1004 		epcm->running = 0;
1005 		break;
1006 	default:
1007 		result = -EINVAL;
1008 		break;
1009 	}
1010 	return result;
1011 }
1012 
1013 /* pointer_playback callback */
1014 static snd_pcm_uframes_t
snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream * substream)1015 snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
1016 {
1017 	struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1018 	struct snd_pcm_runtime *runtime = substream->runtime;
1019 	struct snd_ca0106_pcm *epcm = runtime->private_data;
1020 	unsigned int ptr, prev_ptr;
1021 	int channel = epcm->channel_id;
1022 	int timeout = 10;
1023 
1024 	if (!epcm->running)
1025 		return 0;
1026 
1027 	prev_ptr = -1;
1028 	do {
1029 		ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
1030 		ptr = (ptr >> 3) * runtime->period_size;
1031 		ptr += bytes_to_frames(runtime,
1032 			snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
1033 		if (ptr >= runtime->buffer_size)
1034 			ptr -= runtime->buffer_size;
1035 		if (prev_ptr == ptr)
1036 			return ptr;
1037 		prev_ptr = ptr;
1038 	} while (--timeout);
1039 	dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n");
1040 	return 0;
1041 }
1042 
1043 /* pointer_capture callback */
1044 static snd_pcm_uframes_t
snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream * substream)1045 snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
1046 {
1047 	struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1048 	struct snd_pcm_runtime *runtime = substream->runtime;
1049 	struct snd_ca0106_pcm *epcm = runtime->private_data;
1050 	snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
1051 	int channel = epcm->channel_id;
1052 
1053 	if (!epcm->running)
1054 		return 0;
1055 
1056 	ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
1057 	ptr2 = bytes_to_frames(runtime, ptr1);
1058 	ptr=ptr2;
1059         if (ptr >= runtime->buffer_size)
1060 		ptr -= runtime->buffer_size;
1061 	/*
1062 	dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
1063 	       "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
1064 	       ptr1, ptr2, ptr, (int)runtime->buffer_size,
1065 	       (int)runtime->period_size, (int)runtime->frame_bits,
1066 	       (int)runtime->rate);
1067 	*/
1068 	return ptr;
1069 }
1070 
1071 /* operators */
1072 static const struct snd_pcm_ops snd_ca0106_playback_front_ops = {
1073 	.open =        snd_ca0106_pcm_open_playback_front,
1074 	.close =       snd_ca0106_pcm_close_playback,
1075 	.prepare =     snd_ca0106_pcm_prepare_playback,
1076 	.trigger =     snd_ca0106_pcm_trigger_playback,
1077 	.pointer =     snd_ca0106_pcm_pointer_playback,
1078 };
1079 
1080 static const struct snd_pcm_ops snd_ca0106_capture_0_ops = {
1081 	.open =        snd_ca0106_pcm_open_0_capture,
1082 	.close =       snd_ca0106_pcm_close_capture,
1083 	.prepare =     snd_ca0106_pcm_prepare_capture,
1084 	.trigger =     snd_ca0106_pcm_trigger_capture,
1085 	.pointer =     snd_ca0106_pcm_pointer_capture,
1086 };
1087 
1088 static const struct snd_pcm_ops snd_ca0106_capture_1_ops = {
1089 	.open =        snd_ca0106_pcm_open_1_capture,
1090 	.close =       snd_ca0106_pcm_close_capture,
1091 	.prepare =     snd_ca0106_pcm_prepare_capture,
1092 	.trigger =     snd_ca0106_pcm_trigger_capture,
1093 	.pointer =     snd_ca0106_pcm_pointer_capture,
1094 };
1095 
1096 static const struct snd_pcm_ops snd_ca0106_capture_2_ops = {
1097 	.open =        snd_ca0106_pcm_open_2_capture,
1098 	.close =       snd_ca0106_pcm_close_capture,
1099 	.prepare =     snd_ca0106_pcm_prepare_capture,
1100 	.trigger =     snd_ca0106_pcm_trigger_capture,
1101 	.pointer =     snd_ca0106_pcm_pointer_capture,
1102 };
1103 
1104 static const struct snd_pcm_ops snd_ca0106_capture_3_ops = {
1105 	.open =        snd_ca0106_pcm_open_3_capture,
1106 	.close =       snd_ca0106_pcm_close_capture,
1107 	.prepare =     snd_ca0106_pcm_prepare_capture,
1108 	.trigger =     snd_ca0106_pcm_trigger_capture,
1109 	.pointer =     snd_ca0106_pcm_pointer_capture,
1110 };
1111 
1112 static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
1113         .open =         snd_ca0106_pcm_open_playback_center_lfe,
1114         .close =        snd_ca0106_pcm_close_playback,
1115         .prepare =      snd_ca0106_pcm_prepare_playback,
1116         .trigger =      snd_ca0106_pcm_trigger_playback,
1117         .pointer =      snd_ca0106_pcm_pointer_playback,
1118 };
1119 
1120 static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
1121         .open =         snd_ca0106_pcm_open_playback_unknown,
1122         .close =        snd_ca0106_pcm_close_playback,
1123         .prepare =      snd_ca0106_pcm_prepare_playback,
1124         .trigger =      snd_ca0106_pcm_trigger_playback,
1125         .pointer =      snd_ca0106_pcm_pointer_playback,
1126 };
1127 
1128 static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
1129         .open =         snd_ca0106_pcm_open_playback_rear,
1130         .close =        snd_ca0106_pcm_close_playback,
1131         .prepare =      snd_ca0106_pcm_prepare_playback,
1132         .trigger =      snd_ca0106_pcm_trigger_playback,
1133         .pointer =      snd_ca0106_pcm_pointer_playback,
1134 };
1135 
1136 
snd_ca0106_ac97_read(struct snd_ac97 * ac97,unsigned short reg)1137 static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
1138 					     unsigned short reg)
1139 {
1140 	struct snd_ca0106 *emu = ac97->private_data;
1141 	unsigned long flags;
1142 	unsigned short val;
1143 
1144 	spin_lock_irqsave(&emu->emu_lock, flags);
1145 	outb(reg, emu->port + CA0106_AC97ADDRESS);
1146 	val = inw(emu->port + CA0106_AC97DATA);
1147 	spin_unlock_irqrestore(&emu->emu_lock, flags);
1148 	return val;
1149 }
1150 
snd_ca0106_ac97_write(struct snd_ac97 * ac97,unsigned short reg,unsigned short val)1151 static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
1152 				    unsigned short reg, unsigned short val)
1153 {
1154 	struct snd_ca0106 *emu = ac97->private_data;
1155 	unsigned long flags;
1156 
1157 	spin_lock_irqsave(&emu->emu_lock, flags);
1158 	outb(reg, emu->port + CA0106_AC97ADDRESS);
1159 	outw(val, emu->port + CA0106_AC97DATA);
1160 	spin_unlock_irqrestore(&emu->emu_lock, flags);
1161 }
1162 
snd_ca0106_ac97(struct snd_ca0106 * chip)1163 static int snd_ca0106_ac97(struct snd_ca0106 *chip)
1164 {
1165 	struct snd_ac97_bus *pbus;
1166 	struct snd_ac97_template ac97;
1167 	int err;
1168 	static const struct snd_ac97_bus_ops ops = {
1169 		.write = snd_ca0106_ac97_write,
1170 		.read = snd_ca0106_ac97_read,
1171 	};
1172 
1173 	err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
1174 	if (err < 0)
1175 		return err;
1176 	pbus->no_vra = 1; /* we don't need VRA */
1177 
1178 	memset(&ac97, 0, sizeof(ac97));
1179 	ac97.private_data = chip;
1180 	ac97.scaps = AC97_SCAP_NO_SPDIF;
1181 	return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1182 }
1183 
1184 static void ca0106_stop_chip(struct snd_ca0106 *chip);
1185 
snd_ca0106_free(struct snd_card * card)1186 static void snd_ca0106_free(struct snd_card *card)
1187 {
1188 	struct snd_ca0106 *chip = card->private_data;
1189 
1190 	ca0106_stop_chip(chip);
1191 }
1192 
snd_ca0106_interrupt(int irq,void * dev_id)1193 static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
1194 {
1195 	unsigned int status;
1196 
1197 	struct snd_ca0106 *chip = dev_id;
1198 	int i;
1199 	int mask;
1200         unsigned int stat76;
1201 	struct snd_ca0106_channel *pchannel;
1202 
1203 	status = inl(chip->port + CA0106_IPR);
1204 	if (! status)
1205 		return IRQ_NONE;
1206 
1207         stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
1208 	/*
1209 	dev_dbg(emu->card->dev, "interrupt status = 0x%08x, stat76=0x%08x\n",
1210 		   status, stat76);
1211 	dev_dbg(emu->card->dev, "ptr=0x%08x\n",
1212 		   snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
1213 	*/
1214         mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
1215 	for(i = 0; i < 4; i++) {
1216 		pchannel = &(chip->playback_channels[i]);
1217 		if (stat76 & mask) {
1218 /* FIXME: Select the correct substream for period elapsed */
1219 			if(pchannel->use) {
1220 				snd_pcm_period_elapsed(pchannel->epcm->substream);
1221 				/* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
1222                         }
1223 		}
1224 		/*
1225 		dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
1226 		dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1227 		*/
1228 		mask <<= 1;
1229 	}
1230         mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
1231 	for(i = 0; i < 4; i++) {
1232 		pchannel = &(chip->capture_channels[i]);
1233 		if (stat76 & mask) {
1234 /* FIXME: Select the correct substream for period elapsed */
1235 			if(pchannel->use) {
1236 				snd_pcm_period_elapsed(pchannel->epcm->substream);
1237 				/* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
1238                         }
1239 		}
1240 		/*
1241 		dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
1242 		dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1243 		*/
1244 		mask <<= 1;
1245 	}
1246 
1247         snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
1248 
1249 	if (chip->midi.dev_id &&
1250 	    (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
1251 		if (chip->midi.interrupt)
1252 			chip->midi.interrupt(&chip->midi, status);
1253 		else
1254 			chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
1255 	}
1256 
1257 	// acknowledge the interrupt if necessary
1258 	outl(status, chip->port + CA0106_IPR);
1259 
1260 	return IRQ_HANDLED;
1261 }
1262 
1263 static const struct snd_pcm_chmap_elem surround_map[] = {
1264 	{ .channels = 2,
1265 	  .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1266 	{ }
1267 };
1268 
1269 static const struct snd_pcm_chmap_elem clfe_map[] = {
1270 	{ .channels = 2,
1271 	  .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
1272 	{ }
1273 };
1274 
1275 static const struct snd_pcm_chmap_elem side_map[] = {
1276 	{ .channels = 2,
1277 	  .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } },
1278 	{ }
1279 };
1280 
snd_ca0106_pcm(struct snd_ca0106 * emu,int device)1281 static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
1282 {
1283 	struct snd_pcm *pcm;
1284 	struct snd_pcm_substream *substream;
1285 	const struct snd_pcm_chmap_elem *map = NULL;
1286 	int err;
1287 
1288 	err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
1289 	if (err < 0)
1290 		return err;
1291 
1292 	pcm->private_data = emu;
1293 
1294 	switch (device) {
1295 	case 0:
1296 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
1297 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
1298 	  map = snd_pcm_std_chmaps;
1299           break;
1300 	case 1:
1301 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
1302 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
1303 	  map = surround_map;
1304           break;
1305 	case 2:
1306 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
1307 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
1308 	  map = clfe_map;
1309           break;
1310 	case 3:
1311 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
1312 	  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
1313 	  map = side_map;
1314           break;
1315         }
1316 
1317 	pcm->info_flags = 0;
1318 	strcpy(pcm->name, "CA0106");
1319 
1320 	for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1321 	    substream;
1322 	    substream = substream->next) {
1323 		snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
1324 					   &emu->pci->dev,
1325 					   64*1024, 64*1024);
1326 	}
1327 
1328 	for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
1329 	      substream;
1330 	      substream = substream->next) {
1331 		snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
1332 					   &emu->pci->dev,
1333 					   64*1024, 64*1024);
1334 	}
1335 
1336 	err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
1337 				     1 << 2, NULL);
1338 	if (err < 0)
1339 		return err;
1340 
1341 	emu->pcm[device] = pcm;
1342 
1343 	return 0;
1344 }
1345 
1346 #define SPI_REG(reg, value)	(((reg) << SPI_REG_SHIFT) | (value))
1347 static const unsigned int spi_dac_init[] = {
1348 	SPI_REG(SPI_LDA1_REG,	SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
1349 	SPI_REG(SPI_RDA1_REG,	SPI_DA_BIT_0dB),
1350 	SPI_REG(SPI_PL_REG,	SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
1351 	SPI_REG(SPI_FMT_REG,	SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
1352 	SPI_REG(SPI_LDA2_REG,	SPI_DA_BIT_0dB),
1353 	SPI_REG(SPI_RDA2_REG,	SPI_DA_BIT_0dB),
1354 	SPI_REG(SPI_LDA3_REG,	SPI_DA_BIT_0dB),
1355 	SPI_REG(SPI_RDA3_REG,	SPI_DA_BIT_0dB),
1356 	SPI_REG(SPI_MASTDA_REG,	SPI_DA_BIT_0dB),
1357 	SPI_REG(9,		0x00),
1358 	SPI_REG(SPI_MS_REG,	SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
1359 	SPI_REG(12,		0x00),
1360 	SPI_REG(SPI_LDA4_REG,	SPI_DA_BIT_0dB),
1361 	SPI_REG(SPI_RDA4_REG,	SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
1362 	SPI_REG(SPI_DACD4_REG,	SPI_DACD4_BIT),
1363 };
1364 
1365 static const unsigned int i2c_adc_init[][2] = {
1366 	{ 0x17, 0x00 }, /* Reset */
1367 	{ 0x07, 0x00 }, /* Timeout */
1368 	{ 0x0b, 0x22 },  /* Interface control */
1369 	{ 0x0c, 0x22 },  /* Master mode control */
1370 	{ 0x0d, 0x08 },  /* Powerdown control */
1371 	{ 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
1372 	{ 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
1373 	{ 0x10, 0x7b },  /* ALC Control 1 */
1374 	{ 0x11, 0x00 },  /* ALC Control 2 */
1375 	{ 0x12, 0x32 },  /* ALC Control 3 */
1376 	{ 0x13, 0x00 },  /* Noise gate control */
1377 	{ 0x14, 0xa6 },  /* Limiter control */
1378 	{ 0x15, ADC_MUX_LINEIN },  /* ADC Mixer control */
1379 };
1380 
ca0106_init_chip(struct snd_ca0106 * chip,int resume)1381 static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
1382 {
1383 	int ch;
1384 	unsigned int def_bits;
1385 
1386 	outl(0, chip->port + CA0106_INTE);
1387 
1388 	/*
1389 	 *  Init to 0x02109204 :
1390 	 *  Clock accuracy    = 0     (1000ppm)
1391 	 *  Sample Rate       = 2     (48kHz)
1392 	 *  Audio Channel     = 1     (Left of 2)
1393 	 *  Source Number     = 0     (Unspecified)
1394 	 *  Generation Status = 1     (Original for Cat Code 12)
1395 	 *  Cat Code          = 12    (Digital Signal Mixer)
1396 	 *  Mode              = 0     (Mode 0)
1397 	 *  Emphasis          = 0     (None)
1398 	 *  CP                = 1     (Copyright unasserted)
1399 	 *  AN                = 0     (Audio data)
1400 	 *  P                 = 0     (Consumer)
1401 	 */
1402 	def_bits =
1403 		SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1404 		SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1405 		SPCS_GENERATIONSTATUS | 0x00001200 |
1406 		0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1407 	if (!resume) {
1408 		chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
1409 		chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
1410 		chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
1411 		chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
1412 	}
1413 	/* Only SPCS1 has been tested */
1414 	snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
1415 	snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
1416 	snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
1417 	snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
1418 
1419         snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
1420         snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
1421 
1422         /* Write 0x8000 to AC97_REC_GAIN to mute it. */
1423         outb(AC97_REC_GAIN, chip->port + CA0106_AC97ADDRESS);
1424         outw(0x8000, chip->port + CA0106_AC97DATA);
1425 #if 0 /* FIXME: what are these? */
1426 	snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
1427 	snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
1428 	snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
1429 	snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
1430 #endif
1431 
1432 	/* OSS drivers set this. */
1433 	/* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
1434 
1435 	/* Analog or Digital output */
1436 	snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
1437 	/* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
1438 	 * Use 0x000f0000 for surround71
1439 	 */
1440 	snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
1441 
1442 	chip->spdif_enable = 0; /* Set digital SPDIF output off */
1443 	/*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
1444 	/*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
1445 
1446 	/* goes to 0x40c80000 when doing SPDIF IN/OUT */
1447 	snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
1448 	/* (Mute) CAPTURE feedback into PLAYBACK volume.
1449 	 * Only lower 16 bits matter.
1450 	 */
1451 	snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
1452 	/* SPDIF IN Volume */
1453 	snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
1454 	/* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
1455 	snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
1456 
1457 	snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
1458 	snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
1459 	snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
1460 	snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
1461 
1462 	for (ch = 0; ch < 4; ch++) {
1463 		/* Only high 16 bits matter */
1464 		snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
1465 		snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
1466 #if 0 /* Mute */
1467 		snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
1468 		snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
1469 		snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
1470 		snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
1471 #endif
1472 	}
1473 	if (chip->details->i2c_adc == 1) {
1474 	        /* Select MIC, Line in, TAD in, AUX in */
1475 	        snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1476 		/* Default to CAPTURE_SOURCE to i2s in */
1477 		if (!resume)
1478 			chip->capture_source = 3;
1479 	} else if (chip->details->ac97 == 1) {
1480 	        /* Default to AC97 in */
1481 	        snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
1482 		/* Default to CAPTURE_SOURCE to AC97 in */
1483 		if (!resume)
1484 			chip->capture_source = 4;
1485 	} else {
1486 	        /* Select MIC, Line in, TAD in, AUX in */
1487 	        snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1488 		/* Default to Set CAPTURE_SOURCE to i2s in */
1489 		if (!resume)
1490 			chip->capture_source = 3;
1491 	}
1492 
1493 	if (chip->details->gpio_type == 2) {
1494 		/* The SB0438 use GPIO differently. */
1495 		/* FIXME: Still need to find out what the other GPIO bits do.
1496 		 * E.g. For digital spdif out.
1497 		 */
1498 		outl(0x0, chip->port + CA0106_GPIO);
1499 		/* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
1500 		outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
1501 	} else if (chip->details->gpio_type == 1) {
1502 		/* The SB0410 and SB0413 use GPIO differently. */
1503 		/* FIXME: Still need to find out what the other GPIO bits do.
1504 		 * E.g. For digital spdif out.
1505 		 */
1506 		outl(0x0, chip->port + CA0106_GPIO);
1507 		/* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
1508 		outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
1509 	} else {
1510 		outl(0x0, chip->port + CA0106_GPIO);
1511 		outl(0x005f03a3, chip->port + CA0106_GPIO); /* Analog */
1512 		/* outl(0x005f02a2, chip->port + CA0106_GPIO); */ /* SPDIF */
1513 	}
1514 	snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
1515 
1516 	/* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
1517 	/* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
1518 	/* outl(0x00001409, chip->port + CA0106_HCFG); */
1519 	/* outl(0x00000009, chip->port + CA0106_HCFG); */
1520 	/* AC97 2.0, Enable outputs. */
1521 	outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port + CA0106_HCFG);
1522 
1523 	if (chip->details->i2c_adc == 1) {
1524 		/* The SB0410 and SB0413 use I2C to control ADC. */
1525 		int size, n;
1526 
1527 		size = ARRAY_SIZE(i2c_adc_init);
1528 		/* dev_dbg(emu->card->dev, "I2C:array size=0x%x\n", size); */
1529 		for (n = 0; n < size; n++)
1530 			snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
1531 					     i2c_adc_init[n][1]);
1532 		for (n = 0; n < 4; n++) {
1533 			chip->i2c_capture_volume[n][0] = 0xcf;
1534 			chip->i2c_capture_volume[n][1] = 0xcf;
1535 		}
1536 		chip->i2c_capture_source = 2; /* Line in */
1537 		/* Enable Line-in capture. MIC in currently untested. */
1538 		/* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
1539 	}
1540 
1541 	if (chip->details->spi_dac) {
1542 		/* The SB0570 use SPI to control DAC. */
1543 		int size, n;
1544 
1545 		size = ARRAY_SIZE(spi_dac_init);
1546 		for (n = 0; n < size; n++) {
1547 			int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
1548 
1549 			snd_ca0106_spi_write(chip, spi_dac_init[n]);
1550 			if (reg < ARRAY_SIZE(chip->spi_dac_reg))
1551 				chip->spi_dac_reg[reg] = spi_dac_init[n];
1552 		}
1553 
1554 		/* Enable front dac only */
1555 		snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1);
1556 	}
1557 }
1558 
ca0106_stop_chip(struct snd_ca0106 * chip)1559 static void ca0106_stop_chip(struct snd_ca0106 *chip)
1560 {
1561 	/* disable interrupts */
1562 	snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
1563 	outl(0, chip->port + CA0106_INTE);
1564 	snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
1565 	udelay(1000);
1566 	/* disable audio */
1567 	/* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
1568 	outl(0, chip->port + CA0106_HCFG);
1569 	/* FIXME: We need to stop and DMA transfers here.
1570 	 *        But as I am not sure how yet, we cannot from the dma pages.
1571 	 * So we can fix: snd-malloc: Memory leak?  pages not freed = 8
1572 	 */
1573 }
1574 
snd_ca0106_create(int dev,struct snd_card * card,struct pci_dev * pci)1575 static int snd_ca0106_create(int dev, struct snd_card *card,
1576 			     struct pci_dev *pci)
1577 {
1578 	struct snd_ca0106 *chip = card->private_data;
1579 	const struct snd_ca0106_details *c;
1580 	int err;
1581 
1582 	err = pcim_enable_device(pci);
1583 	if (err < 0)
1584 		return err;
1585 	if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) {
1586 		dev_err(card->dev, "error to set 32bit mask DMA\n");
1587 		return -ENXIO;
1588 	}
1589 
1590 	chip->card = card;
1591 	chip->pci = pci;
1592 	chip->irq = -1;
1593 
1594 	spin_lock_init(&chip->emu_lock);
1595 
1596 	err = pci_request_regions(pci, "snd_ca0106");
1597 	if (err < 0)
1598 		return err;
1599 	chip->port = pci_resource_start(pci, 0);
1600 
1601 	if (devm_request_irq(&pci->dev, pci->irq, snd_ca0106_interrupt,
1602 			     IRQF_SHARED, KBUILD_MODNAME, chip)) {
1603 		dev_err(card->dev, "cannot grab irq\n");
1604 		return -EBUSY;
1605 	}
1606 	chip->irq = pci->irq;
1607 	card->sync_irq = chip->irq;
1608 
1609 	/* This stores the periods table. */
1610 	chip->buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 1024);
1611 	if (!chip->buffer)
1612 		return -ENOMEM;
1613 
1614 	pci_set_master(pci);
1615 	/* read serial */
1616 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
1617 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
1618 	dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n",
1619 	       chip->model, pci->revision, chip->serial);
1620 	strcpy(card->driver, "CA0106");
1621 	strcpy(card->shortname, "CA0106");
1622 
1623 	for (c = ca0106_chip_details; c->serial; c++) {
1624 		if (subsystem[dev]) {
1625 			if (c->serial == subsystem[dev])
1626 				break;
1627 		} else if (c->serial == chip->serial)
1628 			break;
1629 	}
1630 	chip->details = c;
1631 	if (subsystem[dev]) {
1632 		dev_info(card->dev, "Sound card name=%s, "
1633 		       "subsystem=0x%x. Forced to subsystem=0x%x\n",
1634 		       c->name, chip->serial, subsystem[dev]);
1635 	}
1636 
1637 	sprintf(card->longname, "%s at 0x%lx irq %i",
1638 		c->name, chip->port, chip->irq);
1639 
1640 	ca0106_init_chip(chip, 0);
1641 	return 0;
1642 }
1643 
1644 
ca0106_midi_interrupt_enable(struct snd_ca_midi * midi,int intr)1645 static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
1646 {
1647 	snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
1648 }
1649 
ca0106_midi_interrupt_disable(struct snd_ca_midi * midi,int intr)1650 static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
1651 {
1652 	snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
1653 }
1654 
ca0106_midi_read(struct snd_ca_midi * midi,int idx)1655 static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
1656 {
1657 	return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
1658 						  midi->port + idx, 0);
1659 }
1660 
ca0106_midi_write(struct snd_ca_midi * midi,int data,int idx)1661 static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
1662 {
1663 	snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
1664 }
1665 
ca0106_dev_id_card(void * dev_id)1666 static struct snd_card *ca0106_dev_id_card(void *dev_id)
1667 {
1668 	return ((struct snd_ca0106 *)dev_id)->card;
1669 }
1670 
ca0106_dev_id_port(void * dev_id)1671 static int ca0106_dev_id_port(void *dev_id)
1672 {
1673 	return ((struct snd_ca0106 *)dev_id)->port;
1674 }
1675 
snd_ca0106_midi(struct snd_ca0106 * chip,unsigned int channel)1676 static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
1677 {
1678 	struct snd_ca_midi *midi;
1679 	char *name;
1680 	int err;
1681 
1682 	if (channel == CA0106_MIDI_CHAN_B) {
1683 		name = "CA0106 MPU-401 (UART) B";
1684 		midi =  &chip->midi2;
1685 		midi->tx_enable = INTE_MIDI_TX_B;
1686 		midi->rx_enable = INTE_MIDI_RX_B;
1687 		midi->ipr_tx = IPR_MIDI_TX_B;
1688 		midi->ipr_rx = IPR_MIDI_RX_B;
1689 		midi->port = MIDI_UART_B_DATA;
1690 	} else {
1691 		name = "CA0106 MPU-401 (UART)";
1692 		midi =  &chip->midi;
1693 		midi->tx_enable = INTE_MIDI_TX_A;
1694 		midi->rx_enable = INTE_MIDI_TX_B;
1695 		midi->ipr_tx = IPR_MIDI_TX_A;
1696 		midi->ipr_rx = IPR_MIDI_RX_A;
1697 		midi->port = MIDI_UART_A_DATA;
1698 	}
1699 
1700 	midi->reset = CA0106_MPU401_RESET;
1701 	midi->enter_uart = CA0106_MPU401_ENTER_UART;
1702 	midi->ack = CA0106_MPU401_ACK;
1703 
1704 	midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
1705 	midi->output_ready = CA0106_MIDI_OUTPUT_READY;
1706 
1707 	midi->channel = channel;
1708 
1709 	midi->interrupt_enable = ca0106_midi_interrupt_enable;
1710 	midi->interrupt_disable = ca0106_midi_interrupt_disable;
1711 
1712 	midi->read = ca0106_midi_read;
1713 	midi->write = ca0106_midi_write;
1714 
1715 	midi->get_dev_id_card = ca0106_dev_id_card;
1716 	midi->get_dev_id_port = ca0106_dev_id_port;
1717 
1718 	midi->dev_id = chip;
1719 
1720 	err = ca_midi_init(chip, midi, 0, name);
1721 	if (err < 0)
1722 		return err;
1723 
1724 	return 0;
1725 }
1726 
1727 
__snd_ca0106_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)1728 static int __snd_ca0106_probe(struct pci_dev *pci,
1729 			      const struct pci_device_id *pci_id)
1730 {
1731 	static int dev;
1732 	struct snd_card *card;
1733 	struct snd_ca0106 *chip;
1734 	int i, err;
1735 
1736 	if (dev >= SNDRV_CARDS)
1737 		return -ENODEV;
1738 	if (!enable[dev]) {
1739 		dev++;
1740 		return -ENOENT;
1741 	}
1742 
1743 	err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1744 				sizeof(*chip), &card);
1745 	if (err < 0)
1746 		return err;
1747 	chip = card->private_data;
1748 
1749 	err = snd_ca0106_create(dev, card, pci);
1750 	if (err < 0)
1751 		return err;
1752 	card->private_free = snd_ca0106_free;
1753 
1754 	for (i = 0; i < 4; i++) {
1755 		err = snd_ca0106_pcm(chip, i);
1756 		if (err < 0)
1757 			return err;
1758 	}
1759 
1760 	if (chip->details->ac97 == 1) {
1761 		/* The SB0410 and SB0413 do not have an AC97 chip. */
1762 		err = snd_ca0106_ac97(chip);
1763 		if (err < 0)
1764 			return err;
1765 	}
1766 	err = snd_ca0106_mixer(chip);
1767 	if (err < 0)
1768 		return err;
1769 
1770 	dev_dbg(card->dev, "probe for MIDI channel A ...");
1771 	err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
1772 	if (err < 0)
1773 		return err;
1774 	dev_dbg(card->dev, " done.\n");
1775 
1776 #ifdef CONFIG_SND_PROC_FS
1777 	snd_ca0106_proc_init(chip);
1778 #endif
1779 
1780 	err = snd_card_register(card);
1781 	if (err < 0)
1782 		return err;
1783 
1784 	pci_set_drvdata(pci, card);
1785 	dev++;
1786 	return 0;
1787 }
1788 
snd_ca0106_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)1789 static int snd_ca0106_probe(struct pci_dev *pci,
1790 			    const struct pci_device_id *pci_id)
1791 {
1792 	return snd_card_free_on_error(&pci->dev, __snd_ca0106_probe(pci, pci_id));
1793 }
1794 
1795 #ifdef CONFIG_PM_SLEEP
snd_ca0106_suspend(struct device * dev)1796 static int snd_ca0106_suspend(struct device *dev)
1797 {
1798 	struct snd_card *card = dev_get_drvdata(dev);
1799 	struct snd_ca0106 *chip = card->private_data;
1800 
1801 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1802 	if (chip->details->ac97)
1803 		snd_ac97_suspend(chip->ac97);
1804 	snd_ca0106_mixer_suspend(chip);
1805 
1806 	ca0106_stop_chip(chip);
1807 	return 0;
1808 }
1809 
snd_ca0106_resume(struct device * dev)1810 static int snd_ca0106_resume(struct device *dev)
1811 {
1812 	struct snd_card *card = dev_get_drvdata(dev);
1813 	struct snd_ca0106 *chip = card->private_data;
1814 	int i;
1815 
1816 	ca0106_init_chip(chip, 1);
1817 
1818 	if (chip->details->ac97)
1819 		snd_ac97_resume(chip->ac97);
1820 	snd_ca0106_mixer_resume(chip);
1821 	if (chip->details->spi_dac) {
1822 		for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
1823 			snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
1824 	}
1825 
1826 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1827 	return 0;
1828 }
1829 
1830 static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume);
1831 #define SND_CA0106_PM_OPS	&snd_ca0106_pm
1832 #else
1833 #define SND_CA0106_PM_OPS	NULL
1834 #endif
1835 
1836 // PCI IDs
1837 static const struct pci_device_id snd_ca0106_ids[] = {
1838 	{ PCI_VDEVICE(CREATIVE, 0x0007), 0 },	/* Audigy LS or Live 24bit */
1839 	{ 0, }
1840 };
1841 MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
1842 
1843 // pci_driver definition
1844 static struct pci_driver ca0106_driver = {
1845 	.name = KBUILD_MODNAME,
1846 	.id_table = snd_ca0106_ids,
1847 	.probe = snd_ca0106_probe,
1848 	.driver = {
1849 		.pm = SND_CA0106_PM_OPS,
1850 	},
1851 };
1852 
1853 module_pci_driver(ca0106_driver);
1854