xref: /linux/sound/soc/codecs/aw87390.h (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e) 
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // aw87390.h  --  aw87390 ALSA SoC Audio driver
4 //
5 // Copyright (c) 2023 awinic Technology CO., LTD
6 //
7 // Author: Weidong Wang <wangweidong.a@awinic.com>
8 //
9 
10 #ifndef __AW87390_H__
11 #define __AW87390_H__
12 
13 #define AW87390_ID_REG			(0x00)
14 #define AW87390_SYSCTRL_REG		(0x01)
15 #define AW87390_MDCTRL_REG		(0x02)
16 #define AW87390_CPOVP_REG		(0x03)
17 #define AW87390_CPP_REG		(0x04)
18 #define AW87390_PAG_REG		(0x05)
19 #define AW87390_AGC3P_REG		(0x06)
20 #define AW87390_AGC3PA_REG		(0x07)
21 #define AW87390_AGC2P_REG		(0x08)
22 #define AW87390_AGC2PA_REG		(0x09)
23 #define AW87390_AGC1PA_REG		(0x0A)
24 #define AW87390_SYSST_REG		(0x59)
25 #define AW87390_SYSINT_REG		(0x60)
26 #define AW87390_DFT_SYSCTRL_REG	(0x61)
27 #define AW87390_DFT_MDCTRL_REG		(0x62)
28 #define AW87390_DFT_CPADP_REG		(0x63)
29 #define AW87390_DFT_AGCPA_REG		(0x64)
30 #define AW87390_DFT_POFR_REG		(0x65)
31 #define AW87390_DFT_OC_REG		(0x66)
32 #define AW87390_DFT_ADP1_REG		(0x67)
33 #define AW87390_DFT_REF_REG		(0x68)
34 #define AW87390_DFT_LDO_REG		(0x69)
35 #define AW87390_ADP1_REG		(0x70)
36 #define AW87390_ADP2_REG		(0x71)
37 #define AW87390_NG1_REG		(0x72)
38 #define AW87390_NG2_REG		(0x73)
39 #define AW87390_NG3_REG		(0x74)
40 #define AW87390_CP_REG			(0x75)
41 #define AW87390_AB_REG			(0x76)
42 #define AW87390_TEST_REG		(0x77)
43 #define AW87390_ENCR_REG		(0x78)
44 #define AW87390_DELAY_REG_ADDR		(0xFE)
45 
46 #define AW87390_SOFT_RESET_VALUE	(0xAA)
47 #define AW87390_POWER_DOWN_VALUE	(0x00)
48 #define AW87390_REG_MAX		(0xFF)
49 #define AW87390_DEV_DEFAULT_CH		(0)
50 #define AW87390_INIT_PROFILE		(0)
51 #define AW87390_REG_DELAY_TIME		(1000)
52 #define AW87390_I2C_NAME		"aw87390"
53 #define AW87390_ACF_FILE		"aw87390_acf.bin"
54 
55 #define AW87391_SYSCTRL_REG		(0x01)
56 #define AW87391_REG_VER_SEL_LOW		(0 << 6)
57 #define AW87391_REG_VER_SEL_NORMAL	(1 << 6)
58 #define AW87391_REG_VER_SEL_SUPER	(2 << 6)
59 #define AW87391_REG_EN_ADAP		BIT(5)
60 #define AW87391_REG_EN_2X		BIT(4)
61 #define AW87391_EN_SPK			BIT(3)
62 #define AW87391_EN_PA			BIT(2)
63 #define AW87391_REG_EN_CP		BIT(1)
64 #define AW87391_EN_SW			BIT(0)
65 
66 #define AW87391_CP_REG                  (0x02)
67 #define AW87391_REG_CP_OVP_6_50V	0
68 #define AW87391_REG_CP_OVP_6_75V	1
69 #define AW87391_REG_CP_OVP_7_00V	2
70 #define AW87391_REG_CP_OVP_7_25V	3
71 #define AW87391_REG_CP_OVP_7_50V	4
72 #define AW87391_REG_CP_OVP_7_75V	5
73 #define AW87391_REG_CP_OVP_8_00V	6
74 #define AW87391_REG_CP_OVP_8_25V	7
75 #define AW87391_REG_CP_OVP_8_50V	8
76 
77 #define AW87391_PAG_REG                 (0x03)
78 #define AW87391_GAIN_12DB		0
79 #define AW87391_GAIN_15DB		1
80 #define AW87391_GAIN_18DB		2
81 #define AW87391_GAIN_21DB		3
82 #define AW87391_GAIN_24DB		4
83 
84 #define AW87391_AGCPO_REG               (0x04)
85 #define AW87391_AK1_S_016		(2 << 5)
86 #define AW87391_AK1_S_032		(3 << 5)
87 #define AW87391_PD_AGC1_PWRDN		BIT(4)
88 /* AGC2PO supports values between 500mW (0000) to 1600mW (1011) */
89 #define AW87391_AGC2PO_MW(n)		((n / 100) - 5)
90 
91 #define AW87391_AGC2PA_REG              (0x05)
92 #define AW87391_RK_S_5_12		(0 << 5)
93 #define AW87391_RK_S_10_24		(1 << 5)
94 #define AW87391_RK_S_20_48		(2 << 5)
95 #define AW87391_RK_S_41			(3 << 5)
96 #define AW87391_RK_S_82			(4 << 5)
97 #define AW87391_RK_S_164		(5 << 5)
98 #define AW87391_RK_S_328		(6 << 5)
99 #define AW87391_RK_S_656		(7 << 5)
100 #define AW87391_AK2_S_1_28		(0 << 2)
101 #define AW87391_AK2_S_2_56		(1 << 2)
102 #define AW87391_AK2_S_10_24		(2 << 2)
103 #define AW87391_AK2_S_41		(3 << 2)
104 #define AW87391_AK2_S_82		(4 << 2)
105 #define AW87391_AK2_S_164		(5 << 2)
106 #define AW87391_AK2_S_328		(6 << 2)
107 #define AW87391_AK2_S_656		(7 << 2)
108 #define AW87391_AK2F_S_10_24		0
109 #define AW87391_AK2F_S_20_48		1
110 #define AW87391_AK2F_S_41		2
111 #define AW87391_AK2F_S_82		3
112 
113 #define AW87391_SYSST_REG               (0x06)
114 #define AW87391_UVLO			BIT(7)
115 #define AW87391_OTN			BIT(6)
116 #define AW87391_OC_FLAG			BIT(5)
117 #define AW87391_ADAP_CP			BIT(4)
118 #define AW87391_STARTOK			BIT(3)
119 #define AW87391_CP_OVP			BIT(2)
120 #define AW87391_PORN			BIT(1)
121 
122 #define AW87391_SYSINT_REG              (0x07)
123 #define AW87391_UVLOI			BIT(7)
124 #define AW87391_ONTI			BIT(6)
125 #define AW87391_OC_FLAGI		BIT(5)
126 #define AW87391_ADAP_CPI		BIT(4)
127 #define AW87391_STARTOKI		BIT(3)
128 #define AW87391_CP_OVPI			BIT(2)
129 #define AW87391_PORNI			BIT(1)
130 
131 #define AW87391_DFT_THGEN0_REG          (0x63)
132 #define AW87391_ADAPVTH_01W		(0 << 2)
133 #define AW87391_ADAPVTH_02W		(1 << 2)
134 #define AW87391_ADAPVTH_03W		(2 << 2)
135 #define AW87391_ADAPVTH_04W		(3 << 2)
136 
137 #define AW87391_I2C_NAME                "aw87391"
138 
139 #define AW87390_PROFILE_EXT(xname, profile_info, profile_get, profile_set) \
140 { \
141 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
142 	.name = xname, \
143 	.info = profile_info, \
144 	.get = profile_get, \
145 	.put = profile_set, \
146 }
147 
148 enum aw87390_id {
149 	AW87390_CHIP_ID = 0x76,
150 	AW87391_CHIP_ID = 0xc1,
151 };
152 
153 enum {
154 	AW87390_DEV_FW_FAILED = 0,
155 	AW87390_DEV_FW_OK,
156 };
157 
158 enum {
159 	AW87390_DEV_PW_OFF = 0,
160 	AW87390_DEV_PW_ON,
161 };
162 
163 struct aw87390 {
164 	struct aw_device *aw_pa;
165 	struct mutex lock;
166 	struct regmap *regmap;
167 	struct aw_container *aw_cfg;
168 	struct regulator *vdd_reg;
169 };
170 
171 #endif
172