xref: /linux/arch/sh/include/mach-dreamcast/mach/sysasic.h (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1 /* SPDX-License-Identifier: GPL-2.0
2  *
3  * include/asm-sh/dreamcast/sysasic.h
4  *
5  * Definitions for the Dreamcast System ASIC and related peripherals.
6  *
7  * Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
8  * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
9  *
10  * This file is part of the LinuxDC project (www.linuxdc.org)
11  */
12 #ifndef __ASM_SH_DREAMCAST_SYSASIC_H
13 #define __ASM_SH_DREAMCAST_SYSASIC_H
14 
15 #include <asm/irq.h>
16 
17 /* Hardware events -
18 
19    Each of these events correspond to a bit within the Event Mask Registers/
20    Event Status Registers.  Because of the virtual IRQ numbering scheme, a
21    base offset must be used when calculating the virtual IRQ that each event
22    takes.
23 */
24 
25 #define HW_EVENT_IRQ_BASE  (48 + 16)
26 
27 /* IRQ 13 */
28 #define HW_EVENT_VSYNC     (HW_EVENT_IRQ_BASE +  5) /* VSync */
29 #define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */
30 #define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
31 #define HW_EVENT_G2_DMA    (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */
32 #define HW_EVENT_PVR2_DMA  (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
33 
34 /* IRQ 11 */
35 #define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
36 #define HW_EVENT_AICA_SYS  (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
37 #define HW_EVENT_EXTERNAL  (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */
38 
39 #define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
40 
41 /* arch/sh/boards/mach-dreamcast/irq.c */
42 extern int systemasic_irq_demux(int);
43 extern void systemasic_irq_init(void);
44 
45 #endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
46 
47