xref: /linux/drivers/accel/amdxdna/amdxdna_pci_drv.h (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
4  */
5 
6 #ifndef _AMDXDNA_PCI_DRV_H_
7 #define _AMDXDNA_PCI_DRV_H_
8 
9 #include <linux/xarray.h>
10 
11 #define XDNA_INFO(xdna, fmt, args...)	drm_info(&(xdna)->ddev, fmt, ##args)
12 #define XDNA_WARN(xdna, fmt, args...)	drm_warn(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
13 #define XDNA_ERR(xdna, fmt, args...)	drm_err(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
14 #define XDNA_DBG(xdna, fmt, args...)	drm_dbg(&(xdna)->ddev, fmt, ##args)
15 #define XDNA_INFO_ONCE(xdna, fmt, args...) drm_info_once(&(xdna)->ddev, fmt, ##args)
16 
17 #define XDNA_MBZ_DBG(xdna, ptr, sz)					\
18 	({								\
19 		int __i;						\
20 		int __ret = 0;						\
21 		u8 *__ptr = (u8 *)(ptr);				\
22 		for (__i = 0; __i < (sz); __i++) {			\
23 			if (__ptr[__i]) {				\
24 				XDNA_DBG(xdna, "MBZ check failed");	\
25 				__ret = -EINVAL;			\
26 				break;					\
27 			}						\
28 		}							\
29 		__ret;							\
30 	})
31 
32 #define to_xdna_dev(drm_dev) \
33 	((struct amdxdna_dev *)container_of(drm_dev, struct amdxdna_dev, ddev))
34 
35 extern const struct drm_driver amdxdna_drm_drv;
36 
37 struct amdxdna_client;
38 struct amdxdna_dev;
39 struct amdxdna_drm_get_info;
40 struct amdxdna_drm_set_state;
41 struct amdxdna_gem_obj;
42 struct amdxdna_hwctx;
43 struct amdxdna_sched_job;
44 
45 /*
46  * struct amdxdna_dev_ops - Device hardware operation callbacks
47  */
48 struct amdxdna_dev_ops {
49 	int (*init)(struct amdxdna_dev *xdna);
50 	void (*fini)(struct amdxdna_dev *xdna);
51 	int (*resume)(struct amdxdna_dev *xdna);
52 	void (*suspend)(struct amdxdna_dev *xdna);
53 	int (*hwctx_init)(struct amdxdna_hwctx *hwctx);
54 	void (*hwctx_fini)(struct amdxdna_hwctx *hwctx);
55 	int (*hwctx_config)(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *buf, u32 size);
56 	void (*hmm_invalidate)(struct amdxdna_gem_obj *abo, unsigned long cur_seq);
57 	void (*hwctx_suspend)(struct amdxdna_hwctx *hwctx);
58 	void (*hwctx_resume)(struct amdxdna_hwctx *hwctx);
59 	int (*cmd_submit)(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, u64 *seq);
60 	int (*get_aie_info)(struct amdxdna_client *client, struct amdxdna_drm_get_info *args);
61 	int (*set_aie_state)(struct amdxdna_client *client, struct amdxdna_drm_set_state *args);
62 };
63 
64 /*
65  * struct amdxdna_dev_info - Device hardware information
66  * Record device static information, like reg, mbox, PSP, SMU bar index
67  */
68 struct amdxdna_dev_info {
69 	int				reg_bar;
70 	int				mbox_bar;
71 	int				sram_bar;
72 	int				psp_bar;
73 	int				smu_bar;
74 	int				device_type;
75 	int				first_col;
76 	u32				dev_mem_buf_shift;
77 	u64				dev_mem_base;
78 	size_t				dev_mem_size;
79 	char				*vbnv;
80 	const struct amdxdna_dev_priv	*dev_priv;
81 	const struct amdxdna_dev_ops	*ops;
82 };
83 
84 struct amdxdna_fw_ver {
85 	u32 major;
86 	u32 minor;
87 	u32 sub;
88 	u32 build;
89 };
90 
91 struct amdxdna_dev {
92 	struct drm_device		ddev;
93 	struct amdxdna_dev_hdl		*dev_handle;
94 	const struct amdxdna_dev_info	*dev_info;
95 	void				*xrs_hdl;
96 
97 	struct mutex			dev_lock; /* per device lock */
98 	struct list_head		client_list;
99 	struct amdxdna_fw_ver		fw_ver;
100 	struct rw_semaphore		notifier_lock; /* for mmu notifier*/
101 };
102 
103 /*
104  * struct amdxdna_device_id - PCI device info
105  */
106 struct amdxdna_device_id {
107 	unsigned short device;
108 	u8 revision;
109 	const struct amdxdna_dev_info *dev_info;
110 };
111 
112 /*
113  * struct amdxdna_client - amdxdna client
114  * A per fd data structure for managing context and other user process stuffs.
115  */
116 struct amdxdna_client {
117 	struct list_head		node;
118 	pid_t				pid;
119 	struct mutex			hwctx_lock; /* protect hwctx */
120 	/* do NOT wait this srcu when hwctx_lock is held */
121 	struct srcu_struct		hwctx_srcu;
122 	struct xarray			hwctx_xa;
123 	u32				next_hwctxid;
124 	struct amdxdna_dev		*xdna;
125 	struct drm_file			*filp;
126 
127 	struct mutex			mm_lock; /* protect memory related */
128 	struct amdxdna_gem_obj		*dev_heap;
129 
130 	struct iommu_sva		*sva;
131 	int				pasid;
132 };
133 
134 #define amdxdna_for_each_hwctx(client, hwctx_id, entry)		\
135 	xa_for_each(&(client)->hwctx_xa, hwctx_id, entry)
136 
137 /* Add device info below */
138 extern const struct amdxdna_dev_info dev_npu1_info;
139 extern const struct amdxdna_dev_info dev_npu2_info;
140 extern const struct amdxdna_dev_info dev_npu4_info;
141 extern const struct amdxdna_dev_info dev_npu5_info;
142 extern const struct amdxdna_dev_info dev_npu6_info;
143 
144 int amdxdna_sysfs_init(struct amdxdna_dev *xdna);
145 void amdxdna_sysfs_fini(struct amdxdna_dev *xdna);
146 
147 #endif /* _AMDXDNA_PCI_DRV_H_ */
148