xref: /linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/ethernet-driver.rst (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1.. SPDX-License-Identifier: GPL-2.0
2.. include:: <isonum.txt>
3
4===============================
5DPAA2 Ethernet driver
6===============================
7
8:Copyright: |copy| 2017-2018 NXP
9
10This file provides documentation for the Freescale DPAA2 Ethernet driver.
11
12Supported Platforms
13===================
14This driver provides networking support for Freescale DPAA2 SoCs, e.g.
15LS2080A, LS2088A, LS1088A.
16
17
18Architecture Overview
19=====================
20Unlike regular NICs, in the DPAA2 architecture there is no single hardware block
21representing network interfaces; instead, several separate hardware resources
22concur to provide the networking functionality:
23
24- network interfaces
25- queues, channels
26- buffer pools
27- MAC/PHY
28
29All hardware resources are allocated and configured through the Management
30Complex (MC) portals. MC abstracts most of these resources as DPAA2 objects
31and exposes ABIs through which they can be configured and controlled. A few
32hardware resources, like queues, do not have a corresponding MC object and
33are treated as internal resources of other objects.
34
35For a more detailed description of the DPAA2 architecture and its object
36abstractions see
37*Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst*.
38
39Each Linux net device is built on top of a Datapath Network Interface (DPNI)
40object and uses Buffer Pools (DPBPs), I/O Portals (DPIOs) and Concentrators
41(DPCONs).
42
43Configuration interface::
44
45                 -----------------------
46                | DPAA2 Ethernet Driver |
47                 -----------------------
48                     .      .      .
49                     .      .      .
50             . . . . .      .      . . . . . .
51             .              .                .
52             .              .                .
53         ----------     ----------      -----------
54        | DPBP API |   | DPNI API |    | DPCON API |
55         ----------     ----------      -----------
56             .              .                .             software
57    =======  .  ==========  .  ============  .  ===================
58             .              .                .             hardware
59         ------------------------------------------
60        |            MC hardware portals           |
61         ------------------------------------------
62             .              .                .
63             .              .                .
64          ------         ------            -------
65         | DPBP |       | DPNI |          | DPCON |
66          ------         ------            -------
67
68The DPNIs are network interfaces without a direct one-on-one mapping to PHYs.
69DPBPs represent hardware buffer pools. Packet I/O is performed in the context
70of DPCON objects, using DPIO portals for managing and communicating with the
71hardware resources.
72
73Datapath (I/O) interface::
74
75         -----------------------------------------------
76        |           DPAA2 Ethernet Driver               |
77         -----------------------------------------------
78          |          ^        ^         |            |
79          |          |        |         |            |
80   enqueue|   dequeue|   data |  dequeue|       seed |
81    (Tx)  | (Rx, TxC)|  avail.|  request|     buffers|
82          |          |  notify|         |            |
83          |          |        |         |            |
84          V          |        |         V            V
85         -----------------------------------------------
86        |                 DPIO Driver                   |
87         -----------------------------------------------
88          |          |        |         |            |          software
89          |          |        |         |            |  ================
90          |          |        |         |            |          hardware
91         -----------------------------------------------
92        |               I/O hardware portals            |
93         -----------------------------------------------
94          |          ^        ^         |            |
95          |          |        |         |            |
96          |          |        |         V            |
97          V          |    ================           V
98        ----------------------           |      -------------
99 queues  ----------------------          |     | Buffer pool |
100          ----------------------         |      -------------
101                   =======================
102                                Channel
103
104Datapath I/O (DPIO) portals provide enqueue and dequeue services, data
105availability notifications and buffer pool management. DPIOs are shared between
106all DPAA2 objects (and implicitly all DPAA2 kernel drivers) that work with data
107frames, but must be affine to the CPUs for the purpose of traffic distribution.
108
109Frames are transmitted and received through hardware frame queues, which can be
110grouped in channels for the purpose of hardware scheduling. The Ethernet driver
111enqueues TX frames on egress queues and after transmission is complete a TX
112confirmation frame is sent back to the CPU.
113
114When frames are available on ingress queues, a data availability notification
115is sent to the CPU; notifications are raised per channel, so even if multiple
116queues in the same channel have available frames, only one notification is sent.
117After a channel fires a notification, is must be explicitly rearmed.
118
119Each network interface can have multiple Rx, Tx and confirmation queues affined
120to CPUs, and one channel (DPCON) for each CPU that services at least one queue.
121DPCONs are used to distribute ingress traffic to different CPUs via the cores'
122affine DPIOs.
123
124The role of hardware buffer pools is storage of ingress frame data. Each network
125interface has a privately owned buffer pool which it seeds with kernel allocated
126buffers.
127
128
129DPNIs are decoupled from PHYs; a DPNI can be connected to a PHY through a DPMAC
130object or to another DPNI through an internal link, but the connection is
131managed by MC and completely transparent to the Ethernet driver.
132
133::
134
135     ---------     ---------     ---------
136    | eth if1 |   | eth if2 |   | eth ifn |
137     ---------     ---------     ---------
138          .           .          .
139          .           .          .
140          .           .          .
141         ---------------------------
142        |   DPAA2 Ethernet Driver   |
143         ---------------------------
144          .           .          .
145          .           .          .
146          .           .          .
147       ------      ------      ------            -------
148      | DPNI |    | DPNI |    | DPNI |          | DPMAC |----+
149       ------      ------      ------            -------     |
150         |           |           |                  |        |
151         |           |           |                  |      -----
152          ===========             ==================      | PHY |
153                                                           -----
154
155Creating a Network Interface
156============================
157A net device is created for each DPNI object probed on the MC bus. Each DPNI has
158a number of properties which determine the network interface configuration
159options and associated hardware resources.
160
161DPNI objects (and the other DPAA2 objects needed for a network interface) can be
162added to a container on the MC bus in one of two ways: statically, through a
163Datapath Layout Binary file (DPL) that is parsed by MC at boot time; or created
164dynamically at runtime, via the DPAA2 objects APIs.
165
166
167Features & Offloads
168===================
169Hardware checksum offloading is supported for TCP and UDP over IPv4/6 frames.
170The checksum offloads can be independently configured on RX and TX through
171ethtool.
172
173Hardware offload of unicast and multicast MAC filtering is supported on the
174ingress path and permanently enabled.
175
176Scatter-gather frames are supported on both RX and TX paths. On TX, SG support
177is configurable via ethtool; on RX it is always enabled.
178
179The DPAA2 hardware can process jumbo Ethernet frames of up to 10K bytes.
180
181The Ethernet driver defines a static flow hashing scheme that distributes
182traffic based on a 5-tuple key: src IP, dst IP, IP proto, L4 src port,
183L4 dst port. No user configuration is supported for now.
184
185Hardware specific statistics for the network interface as well as some
186non-standard driver stats can be consulted through ethtool -S option.
187