1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8226-tsens 33 - qcom,msm8909-tsens 34 - qcom,msm8916-tsens 35 - qcom,msm8939-tsens 36 - qcom,msm8974-tsens 37 - const: qcom,tsens-v0_1 38 39 - description: v1 of TSENS 40 items: 41 - enum: 42 - qcom,ipq5018-tsens 43 - qcom,msm8937-tsens 44 - qcom,msm8956-tsens 45 - qcom,msm8976-tsens 46 - qcom,qcs404-tsens 47 - const: qcom,tsens-v1 48 49 - description: v2 of TSENS 50 items: 51 - enum: 52 - qcom,milos-tsens 53 - qcom,msm8953-tsens 54 - qcom,msm8996-tsens 55 - qcom,msm8998-tsens 56 - qcom,qcm2290-tsens 57 - qcom,sa8255p-tsens 58 - qcom,sa8775p-tsens 59 - qcom,sar2130p-tsens 60 - qcom,sc7180-tsens 61 - qcom,sc7280-tsens 62 - qcom,sc8180x-tsens 63 - qcom,sc8280xp-tsens 64 - qcom,sdm630-tsens 65 - qcom,sdm845-tsens 66 - qcom,sm6115-tsens 67 - qcom,sm6350-tsens 68 - qcom,sm6375-tsens 69 - qcom,sm8150-tsens 70 - qcom,sm8250-tsens 71 - qcom,sm8350-tsens 72 - qcom,sm8450-tsens 73 - qcom,sm8550-tsens 74 - qcom,sm8650-tsens 75 - qcom,x1e80100-tsens 76 - const: qcom,tsens-v2 77 78 - description: v2 of TSENS with combined interrupt 79 enum: 80 - qcom,ipq5332-tsens 81 - qcom,ipq5424-tsens 82 - qcom,ipq8074-tsens 83 84 - description: v2 of TSENS with combined interrupt 85 items: 86 - enum: 87 - qcom,ipq6018-tsens 88 - qcom,ipq9574-tsens 89 - const: qcom,ipq8074-tsens 90 91 reg: 92 items: 93 - description: TM registers 94 - description: SROT registers 95 96 interrupts: 97 minItems: 1 98 maxItems: 2 99 100 interrupt-names: 101 minItems: 1 102 maxItems: 2 103 104 nvmem-cells: 105 oneOf: 106 - minItems: 1 107 maxItems: 2 108 description: 109 Reference to an nvmem node for the calibration data 110 - minItems: 5 111 maxItems: 35 112 description: | 113 Reference to nvmem cells for the calibration mode, two calibration 114 bases and two cells per each sensor 115 # special case for msm8974 / apq8084 116 - maxItems: 51 117 description: | 118 Reference to nvmem cells for the calibration mode, two calibration 119 bases and two cells per each sensor, main and backup copies, plus use_backup cell 120 121 nvmem-cell-names: 122 oneOf: 123 - minItems: 1 124 items: 125 - const: calib 126 - enum: 127 - calib_backup 128 - calib_sel 129 - minItems: 5 130 items: 131 - const: mode 132 - const: base1 133 - const: base2 134 - pattern: '^s[0-9]+_p1$' 135 - pattern: '^s[0-9]+_p2$' 136 - pattern: '^s[0-9]+_p1$' 137 - pattern: '^s[0-9]+_p2$' 138 - pattern: '^s[0-9]+_p1$' 139 - pattern: '^s[0-9]+_p2$' 140 - pattern: '^s[0-9]+_p1$' 141 - pattern: '^s[0-9]+_p2$' 142 - pattern: '^s[0-9]+_p1$' 143 - pattern: '^s[0-9]+_p2$' 144 - pattern: '^s[0-9]+_p1$' 145 - pattern: '^s[0-9]+_p2$' 146 - pattern: '^s[0-9]+_p1$' 147 - pattern: '^s[0-9]+_p2$' 148 - pattern: '^s[0-9]+_p1$' 149 - pattern: '^s[0-9]+_p2$' 150 - pattern: '^s[0-9]+_p1$' 151 - pattern: '^s[0-9]+_p2$' 152 - pattern: '^s[0-9]+_p1$' 153 - pattern: '^s[0-9]+_p2$' 154 - pattern: '^s[0-9]+_p1$' 155 - pattern: '^s[0-9]+_p2$' 156 - pattern: '^s[0-9]+_p1$' 157 - pattern: '^s[0-9]+_p2$' 158 - pattern: '^s[0-9]+_p1$' 159 - pattern: '^s[0-9]+_p2$' 160 - pattern: '^s[0-9]+_p1$' 161 - pattern: '^s[0-9]+_p2$' 162 - pattern: '^s[0-9]+_p1$' 163 - pattern: '^s[0-9]+_p2$' 164 - pattern: '^s[0-9]+_p1$' 165 - pattern: '^s[0-9]+_p2$' 166 # special case for msm8974 / apq8084 167 - items: 168 - const: mode 169 - const: base1 170 - const: base2 171 - const: use_backup 172 - const: mode_backup 173 - const: base1_backup 174 - const: base2_backup 175 - const: s0_p1 176 - const: s0_p2 177 - const: s1_p1 178 - const: s1_p2 179 - const: s2_p1 180 - const: s2_p2 181 - const: s3_p1 182 - const: s3_p2 183 - const: s4_p1 184 - const: s4_p2 185 - const: s5_p1 186 - const: s5_p2 187 - const: s6_p1 188 - const: s6_p2 189 - const: s7_p1 190 - const: s7_p2 191 - const: s8_p1 192 - const: s8_p2 193 - const: s9_p1 194 - const: s9_p2 195 - const: s10_p1 196 - const: s10_p2 197 - const: s0_p1_backup 198 - const: s0_p2_backup 199 - const: s1_p1_backup 200 - const: s1_p2_backup 201 - const: s2_p1_backup 202 - const: s2_p2_backup 203 - const: s3_p1_backup 204 - const: s3_p2_backup 205 - const: s4_p1_backup 206 - const: s4_p2_backup 207 - const: s5_p1_backup 208 - const: s5_p2_backup 209 - const: s6_p1_backup 210 - const: s6_p2_backup 211 - const: s7_p1_backup 212 - const: s7_p2_backup 213 - const: s8_p1_backup 214 - const: s8_p2_backup 215 - const: s9_p1_backup 216 - const: s9_p2_backup 217 - const: s10_p1_backup 218 - const: s10_p2_backup 219 - minItems: 8 220 items: 221 - const: mode 222 - const: base0 223 - const: base1 224 - pattern: '^tsens_sens[0-9]+_off$' 225 - pattern: '^tsens_sens[0-9]+_off$' 226 - pattern: '^tsens_sens[0-9]+_off$' 227 - pattern: '^tsens_sens[0-9]+_off$' 228 - pattern: '^tsens_sens[0-9]+_off$' 229 - pattern: '^tsens_sens[0-9]+_off$' 230 - pattern: '^tsens_sens[0-9]+_off$' 231 232 "#qcom,sensors": 233 description: 234 Number of sensors enabled on this platform 235 $ref: /schemas/types.yaml#/definitions/uint32 236 minimum: 1 237 maximum: 16 238 239 "#thermal-sensor-cells": 240 const: 1 241 242required: 243 - compatible 244 - interrupts 245 - interrupt-names 246 - "#qcom,sensors" 247 248allOf: 249 - $ref: thermal-sensor.yaml# 250 251 - if: 252 properties: 253 compatible: 254 contains: 255 enum: 256 - qcom,ipq5018-tsens 257 - qcom,ipq8064-tsens 258 - qcom,msm8960-tsens 259 - qcom,tsens-v0_1 260 - qcom,tsens-v1 261 then: 262 properties: 263 interrupts: 264 items: 265 - description: Combined interrupt if upper or lower threshold crossed 266 interrupt-names: 267 items: 268 - const: uplow 269 270 - if: 271 properties: 272 compatible: 273 contains: 274 const: qcom,tsens-v2 275 then: 276 properties: 277 interrupts: 278 items: 279 - description: Combined interrupt if upper or lower threshold crossed 280 - description: Interrupt if critical threshold crossed 281 interrupt-names: 282 items: 283 - const: uplow 284 - const: critical 285 286 - if: 287 properties: 288 compatible: 289 contains: 290 enum: 291 - qcom,ipq5332-tsens 292 - qcom,ipq5424-tsens 293 - qcom,ipq8074-tsens 294 then: 295 properties: 296 interrupts: 297 items: 298 - description: Combined interrupt if upper, lower or critical thresholds crossed 299 interrupt-names: 300 items: 301 - const: combined 302 303 - if: 304 properties: 305 compatible: 306 contains: 307 enum: 308 - qcom,ipq5332-tsens 309 - qcom,ipq5424-tsens 310 - qcom,ipq8074-tsens 311 - qcom,tsens-v0_1 312 - qcom,tsens-v1 313 - qcom,tsens-v2 314 315 then: 316 required: 317 - reg 318 319unevaluatedProperties: false 320 321examples: 322 - | 323 #include <dt-bindings/interrupt-controller/arm-gic.h> 324 thermal-sensor { 325 compatible = "qcom,ipq8064-tsens"; 326 327 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 328 nvmem-cell-names = "calib", "calib_backup"; 329 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 330 interrupt-names = "uplow"; 331 332 #qcom,sensors = <11>; 333 #thermal-sensor-cells = <1>; 334 }; 335 336 - | 337 #include <dt-bindings/interrupt-controller/arm-gic.h> 338 // Example 1 (new calibration data: for pre v1 IP): 339 thermal-sensor@4a9000 { 340 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 341 reg = <0x4a9000 0x1000>, /* TM */ 342 <0x4a8000 0x1000>; /* SROT */ 343 344 nvmem-cells = <&tsens_mode>, 345 <&tsens_base1>, <&tsens_base2>, 346 <&tsens_s0_p1>, <&tsens_s0_p2>, 347 <&tsens_s1_p1>, <&tsens_s1_p2>, 348 <&tsens_s2_p1>, <&tsens_s2_p2>, 349 <&tsens_s4_p1>, <&tsens_s4_p2>, 350 <&tsens_s5_p1>, <&tsens_s5_p2>; 351 nvmem-cell-names = "mode", 352 "base1", "base2", 353 "s0_p1", "s0_p2", 354 "s1_p1", "s1_p2", 355 "s2_p1", "s2_p2", 356 "s4_p1", "s4_p2", 357 "s5_p1", "s5_p2"; 358 359 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 360 interrupt-names = "uplow"; 361 362 #qcom,sensors = <5>; 363 #thermal-sensor-cells = <1>; 364 }; 365 366 - | 367 #include <dt-bindings/interrupt-controller/arm-gic.h> 368 // Example 1 (legacy: for pre v1 IP): 369 tsens1: thermal-sensor@4a9000 { 370 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 371 reg = <0x4a9000 0x1000>, /* TM */ 372 <0x4a8000 0x1000>; /* SROT */ 373 374 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 375 nvmem-cell-names = "calib", "calib_sel"; 376 377 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 378 interrupt-names = "uplow"; 379 380 #qcom,sensors = <5>; 381 #thermal-sensor-cells = <1>; 382 }; 383 384 - | 385 #include <dt-bindings/interrupt-controller/arm-gic.h> 386 // Example 2 (for any platform containing v1 of the TSENS IP): 387 tsens2: thermal-sensor@4a9000 { 388 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 389 reg = <0x004a9000 0x1000>, /* TM */ 390 <0x004a8000 0x1000>; /* SROT */ 391 392 nvmem-cells = <&tsens_caldata>; 393 nvmem-cell-names = "calib"; 394 395 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 396 interrupt-names = "uplow"; 397 398 #qcom,sensors = <10>; 399 #thermal-sensor-cells = <1>; 400 }; 401 402 - | 403 #include <dt-bindings/interrupt-controller/arm-gic.h> 404 // Example 3 (for any platform containing v2 of the TSENS IP): 405 tsens3: thermal-sensor@c263000 { 406 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 407 reg = <0xc263000 0x1ff>, 408 <0xc222000 0x1ff>; 409 410 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 412 interrupt-names = "uplow", "critical"; 413 414 #qcom,sensors = <13>; 415 #thermal-sensor-cells = <1>; 416 }; 417 418 - | 419 #include <dt-bindings/interrupt-controller/arm-gic.h> 420 // Example 4 (for any IPQ8074 based SoC-s): 421 tsens4: thermal-sensor@4a9000 { 422 compatible = "qcom,ipq8074-tsens"; 423 reg = <0x4a9000 0x1000>, 424 <0x4a8000 0x1000>; 425 426 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 427 interrupt-names = "combined"; 428 429 #qcom,sensors = <16>; 430 #thermal-sensor-cells = <1>; 431 }; 432... 433