1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8226-tsens 33 - qcom,msm8909-tsens 34 - qcom,msm8916-tsens 35 - qcom,msm8939-tsens 36 - qcom,msm8974-tsens 37 - const: qcom,tsens-v0_1 38 39 - description: v1 of TSENS 40 items: 41 - enum: 42 - qcom,ipq5018-tsens 43 - qcom,msm8937-tsens 44 - qcom,msm8956-tsens 45 - qcom,msm8976-tsens 46 - qcom,qcs404-tsens 47 - const: qcom,tsens-v1 48 49 - description: v2 of TSENS 50 items: 51 - enum: 52 - qcom,msm8953-tsens 53 - qcom,msm8996-tsens 54 - qcom,msm8998-tsens 55 - qcom,qcm2290-tsens 56 - qcom,sa8255p-tsens 57 - qcom,sa8775p-tsens 58 - qcom,sar2130p-tsens 59 - qcom,sc7180-tsens 60 - qcom,sc7280-tsens 61 - qcom,sc8180x-tsens 62 - qcom,sc8280xp-tsens 63 - qcom,sdm630-tsens 64 - qcom,sdm845-tsens 65 - qcom,sm6115-tsens 66 - qcom,sm6350-tsens 67 - qcom,sm6375-tsens 68 - qcom,sm8150-tsens 69 - qcom,sm8250-tsens 70 - qcom,sm8350-tsens 71 - qcom,sm8450-tsens 72 - qcom,sm8550-tsens 73 - qcom,sm8650-tsens 74 - qcom,x1e80100-tsens 75 - const: qcom,tsens-v2 76 77 - description: v2 of TSENS with combined interrupt 78 enum: 79 - qcom,ipq5332-tsens 80 - qcom,ipq5424-tsens 81 - qcom,ipq8074-tsens 82 83 - description: v2 of TSENS with combined interrupt 84 items: 85 - enum: 86 - qcom,ipq6018-tsens 87 - qcom,ipq9574-tsens 88 - const: qcom,ipq8074-tsens 89 90 reg: 91 items: 92 - description: TM registers 93 - description: SROT registers 94 95 interrupts: 96 minItems: 1 97 maxItems: 2 98 99 interrupt-names: 100 minItems: 1 101 maxItems: 2 102 103 nvmem-cells: 104 oneOf: 105 - minItems: 1 106 maxItems: 2 107 description: 108 Reference to an nvmem node for the calibration data 109 - minItems: 5 110 maxItems: 35 111 description: | 112 Reference to nvmem cells for the calibration mode, two calibration 113 bases and two cells per each sensor 114 # special case for msm8974 / apq8084 115 - maxItems: 51 116 description: | 117 Reference to nvmem cells for the calibration mode, two calibration 118 bases and two cells per each sensor, main and backup copies, plus use_backup cell 119 120 nvmem-cell-names: 121 oneOf: 122 - minItems: 1 123 items: 124 - const: calib 125 - enum: 126 - calib_backup 127 - calib_sel 128 - minItems: 5 129 items: 130 - const: mode 131 - const: base1 132 - const: base2 133 - pattern: '^s[0-9]+_p1$' 134 - pattern: '^s[0-9]+_p2$' 135 - pattern: '^s[0-9]+_p1$' 136 - pattern: '^s[0-9]+_p2$' 137 - pattern: '^s[0-9]+_p1$' 138 - pattern: '^s[0-9]+_p2$' 139 - pattern: '^s[0-9]+_p1$' 140 - pattern: '^s[0-9]+_p2$' 141 - pattern: '^s[0-9]+_p1$' 142 - pattern: '^s[0-9]+_p2$' 143 - pattern: '^s[0-9]+_p1$' 144 - pattern: '^s[0-9]+_p2$' 145 - pattern: '^s[0-9]+_p1$' 146 - pattern: '^s[0-9]+_p2$' 147 - pattern: '^s[0-9]+_p1$' 148 - pattern: '^s[0-9]+_p2$' 149 - pattern: '^s[0-9]+_p1$' 150 - pattern: '^s[0-9]+_p2$' 151 - pattern: '^s[0-9]+_p1$' 152 - pattern: '^s[0-9]+_p2$' 153 - pattern: '^s[0-9]+_p1$' 154 - pattern: '^s[0-9]+_p2$' 155 - pattern: '^s[0-9]+_p1$' 156 - pattern: '^s[0-9]+_p2$' 157 - pattern: '^s[0-9]+_p1$' 158 - pattern: '^s[0-9]+_p2$' 159 - pattern: '^s[0-9]+_p1$' 160 - pattern: '^s[0-9]+_p2$' 161 - pattern: '^s[0-9]+_p1$' 162 - pattern: '^s[0-9]+_p2$' 163 - pattern: '^s[0-9]+_p1$' 164 - pattern: '^s[0-9]+_p2$' 165 # special case for msm8974 / apq8084 166 - items: 167 - const: mode 168 - const: base1 169 - const: base2 170 - const: use_backup 171 - const: mode_backup 172 - const: base1_backup 173 - const: base2_backup 174 - const: s0_p1 175 - const: s0_p2 176 - const: s1_p1 177 - const: s1_p2 178 - const: s2_p1 179 - const: s2_p2 180 - const: s3_p1 181 - const: s3_p2 182 - const: s4_p1 183 - const: s4_p2 184 - const: s5_p1 185 - const: s5_p2 186 - const: s6_p1 187 - const: s6_p2 188 - const: s7_p1 189 - const: s7_p2 190 - const: s8_p1 191 - const: s8_p2 192 - const: s9_p1 193 - const: s9_p2 194 - const: s10_p1 195 - const: s10_p2 196 - const: s0_p1_backup 197 - const: s0_p2_backup 198 - const: s1_p1_backup 199 - const: s1_p2_backup 200 - const: s2_p1_backup 201 - const: s2_p2_backup 202 - const: s3_p1_backup 203 - const: s3_p2_backup 204 - const: s4_p1_backup 205 - const: s4_p2_backup 206 - const: s5_p1_backup 207 - const: s5_p2_backup 208 - const: s6_p1_backup 209 - const: s6_p2_backup 210 - const: s7_p1_backup 211 - const: s7_p2_backup 212 - const: s8_p1_backup 213 - const: s8_p2_backup 214 - const: s9_p1_backup 215 - const: s9_p2_backup 216 - const: s10_p1_backup 217 - const: s10_p2_backup 218 - minItems: 8 219 items: 220 - const: mode 221 - const: base0 222 - const: base1 223 - pattern: '^tsens_sens[0-9]+_off$' 224 - pattern: '^tsens_sens[0-9]+_off$' 225 - pattern: '^tsens_sens[0-9]+_off$' 226 - pattern: '^tsens_sens[0-9]+_off$' 227 - pattern: '^tsens_sens[0-9]+_off$' 228 - pattern: '^tsens_sens[0-9]+_off$' 229 - pattern: '^tsens_sens[0-9]+_off$' 230 231 "#qcom,sensors": 232 description: 233 Number of sensors enabled on this platform 234 $ref: /schemas/types.yaml#/definitions/uint32 235 minimum: 1 236 maximum: 16 237 238 "#thermal-sensor-cells": 239 const: 1 240 241required: 242 - compatible 243 - interrupts 244 - interrupt-names 245 - "#qcom,sensors" 246 247allOf: 248 - $ref: thermal-sensor.yaml# 249 250 - if: 251 properties: 252 compatible: 253 contains: 254 enum: 255 - qcom,ipq5018-tsens 256 - qcom,ipq8064-tsens 257 - qcom,msm8960-tsens 258 - qcom,tsens-v0_1 259 - qcom,tsens-v1 260 then: 261 properties: 262 interrupts: 263 items: 264 - description: Combined interrupt if upper or lower threshold crossed 265 interrupt-names: 266 items: 267 - const: uplow 268 269 - if: 270 properties: 271 compatible: 272 contains: 273 const: qcom,tsens-v2 274 then: 275 properties: 276 interrupts: 277 items: 278 - description: Combined interrupt if upper or lower threshold crossed 279 - description: Interrupt if critical threshold crossed 280 interrupt-names: 281 items: 282 - const: uplow 283 - const: critical 284 285 - if: 286 properties: 287 compatible: 288 contains: 289 enum: 290 - qcom,ipq5332-tsens 291 - qcom,ipq5424-tsens 292 - qcom,ipq8074-tsens 293 then: 294 properties: 295 interrupts: 296 items: 297 - description: Combined interrupt if upper, lower or critical thresholds crossed 298 interrupt-names: 299 items: 300 - const: combined 301 302 - if: 303 properties: 304 compatible: 305 contains: 306 enum: 307 - qcom,ipq5332-tsens 308 - qcom,ipq5424-tsens 309 - qcom,ipq8074-tsens 310 - qcom,tsens-v0_1 311 - qcom,tsens-v1 312 - qcom,tsens-v2 313 314 then: 315 required: 316 - reg 317 318unevaluatedProperties: false 319 320examples: 321 - | 322 #include <dt-bindings/interrupt-controller/arm-gic.h> 323 thermal-sensor { 324 compatible = "qcom,ipq8064-tsens"; 325 326 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 327 nvmem-cell-names = "calib", "calib_backup"; 328 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 329 interrupt-names = "uplow"; 330 331 #qcom,sensors = <11>; 332 #thermal-sensor-cells = <1>; 333 }; 334 335 - | 336 #include <dt-bindings/interrupt-controller/arm-gic.h> 337 // Example 1 (new calibration data: for pre v1 IP): 338 thermal-sensor@4a9000 { 339 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 340 reg = <0x4a9000 0x1000>, /* TM */ 341 <0x4a8000 0x1000>; /* SROT */ 342 343 nvmem-cells = <&tsens_mode>, 344 <&tsens_base1>, <&tsens_base2>, 345 <&tsens_s0_p1>, <&tsens_s0_p2>, 346 <&tsens_s1_p1>, <&tsens_s1_p2>, 347 <&tsens_s2_p1>, <&tsens_s2_p2>, 348 <&tsens_s4_p1>, <&tsens_s4_p2>, 349 <&tsens_s5_p1>, <&tsens_s5_p2>; 350 nvmem-cell-names = "mode", 351 "base1", "base2", 352 "s0_p1", "s0_p2", 353 "s1_p1", "s1_p2", 354 "s2_p1", "s2_p2", 355 "s4_p1", "s4_p2", 356 "s5_p1", "s5_p2"; 357 358 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 359 interrupt-names = "uplow"; 360 361 #qcom,sensors = <5>; 362 #thermal-sensor-cells = <1>; 363 }; 364 365 - | 366 #include <dt-bindings/interrupt-controller/arm-gic.h> 367 // Example 1 (legacy: for pre v1 IP): 368 tsens1: thermal-sensor@4a9000 { 369 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 370 reg = <0x4a9000 0x1000>, /* TM */ 371 <0x4a8000 0x1000>; /* SROT */ 372 373 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 374 nvmem-cell-names = "calib", "calib_sel"; 375 376 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 377 interrupt-names = "uplow"; 378 379 #qcom,sensors = <5>; 380 #thermal-sensor-cells = <1>; 381 }; 382 383 - | 384 #include <dt-bindings/interrupt-controller/arm-gic.h> 385 // Example 2 (for any platform containing v1 of the TSENS IP): 386 tsens2: thermal-sensor@4a9000 { 387 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 388 reg = <0x004a9000 0x1000>, /* TM */ 389 <0x004a8000 0x1000>; /* SROT */ 390 391 nvmem-cells = <&tsens_caldata>; 392 nvmem-cell-names = "calib"; 393 394 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 395 interrupt-names = "uplow"; 396 397 #qcom,sensors = <10>; 398 #thermal-sensor-cells = <1>; 399 }; 400 401 - | 402 #include <dt-bindings/interrupt-controller/arm-gic.h> 403 // Example 3 (for any platform containing v2 of the TSENS IP): 404 tsens3: thermal-sensor@c263000 { 405 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 406 reg = <0xc263000 0x1ff>, 407 <0xc222000 0x1ff>; 408 409 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 410 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 411 interrupt-names = "uplow", "critical"; 412 413 #qcom,sensors = <13>; 414 #thermal-sensor-cells = <1>; 415 }; 416 417 - | 418 #include <dt-bindings/interrupt-controller/arm-gic.h> 419 // Example 4 (for any IPQ8074 based SoC-s): 420 tsens4: thermal-sensor@4a9000 { 421 compatible = "qcom,ipq8074-tsens"; 422 reg = <0x4a9000 0x1000>, 423 <0x4a8000 0x1000>; 424 425 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 426 interrupt-names = "combined"; 427 428 #qcom,sensors = <16>; 429 #thermal-sensor-cells = <1>; 430 }; 431... 432