xref: /linux/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml (revision 53b48f62f29dce6dcad490dc1994286994098837)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Low Power SPI (LPSPI) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11  - Sascha Hauer <s.hauer@pengutronix.de>
12  - Fabio Estevam <festevam@gmail.com>
13
14allOf:
15  - $ref: /schemas/spi/spi-controller.yaml#
16
17properties:
18  compatible:
19    oneOf:
20      - enum:
21          - fsl,imx7ulp-spi
22          - fsl,imx8qxp-spi
23          - nxp,s32g2-lpspi
24      - items:
25          - enum:
26              - fsl,imx8ulp-spi
27              - fsl,imx93-spi
28              - fsl,imx94-spi
29              - fsl,imx95-spi
30          - const: fsl,imx7ulp-spi
31      - items:
32          - const: nxp,s32g3-lpspi
33          - const: nxp,s32g2-lpspi
34
35  reg:
36    maxItems: 1
37
38  interrupts:
39    maxItems: 1
40
41  clocks:
42    items:
43      - description: SoC SPI per clock
44      - description: SoC SPI ipg clock
45
46  clock-names:
47    items:
48      - const: per
49      - const: ipg
50
51  dmas:
52    items:
53      - description: TX DMA Channel
54      - description: RX DMA Channel
55
56  dma-names:
57    items:
58      - const: tx
59      - const: rx
60
61  fsl,spi-only-use-cs1-sel:
62    description:
63      spi common code does not support use of CS signals discontinuously.
64      i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
65      this property to re-config the chipselect value in the LPSPI driver.
66    type: boolean
67
68  num-cs:
69    description:
70      number of chip selects.
71    minimum: 1
72    maximum: 2
73    default: 1
74
75  power-domains:
76    maxItems: 1
77
78required:
79  - compatible
80  - reg
81  - interrupts
82  - clocks
83  - clock-names
84
85unevaluatedProperties: false
86
87examples:
88  - |
89    #include <dt-bindings/clock/imx7ulp-clock.h>
90    #include <dt-bindings/interrupt-controller/arm-gic.h>
91
92    spi@40290000 {
93        compatible = "fsl,imx7ulp-spi";
94        reg = <0x40290000 0x10000>;
95        interrupt-parent = <&intc>;
96        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
97        clocks = <&clks IMX7ULP_CLK_LPSPI2>,
98                 <&clks IMX7ULP_CLK_DUMMY>;
99        clock-names = "per", "ipg";
100        spi-slave;
101        fsl,spi-only-use-cs1-sel;
102        num-cs = <2>;
103    };
104