1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AD3530R/AD3530 8-channel, 16-bit Voltage Output DAC Driver
4 * AD3531R/AD3531 4-channel, 16-bit Voltage Output DAC Driver
5 *
6 * Copyright 2025 Analog Devices Inc.
7 */
8
9 #include <linux/array_size.h>
10 #include <linux/bitfield.h>
11 #include <linux/bits.h>
12 #include <linux/cleanup.h>
13 #include <linux/delay.h>
14 #include <linux/dev_printk.h>
15 #include <linux/err.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/iio/iio.h>
18 #include <linux/kstrtox.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/module.h>
21 #include <linux/mutex.h>
22 #include <linux/property.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/spi/spi.h>
26 #include <linux/sysfs.h>
27 #include <linux/types.h>
28 #include <linux/units.h>
29
30 #define AD3530R_INTERFACE_CONFIG_A 0x00
31 #define AD3530R_OUTPUT_OPERATING_MODE_0 0x20
32 #define AD3530R_OUTPUT_OPERATING_MODE_1 0x21
33 #define AD3530R_OUTPUT_CONTROL_0 0x2A
34 #define AD3530R_REFERENCE_CONTROL_0 0x3C
35 #define AD3530R_SW_LDAC_TRIG_A 0xE5
36 #define AD3530R_INPUT_CH 0xEB
37 #define AD3530R_MAX_REG_ADDR 0xF9
38
39 #define AD3531R_SW_LDAC_TRIG_A 0xDD
40 #define AD3531R_INPUT_CH 0xE3
41
42 #define AD3530R_SLD_TRIG_A BIT(7)
43 #define AD3530R_OUTPUT_CONTROL_RANGE BIT(2)
44 #define AD3530R_REFERENCE_CONTROL_SEL BIT(0)
45 #define AD3530R_REG_VAL_MASK GENMASK(15, 0)
46 #define AD3530R_OP_MODE_CHAN_MSK(chan) (GENMASK(1, 0) << 2 * (chan))
47
48 #define AD3530R_SW_RESET (BIT(7) | BIT(0))
49 #define AD3530R_INTERNAL_VREF_mV 2500
50 #define AD3530R_LDAC_PULSE_US 100
51
52 #define AD3530R_DAC_MAX_VAL GENMASK(15, 0)
53 #define AD3530R_MAX_CHANNELS 8
54 #define AD3531R_MAX_CHANNELS 4
55
56 enum ad3530r_mode {
57 AD3530R_NORMAL_OP,
58 AD3530R_POWERDOWN_1K,
59 AD3530R_POWERDOWN_7K7,
60 AD3530R_POWERDOWN_32K,
61 };
62
63 struct ad3530r_chan {
64 enum ad3530r_mode powerdown_mode;
65 bool powerdown;
66 };
67
68 struct ad3530r_chip_info {
69 const char *name;
70 const struct iio_chan_spec *channels;
71 int (*input_ch_reg)(unsigned int channel);
72 unsigned int num_channels;
73 unsigned int sw_ldac_trig_reg;
74 bool internal_ref_support;
75 };
76
77 struct ad3530r_state {
78 struct regmap *regmap;
79 /* lock to protect against multiple access to the device and shared data */
80 struct mutex lock;
81 struct ad3530r_chan chan[AD3530R_MAX_CHANNELS];
82 const struct ad3530r_chip_info *chip_info;
83 struct gpio_desc *ldac_gpio;
84 int vref_mV;
85 /*
86 * DMA (thus cache coherency maintenance) may require the transfer
87 * buffers to live in their own cache lines.
88 */
89 __be16 buf __aligned(IIO_DMA_MINALIGN);
90 };
91
ad3530r_input_ch_reg(unsigned int channel)92 static int ad3530r_input_ch_reg(unsigned int channel)
93 {
94 return 2 * channel + AD3530R_INPUT_CH;
95 }
96
ad3531r_input_ch_reg(unsigned int channel)97 static int ad3531r_input_ch_reg(unsigned int channel)
98 {
99 return 2 * channel + AD3531R_INPUT_CH;
100 }
101
102 static const char * const ad3530r_powerdown_modes[] = {
103 "1kohm_to_gnd",
104 "7.7kohm_to_gnd",
105 "32kohm_to_gnd",
106 };
107
108 static const char * const ad3531r_powerdown_modes[] = {
109 "500ohm_to_gnd",
110 "3.85kohm_to_gnd",
111 "16kohm_to_gnd",
112 };
113
ad3530r_get_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan)114 static int ad3530r_get_powerdown_mode(struct iio_dev *indio_dev,
115 const struct iio_chan_spec *chan)
116 {
117 struct ad3530r_state *st = iio_priv(indio_dev);
118
119 guard(mutex)(&st->lock);
120 return st->chan[chan->channel].powerdown_mode - 1;
121 }
122
ad3530r_set_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,unsigned int mode)123 static int ad3530r_set_powerdown_mode(struct iio_dev *indio_dev,
124 const struct iio_chan_spec *chan,
125 unsigned int mode)
126 {
127 struct ad3530r_state *st = iio_priv(indio_dev);
128
129 guard(mutex)(&st->lock);
130 st->chan[chan->channel].powerdown_mode = mode + 1;
131
132 return 0;
133 }
134
135 static const struct iio_enum ad3530r_powerdown_mode_enum = {
136 .items = ad3530r_powerdown_modes,
137 .num_items = ARRAY_SIZE(ad3530r_powerdown_modes),
138 .get = ad3530r_get_powerdown_mode,
139 .set = ad3530r_set_powerdown_mode,
140 };
141
142 static const struct iio_enum ad3531r_powerdown_mode_enum = {
143 .items = ad3531r_powerdown_modes,
144 .num_items = ARRAY_SIZE(ad3531r_powerdown_modes),
145 .get = ad3530r_get_powerdown_mode,
146 .set = ad3530r_set_powerdown_mode,
147 };
148
ad3530r_get_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)149 static ssize_t ad3530r_get_dac_powerdown(struct iio_dev *indio_dev,
150 uintptr_t private,
151 const struct iio_chan_spec *chan,
152 char *buf)
153 {
154 struct ad3530r_state *st = iio_priv(indio_dev);
155
156 guard(mutex)(&st->lock);
157 return sysfs_emit(buf, "%d\n", st->chan[chan->channel].powerdown);
158 }
159
ad3530r_set_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)160 static ssize_t ad3530r_set_dac_powerdown(struct iio_dev *indio_dev,
161 uintptr_t private,
162 const struct iio_chan_spec *chan,
163 const char *buf, size_t len)
164 {
165 struct ad3530r_state *st = iio_priv(indio_dev);
166 int ret;
167 unsigned int reg, pdmode, mask, val;
168 bool powerdown;
169
170 ret = kstrtobool(buf, &powerdown);
171 if (ret)
172 return ret;
173
174 guard(mutex)(&st->lock);
175 reg = chan->channel < AD3531R_MAX_CHANNELS ?
176 AD3530R_OUTPUT_OPERATING_MODE_0 :
177 AD3530R_OUTPUT_OPERATING_MODE_1;
178 pdmode = powerdown ? st->chan[chan->channel].powerdown_mode : 0;
179 mask = chan->channel < AD3531R_MAX_CHANNELS ?
180 AD3530R_OP_MODE_CHAN_MSK(chan->channel) :
181 AD3530R_OP_MODE_CHAN_MSK(chan->channel - 4);
182 val = field_prep(mask, pdmode);
183
184 ret = regmap_update_bits(st->regmap, reg, mask, val);
185 if (ret)
186 return ret;
187
188 st->chan[chan->channel].powerdown = powerdown;
189
190 return len;
191 }
192
ad3530r_trigger_hw_ldac(struct gpio_desc * ldac_gpio)193 static int ad3530r_trigger_hw_ldac(struct gpio_desc *ldac_gpio)
194 {
195 gpiod_set_value_cansleep(ldac_gpio, 1);
196 fsleep(AD3530R_LDAC_PULSE_US);
197 gpiod_set_value_cansleep(ldac_gpio, 0);
198
199 return 0;
200 }
201
ad3530r_dac_write(struct ad3530r_state * st,unsigned int chan,unsigned int val)202 static int ad3530r_dac_write(struct ad3530r_state *st, unsigned int chan,
203 unsigned int val)
204 {
205 int ret;
206
207 guard(mutex)(&st->lock);
208 st->buf = cpu_to_be16(val);
209
210 ret = regmap_bulk_write(st->regmap, st->chip_info->input_ch_reg(chan),
211 &st->buf, sizeof(st->buf));
212 if (ret)
213 return ret;
214
215 if (st->ldac_gpio)
216 return ad3530r_trigger_hw_ldac(st->ldac_gpio);
217
218 return regmap_set_bits(st->regmap, st->chip_info->sw_ldac_trig_reg,
219 AD3530R_SLD_TRIG_A);
220 }
221
ad3530r_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)222 static int ad3530r_read_raw(struct iio_dev *indio_dev,
223 struct iio_chan_spec const *chan,
224 int *val, int *val2, long info)
225 {
226 struct ad3530r_state *st = iio_priv(indio_dev);
227 int ret;
228
229 guard(mutex)(&st->lock);
230 switch (info) {
231 case IIO_CHAN_INFO_RAW:
232 ret = regmap_bulk_read(st->regmap,
233 st->chip_info->input_ch_reg(chan->channel),
234 &st->buf, sizeof(st->buf));
235 if (ret)
236 return ret;
237
238 *val = FIELD_GET(AD3530R_REG_VAL_MASK, be16_to_cpu(st->buf));
239
240 return IIO_VAL_INT;
241 case IIO_CHAN_INFO_SCALE:
242 *val = st->vref_mV;
243 *val2 = 16;
244
245 return IIO_VAL_FRACTIONAL_LOG2;
246 default:
247 return -EINVAL;
248 }
249 }
250
ad3530r_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long info)251 static int ad3530r_write_raw(struct iio_dev *indio_dev,
252 struct iio_chan_spec const *chan,
253 int val, int val2, long info)
254 {
255 struct ad3530r_state *st = iio_priv(indio_dev);
256
257 switch (info) {
258 case IIO_CHAN_INFO_RAW:
259 if (val < 0 || val > AD3530R_DAC_MAX_VAL)
260 return -EINVAL;
261
262 return ad3530r_dac_write(st, chan->channel, val);
263 default:
264 return -EINVAL;
265 }
266 }
267
ad3530r_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)268 static int ad3530r_reg_access(struct iio_dev *indio_dev, unsigned int reg,
269 unsigned int writeval, unsigned int *readval)
270 {
271 struct ad3530r_state *st = iio_priv(indio_dev);
272
273 if (readval)
274 return regmap_read(st->regmap, reg, readval);
275
276 return regmap_write(st->regmap, reg, writeval);
277 }
278
279 static const struct iio_chan_spec_ext_info ad3530r_ext_info[] = {
280 {
281 .name = "powerdown",
282 .shared = IIO_SEPARATE,
283 .read = ad3530r_get_dac_powerdown,
284 .write = ad3530r_set_dac_powerdown,
285 },
286 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad3530r_powerdown_mode_enum),
287 IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE,
288 &ad3530r_powerdown_mode_enum),
289 { }
290 };
291
292 static const struct iio_chan_spec_ext_info ad3531r_ext_info[] = {
293 {
294 .name = "powerdown",
295 .shared = IIO_SEPARATE,
296 .read = ad3530r_get_dac_powerdown,
297 .write = ad3530r_set_dac_powerdown,
298 },
299 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad3531r_powerdown_mode_enum),
300 IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE,
301 &ad3531r_powerdown_mode_enum),
302 { }
303 };
304
305 #define AD3530R_CHAN(_chan, _ext_info) \
306 { \
307 .type = IIO_VOLTAGE, \
308 .indexed = 1, \
309 .channel = _chan, \
310 .output = 1, \
311 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
312 BIT(IIO_CHAN_INFO_SCALE), \
313 .ext_info = _ext_info, \
314 }
315
316 static const struct iio_chan_spec ad3530r_channels[] = {
317 AD3530R_CHAN(0, ad3530r_ext_info),
318 AD3530R_CHAN(1, ad3530r_ext_info),
319 AD3530R_CHAN(2, ad3530r_ext_info),
320 AD3530R_CHAN(3, ad3530r_ext_info),
321 AD3530R_CHAN(4, ad3530r_ext_info),
322 AD3530R_CHAN(5, ad3530r_ext_info),
323 AD3530R_CHAN(6, ad3530r_ext_info),
324 AD3530R_CHAN(7, ad3530r_ext_info),
325 };
326
327 static const struct iio_chan_spec ad3531r_channels[] = {
328 AD3530R_CHAN(0, ad3531r_ext_info),
329 AD3530R_CHAN(1, ad3531r_ext_info),
330 AD3530R_CHAN(2, ad3531r_ext_info),
331 AD3530R_CHAN(3, ad3531r_ext_info),
332 };
333
334 static const struct ad3530r_chip_info ad3530_chip = {
335 .name = "ad3530",
336 .channels = ad3530r_channels,
337 .num_channels = ARRAY_SIZE(ad3530r_channels),
338 .sw_ldac_trig_reg = AD3530R_SW_LDAC_TRIG_A,
339 .input_ch_reg = ad3530r_input_ch_reg,
340 .internal_ref_support = false,
341 };
342
343 static const struct ad3530r_chip_info ad3530r_chip = {
344 .name = "ad3530r",
345 .channels = ad3530r_channels,
346 .num_channels = ARRAY_SIZE(ad3530r_channels),
347 .sw_ldac_trig_reg = AD3530R_SW_LDAC_TRIG_A,
348 .input_ch_reg = ad3530r_input_ch_reg,
349 .internal_ref_support = true,
350 };
351
352 static const struct ad3530r_chip_info ad3531_chip = {
353 .name = "ad3531",
354 .channels = ad3531r_channels,
355 .num_channels = ARRAY_SIZE(ad3531r_channels),
356 .sw_ldac_trig_reg = AD3531R_SW_LDAC_TRIG_A,
357 .input_ch_reg = ad3531r_input_ch_reg,
358 .internal_ref_support = false,
359 };
360
361 static const struct ad3530r_chip_info ad3531r_chip = {
362 .name = "ad3531r",
363 .channels = ad3531r_channels,
364 .num_channels = ARRAY_SIZE(ad3531r_channels),
365 .sw_ldac_trig_reg = AD3531R_SW_LDAC_TRIG_A,
366 .input_ch_reg = ad3531r_input_ch_reg,
367 .internal_ref_support = true,
368 };
369
ad3530r_setup(struct ad3530r_state * st,int external_vref_uV)370 static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
371 {
372 struct device *dev = regmap_get_device(st->regmap);
373 struct gpio_desc *reset_gpio;
374 int i, ret;
375 u8 range_multiplier, val;
376
377 reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
378 if (IS_ERR(reset_gpio))
379 return dev_err_probe(dev, PTR_ERR(reset_gpio),
380 "Failed to get reset GPIO\n");
381
382 if (reset_gpio) {
383 /* Perform hardware reset */
384 fsleep(1 * USEC_PER_MSEC);
385 gpiod_set_value_cansleep(reset_gpio, 0);
386 } else {
387 /* Perform software reset */
388 ret = regmap_update_bits(st->regmap, AD3530R_INTERFACE_CONFIG_A,
389 AD3530R_SW_RESET, AD3530R_SW_RESET);
390 if (ret)
391 return ret;
392 }
393
394 fsleep(10 * USEC_PER_MSEC);
395
396 range_multiplier = 1;
397 if (device_property_read_bool(dev, "adi,range-double")) {
398 ret = regmap_set_bits(st->regmap, AD3530R_OUTPUT_CONTROL_0,
399 AD3530R_OUTPUT_CONTROL_RANGE);
400 if (ret)
401 return ret;
402
403 range_multiplier = 2;
404 }
405
406 if (external_vref_uV) {
407 st->vref_mV = range_multiplier * external_vref_uV / MILLI;
408 } else {
409 ret = regmap_set_bits(st->regmap, AD3530R_REFERENCE_CONTROL_0,
410 AD3530R_REFERENCE_CONTROL_SEL);
411 if (ret)
412 return ret;
413
414 st->vref_mV = range_multiplier * AD3530R_INTERNAL_VREF_mV;
415 }
416
417 /* Set normal operating mode for all channels */
418 val = FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(0), AD3530R_NORMAL_OP) |
419 FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(1), AD3530R_NORMAL_OP) |
420 FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(2), AD3530R_NORMAL_OP) |
421 FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(3), AD3530R_NORMAL_OP);
422
423 ret = regmap_write(st->regmap, AD3530R_OUTPUT_OPERATING_MODE_0, val);
424 if (ret)
425 return ret;
426
427 if (st->chip_info->num_channels > 4) {
428 ret = regmap_write(st->regmap, AD3530R_OUTPUT_OPERATING_MODE_1,
429 val);
430 if (ret)
431 return ret;
432 }
433
434 for (i = 0; i < st->chip_info->num_channels; i++)
435 st->chan[i].powerdown_mode = AD3530R_POWERDOWN_32K;
436
437 st->ldac_gpio = devm_gpiod_get_optional(dev, "ldac", GPIOD_OUT_LOW);
438 if (IS_ERR(st->ldac_gpio))
439 return dev_err_probe(dev, PTR_ERR(st->ldac_gpio),
440 "Failed to get ldac GPIO\n");
441
442 return 0;
443 }
444
445 static const struct regmap_config ad3530r_regmap_config = {
446 .reg_bits = 16,
447 .val_bits = 8,
448 .max_register = AD3530R_MAX_REG_ADDR,
449 };
450
451 static const struct iio_info ad3530r_info = {
452 .read_raw = ad3530r_read_raw,
453 .write_raw = ad3530r_write_raw,
454 .debugfs_reg_access = ad3530r_reg_access,
455 };
456
ad3530r_probe(struct spi_device * spi)457 static int ad3530r_probe(struct spi_device *spi)
458 {
459 static const char * const regulators[] = { "vdd", "iovdd" };
460 struct device *dev = &spi->dev;
461 struct iio_dev *indio_dev;
462 struct ad3530r_state *st;
463 int ret, external_vref_uV;
464
465 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
466 if (!indio_dev)
467 return -ENOMEM;
468
469 st = iio_priv(indio_dev);
470
471 st->regmap = devm_regmap_init_spi(spi, &ad3530r_regmap_config);
472 if (IS_ERR(st->regmap))
473 return dev_err_probe(dev, PTR_ERR(st->regmap),
474 "Failed to init regmap");
475
476 ret = devm_mutex_init(dev, &st->lock);
477 if (ret)
478 return ret;
479
480 st->chip_info = spi_get_device_match_data(spi);
481 if (!st->chip_info)
482 return -ENODEV;
483
484 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
485 regulators);
486 if (ret)
487 return dev_err_probe(dev, ret, "Failed to enable regulators\n");
488
489 external_vref_uV = devm_regulator_get_enable_read_voltage(dev, "ref");
490 if (external_vref_uV < 0 && external_vref_uV != -ENODEV)
491 return external_vref_uV;
492
493 if (external_vref_uV == -ENODEV)
494 external_vref_uV = 0;
495
496 if (!st->chip_info->internal_ref_support && external_vref_uV == 0)
497 return -ENODEV;
498
499 ret = ad3530r_setup(st, external_vref_uV);
500 if (ret)
501 return ret;
502
503 indio_dev->name = st->chip_info->name;
504 indio_dev->info = &ad3530r_info;
505 indio_dev->modes = INDIO_DIRECT_MODE;
506 indio_dev->channels = st->chip_info->channels;
507 indio_dev->num_channels = st->chip_info->num_channels;
508
509 return devm_iio_device_register(&spi->dev, indio_dev);
510 }
511
512 static const struct spi_device_id ad3530r_id[] = {
513 { "ad3530", (kernel_ulong_t)&ad3530_chip },
514 { "ad3530r", (kernel_ulong_t)&ad3530r_chip },
515 { "ad3531", (kernel_ulong_t)&ad3531_chip },
516 { "ad3531r", (kernel_ulong_t)&ad3531r_chip },
517 { }
518 };
519 MODULE_DEVICE_TABLE(spi, ad3530r_id);
520
521 static const struct of_device_id ad3530r_of_match[] = {
522 { .compatible = "adi,ad3530", .data = &ad3530_chip },
523 { .compatible = "adi,ad3530r", .data = &ad3530r_chip },
524 { .compatible = "adi,ad3531", .data = &ad3531_chip },
525 { .compatible = "adi,ad3531r", .data = &ad3531r_chip },
526 { }
527 };
528 MODULE_DEVICE_TABLE(of, ad3530r_of_match);
529
530 static struct spi_driver ad3530r_driver = {
531 .driver = {
532 .name = "ad3530r",
533 .of_match_table = ad3530r_of_match,
534 },
535 .probe = ad3530r_probe,
536 .id_table = ad3530r_id,
537 };
538 module_spi_driver(ad3530r_driver);
539
540 MODULE_AUTHOR("Kim Seer Paller <kimseer.paller@analog.com>");
541 MODULE_DESCRIPTION("Analog Devices AD3530R and Similar DACs Driver");
542 MODULE_LICENSE("GPL");
543