1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 #ifndef __MFD_88PM886_H 3 #define __MFD_88PM886_H 4 5 #include <linux/bits.h> 6 #include <linux/i2c.h> 7 #include <linux/regmap.h> 8 9 #define PM886_A1_CHIP_ID 0xa1 10 11 #define PM886_IRQ_ONKEY 0 12 13 #define PM886_PAGE_OFFSET_REGULATORS 1 14 #define PM886_PAGE_OFFSET_GPADC 2 15 #define PM886_PAGE_OFFSET_BATTERY 3 16 17 #define PM886_REG_ID 0x00 18 19 #define PM886_REG_STATUS1 0x01 20 #define PM886_ONKEY_STS1 BIT(0) 21 22 #define PM886_REG_INT_STATUS1 0x05 23 24 #define PM886_REG_INT_ENA_1 0x0a 25 #define PM886_INT_ENA1_ONKEY BIT(0) 26 27 #define PM886_REG_MISC_CONFIG1 0x14 28 #define PM886_SW_PDOWN BIT(5) 29 30 #define PM886_REG_MISC_CONFIG2 0x15 31 #define PM886_INT_INV BIT(0) 32 #define PM886_INT_CLEAR BIT(1) 33 #define PM886_INT_RC 0x00 34 #define PM886_INT_WC BIT(1) 35 #define PM886_INT_MASK_MODE BIT(2) 36 37 #define PM886_REG_RTC_CNT1 0xd1 38 #define PM886_REG_RTC_CNT2 0xd2 39 #define PM886_REG_RTC_CNT3 0xd3 40 #define PM886_REG_RTC_CNT4 0xd4 41 #define PM886_REG_RTC_SPARE1 0xea 42 #define PM886_REG_RTC_SPARE2 0xeb 43 #define PM886_REG_RTC_SPARE3 0xec 44 #define PM886_REG_RTC_SPARE4 0xed 45 #define PM886_REG_RTC_SPARE5 0xee 46 #define PM886_REG_RTC_SPARE6 0xef 47 48 #define PM886_REG_BUCK_EN 0x08 49 #define PM886_REG_LDO_EN1 0x09 50 #define PM886_REG_LDO_EN2 0x0a 51 #define PM886_REG_LDO1_VOUT 0x20 52 #define PM886_REG_LDO2_VOUT 0x26 53 #define PM886_REG_LDO3_VOUT 0x2c 54 #define PM886_REG_LDO4_VOUT 0x32 55 #define PM886_REG_LDO5_VOUT 0x38 56 #define PM886_REG_LDO6_VOUT 0x3e 57 #define PM886_REG_LDO7_VOUT 0x44 58 #define PM886_REG_LDO8_VOUT 0x4a 59 #define PM886_REG_LDO9_VOUT 0x50 60 #define PM886_REG_LDO10_VOUT 0x56 61 #define PM886_REG_LDO11_VOUT 0x5c 62 #define PM886_REG_LDO12_VOUT 0x62 63 #define PM886_REG_LDO13_VOUT 0x68 64 #define PM886_REG_LDO14_VOUT 0x6e 65 #define PM886_REG_LDO15_VOUT 0x74 66 #define PM886_REG_LDO16_VOUT 0x7a 67 #define PM886_REG_BUCK1_VOUT 0xa5 68 #define PM886_REG_BUCK2_VOUT 0xb3 69 #define PM886_REG_BUCK3_VOUT 0xc1 70 #define PM886_REG_BUCK4_VOUT 0xcf 71 #define PM886_REG_BUCK5_VOUT 0xdd 72 73 #define PM886_LDO_VSEL_MASK 0x0f 74 #define PM886_BUCK_VSEL_MASK 0x7f 75 76 /* GPADC enable/disable registers */ 77 #define PM886_REG_GPADC_CONFIG(n) (n) 78 79 #define PM886_GPADC_VSC_EN BIT(0) 80 #define PM886_GPADC_VBAT_EN BIT(1) 81 #define PM886_GPADC_GNDDET1_EN BIT(3) 82 #define PM886_GPADC_VBUS_EN BIT(4) 83 #define PM886_GPADC_VCHG_PWR_EN BIT(5) 84 #define PM886_GPADC_VCF_OUT_EN BIT(6) 85 #define PM886_GPADC_CONFIG1_EN_ALL \ 86 (PM886_GPADC_VSC_EN | \ 87 PM886_GPADC_VBAT_EN | \ 88 PM886_GPADC_GNDDET1_EN | \ 89 PM886_GPADC_VBUS_EN | \ 90 PM886_GPADC_VCHG_PWR_EN | \ 91 PM886_GPADC_VCF_OUT_EN) 92 93 #define PM886_GPADC_TINT_EN BIT(0) 94 #define PM886_GPADC_PMODE_EN BIT(1) 95 #define PM886_GPADC_GPADC0_EN BIT(2) 96 #define PM886_GPADC_GPADC1_EN BIT(3) 97 #define PM886_GPADC_GPADC2_EN BIT(4) 98 #define PM886_GPADC_GPADC3_EN BIT(5) 99 #define PM886_GPADC_MIC_DET_EN BIT(6) 100 #define PM886_GPADC_CONFIG2_EN_ALL \ 101 (PM886_GPADC_TINT_EN | \ 102 PM886_GPADC_GPADC0_EN | \ 103 PM886_GPADC_GPADC1_EN | \ 104 PM886_GPADC_GPADC2_EN | \ 105 PM886_GPADC_GPADC3_EN | \ 106 PM886_GPADC_MIC_DET_EN) 107 108 /* No CONFIG3_EN_ALL because this is the only bit there. */ 109 #define PM886_GPADC_GND_DET2_EN BIT(0) 110 111 /* GPADC channel registers */ 112 #define PM886_REG_GPADC_VSC 0x40 113 #define PM886_REG_GPADC_VCHG_PWR 0x4c 114 #define PM886_REG_GPADC_VCF_OUT 0x4e 115 #define PM886_REG_GPADC_TINT 0x50 116 #define PM886_REG_GPADC_GPADC0 0x54 117 #define PM886_REG_GPADC_GPADC1 0x56 118 #define PM886_REG_GPADC_GPADC2 0x58 119 #define PM886_REG_GPADC_VBAT 0xa0 120 #define PM886_REG_GPADC_GND_DET1 0xa4 121 #define PM886_REG_GPADC_GND_DET2 0xa6 122 #define PM886_REG_GPADC_VBUS 0xa8 123 #define PM886_REG_GPADC_GPADC3 0xaa 124 #define PM886_REG_GPADC_MIC_DET 0xac 125 #define PM886_REG_GPADC_VBAT_SLP 0xb0 126 127 /* VBAT_SLP is the last register and is 2 bytes wide like other channels. */ 128 #define PM886_GPADC_MAX_REGISTER (PM886_REG_GPADC_VBAT_SLP + 1) 129 130 #define PM886_GPADC_BIAS_LEVELS 16 131 #define PM886_GPADC_INDEX_TO_BIAS_uA(i) (1 + (i) * 5) 132 133 /* Battery block register definitions */ 134 #define PM886_REG_BATTERY_CONFIG1 0x28 135 #define PM886_REG_VBUS_EN BIT(7) 136 137 #define PM886_REG_BOOST_CONFIG1 0x6b 138 #define PM886_REG_BOOST_MASK GENMASK(2, 0) 139 140 #define PM886_REG_CLS_CONFIG1 0x71 141 142 struct pm886_chip { 143 struct i2c_client *client; 144 unsigned int chip_id; 145 struct regmap *regmap; 146 struct regmap *regmap_battery; 147 }; 148 #endif /* __MFD_88PM886_H */ 149