1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car H2 (R8A77900) SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2014 Cogent Embedded Inc. 8 */ 9 10#include <dt-bindings/clock/r8a7790-cpg-mssr.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/power/r8a7790-sysc.h> 14 15/ { 16 compatible = "renesas,r8a7790"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &iic0; 26 i2c5 = &iic1; 27 i2c6 = &iic2; 28 i2c7 = &iic3; 29 spi0 = &qspi; 30 spi1 = &msiof0; 31 spi2 = &msiof1; 32 spi3 = &msiof2; 33 spi4 = &msiof3; 34 vin0 = &vin0; 35 vin1 = &vin1; 36 vin2 = &vin2; 37 vin3 = &vin3; 38 }; 39 40 /* 41 * The external audio clocks are configured as 0 Hz fixed frequency 42 * clocks by default. 43 * Boards that provide audio clocks should override them. 44 */ 45 audio_clk_a: audio_clk_a { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 audio_clk_b: audio_clk_b { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 audio_clk_c: audio_clk_c { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 59 }; 60 61 /* External CAN clock */ 62 can_clk: can { 63 compatible = "fixed-clock"; 64 #clock-cells = <0>; 65 /* This value must be overridden by the board. */ 66 clock-frequency = <0>; 67 }; 68 69 cpus { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 cpu0: cpu@0 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <0>; 77 clock-frequency = <1300000000>; 78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 79 power-domains = <&sysc R8A7790_PD_CA15_CPU0>; 80 enable-method = "renesas,apmu"; 81 next-level-cache = <&L2_CA15>; 82 capacity-dmips-mhz = <1024>; 83 voltage-tolerance = <1>; /* 1% */ 84 clock-latency = <300000>; /* 300 us */ 85 86 /* kHz - uV - OPPs unknown yet */ 87 operating-points = <1400000 1000000>, 88 <1225000 1000000>, 89 <1050000 1000000>, 90 < 875000 1000000>, 91 < 700000 1000000>, 92 < 350000 1000000>; 93 }; 94 95 cpu1: cpu@1 { 96 device_type = "cpu"; 97 compatible = "arm,cortex-a15"; 98 reg = <1>; 99 clock-frequency = <1300000000>; 100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>; 102 enable-method = "renesas,apmu"; 103 next-level-cache = <&L2_CA15>; 104 capacity-dmips-mhz = <1024>; 105 voltage-tolerance = <1>; /* 1% */ 106 clock-latency = <300000>; /* 300 us */ 107 108 /* kHz - uV - OPPs unknown yet */ 109 operating-points = <1400000 1000000>, 110 <1225000 1000000>, 111 <1050000 1000000>, 112 < 875000 1000000>, 113 < 700000 1000000>, 114 < 350000 1000000>; 115 }; 116 117 cpu2: cpu@2 { 118 device_type = "cpu"; 119 compatible = "arm,cortex-a15"; 120 reg = <2>; 121 clock-frequency = <1300000000>; 122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 123 power-domains = <&sysc R8A7790_PD_CA15_CPU2>; 124 enable-method = "renesas,apmu"; 125 next-level-cache = <&L2_CA15>; 126 capacity-dmips-mhz = <1024>; 127 voltage-tolerance = <1>; /* 1% */ 128 clock-latency = <300000>; /* 300 us */ 129 130 /* kHz - uV - OPPs unknown yet */ 131 operating-points = <1400000 1000000>, 132 <1225000 1000000>, 133 <1050000 1000000>, 134 < 875000 1000000>, 135 < 700000 1000000>, 136 < 350000 1000000>; 137 }; 138 139 cpu3: cpu@3 { 140 device_type = "cpu"; 141 compatible = "arm,cortex-a15"; 142 reg = <3>; 143 clock-frequency = <1300000000>; 144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 145 power-domains = <&sysc R8A7790_PD_CA15_CPU3>; 146 enable-method = "renesas,apmu"; 147 next-level-cache = <&L2_CA15>; 148 capacity-dmips-mhz = <1024>; 149 voltage-tolerance = <1>; /* 1% */ 150 clock-latency = <300000>; /* 300 us */ 151 152 /* kHz - uV - OPPs unknown yet */ 153 operating-points = <1400000 1000000>, 154 <1225000 1000000>, 155 <1050000 1000000>, 156 < 875000 1000000>, 157 < 700000 1000000>, 158 < 350000 1000000>; 159 }; 160 161 cpu4: cpu@100 { 162 device_type = "cpu"; 163 compatible = "arm,cortex-a7"; 164 reg = <0x100>; 165 clock-frequency = <780000000>; 166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 167 power-domains = <&sysc R8A7790_PD_CA7_CPU0>; 168 enable-method = "renesas,apmu"; 169 next-level-cache = <&L2_CA7>; 170 capacity-dmips-mhz = <539>; 171 }; 172 173 cpu5: cpu@101 { 174 device_type = "cpu"; 175 compatible = "arm,cortex-a7"; 176 reg = <0x101>; 177 clock-frequency = <780000000>; 178 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 179 power-domains = <&sysc R8A7790_PD_CA7_CPU1>; 180 enable-method = "renesas,apmu"; 181 next-level-cache = <&L2_CA7>; 182 capacity-dmips-mhz = <539>; 183 }; 184 185 cpu6: cpu@102 { 186 device_type = "cpu"; 187 compatible = "arm,cortex-a7"; 188 reg = <0x102>; 189 clock-frequency = <780000000>; 190 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 191 power-domains = <&sysc R8A7790_PD_CA7_CPU2>; 192 enable-method = "renesas,apmu"; 193 next-level-cache = <&L2_CA7>; 194 capacity-dmips-mhz = <539>; 195 }; 196 197 cpu7: cpu@103 { 198 device_type = "cpu"; 199 compatible = "arm,cortex-a7"; 200 reg = <0x103>; 201 clock-frequency = <780000000>; 202 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 203 power-domains = <&sysc R8A7790_PD_CA7_CPU3>; 204 enable-method = "renesas,apmu"; 205 next-level-cache = <&L2_CA7>; 206 capacity-dmips-mhz = <539>; 207 }; 208 209 L2_CA15: cache-controller-0 { 210 compatible = "cache"; 211 power-domains = <&sysc R8A7790_PD_CA15_SCU>; 212 cache-unified; 213 cache-level = <2>; 214 }; 215 216 L2_CA7: cache-controller-1 { 217 compatible = "cache"; 218 power-domains = <&sysc R8A7790_PD_CA7_SCU>; 219 cache-unified; 220 cache-level = <2>; 221 }; 222 }; 223 224 /* External root clock */ 225 extal_clk: extal { 226 compatible = "fixed-clock"; 227 #clock-cells = <0>; 228 /* This value must be overridden by the board. */ 229 clock-frequency = <0>; 230 bootph-all; 231 }; 232 233 /* External PCIe clock - can be overridden by the board */ 234 pcie_bus_clk: pcie_bus { 235 compatible = "fixed-clock"; 236 #clock-cells = <0>; 237 clock-frequency = <0>; 238 }; 239 240 pmu-0 { 241 compatible = "arm,cortex-a15-pmu"; 242 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 243 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 244 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 245 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 246 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 247 }; 248 249 pmu-1 { 250 compatible = "arm,cortex-a7-pmu"; 251 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 252 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 253 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 254 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 255 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; 256 }; 257 258 /* External SCIF clock */ 259 scif_clk: scif { 260 compatible = "fixed-clock"; 261 #clock-cells = <0>; 262 /* This value must be overridden by the board. */ 263 clock-frequency = <0>; 264 }; 265 266 soc { 267 compatible = "simple-bus"; 268 interrupt-parent = <&gic>; 269 bootph-all; 270 271 #address-cells = <2>; 272 #size-cells = <2>; 273 ranges; 274 275 rwdt: watchdog@e6020000 { 276 compatible = "renesas,r8a7790-wdt", 277 "renesas,rcar-gen2-wdt"; 278 reg = <0 0xe6020000 0 0x0c>; 279 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 280 clocks = <&cpg CPG_MOD 402>; 281 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 282 resets = <&cpg 402>; 283 status = "disabled"; 284 }; 285 286 gpio0: gpio@e6050000 { 287 compatible = "renesas,gpio-r8a7790", 288 "renesas,rcar-gen2-gpio"; 289 reg = <0 0xe6050000 0 0x50>; 290 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 291 #gpio-cells = <2>; 292 gpio-controller; 293 gpio-ranges = <&pfc 0 0 32>; 294 #interrupt-cells = <2>; 295 interrupt-controller; 296 clocks = <&cpg CPG_MOD 912>; 297 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 298 resets = <&cpg 912>; 299 }; 300 301 gpio1: gpio@e6051000 { 302 compatible = "renesas,gpio-r8a7790", 303 "renesas,rcar-gen2-gpio"; 304 reg = <0 0xe6051000 0 0x50>; 305 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 306 #gpio-cells = <2>; 307 gpio-controller; 308 gpio-ranges = <&pfc 0 32 30>; 309 #interrupt-cells = <2>; 310 interrupt-controller; 311 clocks = <&cpg CPG_MOD 911>; 312 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 313 resets = <&cpg 911>; 314 }; 315 316 gpio2: gpio@e6052000 { 317 compatible = "renesas,gpio-r8a7790", 318 "renesas,rcar-gen2-gpio"; 319 reg = <0 0xe6052000 0 0x50>; 320 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 321 #gpio-cells = <2>; 322 gpio-controller; 323 gpio-ranges = <&pfc 0 64 30>; 324 #interrupt-cells = <2>; 325 interrupt-controller; 326 clocks = <&cpg CPG_MOD 910>; 327 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 328 resets = <&cpg 910>; 329 }; 330 331 gpio3: gpio@e6053000 { 332 compatible = "renesas,gpio-r8a7790", 333 "renesas,rcar-gen2-gpio"; 334 reg = <0 0xe6053000 0 0x50>; 335 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 336 #gpio-cells = <2>; 337 gpio-controller; 338 gpio-ranges = <&pfc 0 96 32>; 339 #interrupt-cells = <2>; 340 interrupt-controller; 341 clocks = <&cpg CPG_MOD 909>; 342 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 343 resets = <&cpg 909>; 344 }; 345 346 gpio4: gpio@e6054000 { 347 compatible = "renesas,gpio-r8a7790", 348 "renesas,rcar-gen2-gpio"; 349 reg = <0 0xe6054000 0 0x50>; 350 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 351 #gpio-cells = <2>; 352 gpio-controller; 353 gpio-ranges = <&pfc 0 128 32>; 354 #interrupt-cells = <2>; 355 interrupt-controller; 356 clocks = <&cpg CPG_MOD 908>; 357 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 358 resets = <&cpg 908>; 359 }; 360 361 gpio5: gpio@e6055000 { 362 compatible = "renesas,gpio-r8a7790", 363 "renesas,rcar-gen2-gpio"; 364 reg = <0 0xe6055000 0 0x50>; 365 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 366 #gpio-cells = <2>; 367 gpio-controller; 368 gpio-ranges = <&pfc 0 160 32>; 369 #interrupt-cells = <2>; 370 interrupt-controller; 371 clocks = <&cpg CPG_MOD 907>; 372 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 373 resets = <&cpg 907>; 374 }; 375 376 pfc: pinctrl@e6060000 { 377 compatible = "renesas,pfc-r8a7790"; 378 reg = <0 0xe6060000 0 0x250>; 379 bootph-all; 380 }; 381 382 tpu: pwm@e60f0000 { 383 compatible = "renesas,tpu-r8a7790", "renesas,tpu"; 384 reg = <0 0xe60f0000 0 0x148>; 385 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 304>; 387 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 388 resets = <&cpg 304>; 389 #pwm-cells = <3>; 390 status = "disabled"; 391 }; 392 393 cpg: clock-controller@e6150000 { 394 compatible = "renesas,r8a7790-cpg-mssr"; 395 reg = <0 0xe6150000 0 0x1000>; 396 clocks = <&extal_clk>, <&usb_extal_clk>; 397 clock-names = "extal", "usb_extal"; 398 #clock-cells = <2>; 399 #power-domain-cells = <0>; 400 #reset-cells = <1>; 401 bootph-all; 402 }; 403 404 apmu@e6151000 { 405 compatible = "renesas,r8a7790-apmu", "renesas,apmu"; 406 reg = <0 0xe6151000 0 0x188>; 407 cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; 408 }; 409 410 apmu@e6152000 { 411 compatible = "renesas,r8a7790-apmu", "renesas,apmu"; 412 reg = <0 0xe6152000 0 0x188>; 413 cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 414 }; 415 416 rst: reset-controller@e6160000 { 417 compatible = "renesas,r8a7790-rst"; 418 reg = <0 0xe6160000 0 0x0100>; 419 bootph-all; 420 }; 421 422 sysc: system-controller@e6180000 { 423 compatible = "renesas,r8a7790-sysc"; 424 reg = <0 0xe6180000 0 0x0200>; 425 #power-domain-cells = <1>; 426 }; 427 428 irqc0: interrupt-controller@e61c0000 { 429 compatible = "renesas,irqc-r8a7790", "renesas,irqc"; 430 #interrupt-cells = <2>; 431 interrupt-controller; 432 reg = <0 0xe61c0000 0 0x200>; 433 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 437 clocks = <&cpg CPG_MOD 407>; 438 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 439 resets = <&cpg 407>; 440 }; 441 442 tmu0: timer@e61e0000 { 443 compatible = "renesas,tmu-r8a7790", "renesas,tmu"; 444 reg = <0 0xe61e0000 0 0x30>; 445 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 446 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 447 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 448 interrupt-names = "tuni0", "tuni1", "tuni2"; 449 clocks = <&cpg CPG_MOD 125>; 450 clock-names = "fck"; 451 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 452 resets = <&cpg 125>; 453 status = "disabled"; 454 }; 455 456 tmu1: timer@fff60000 { 457 compatible = "renesas,tmu-r8a7790", "renesas,tmu"; 458 reg = <0 0xfff60000 0 0x30>; 459 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 460 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 461 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 462 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 463 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 464 clocks = <&cpg CPG_MOD 111>; 465 clock-names = "fck"; 466 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 467 resets = <&cpg 111>; 468 status = "disabled"; 469 }; 470 471 tmu2: timer@fff70000 { 472 compatible = "renesas,tmu-r8a7790", "renesas,tmu"; 473 reg = <0 0xfff70000 0 0x30>; 474 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 478 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 479 clocks = <&cpg CPG_MOD 122>; 480 clock-names = "fck"; 481 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 482 resets = <&cpg 122>; 483 status = "disabled"; 484 }; 485 486 tmu3: timer@fff80000 { 487 compatible = "renesas,tmu-r8a7790", "renesas,tmu"; 488 reg = <0 0xfff80000 0 0x30>; 489 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 492 interrupt-names = "tuni0", "tuni1", "tuni2"; 493 clocks = <&cpg CPG_MOD 121>; 494 clock-names = "fck"; 495 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 496 resets = <&cpg 121>; 497 status = "disabled"; 498 }; 499 500 thermal: thermal@e61f0000 { 501 compatible = "renesas,thermal-r8a7790", 502 "renesas,rcar-gen2-thermal", 503 "renesas,rcar-thermal"; 504 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 505 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 506 clocks = <&cpg CPG_MOD 522>; 507 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 508 resets = <&cpg 522>; 509 #thermal-sensor-cells = <0>; 510 }; 511 512 ipmmu_sy0: iommu@e6280000 { 513 compatible = "renesas,ipmmu-r8a7790", 514 "renesas,ipmmu-vmsa"; 515 reg = <0 0xe6280000 0 0x1000>; 516 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 518 #iommu-cells = <1>; 519 status = "disabled"; 520 }; 521 522 ipmmu_sy1: iommu@e6290000 { 523 compatible = "renesas,ipmmu-r8a7790", 524 "renesas,ipmmu-vmsa"; 525 reg = <0 0xe6290000 0 0x1000>; 526 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 527 #iommu-cells = <1>; 528 status = "disabled"; 529 }; 530 531 ipmmu_ds: iommu@e6740000 { 532 compatible = "renesas,ipmmu-r8a7790", 533 "renesas,ipmmu-vmsa"; 534 reg = <0 0xe6740000 0 0x1000>; 535 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 537 #iommu-cells = <1>; 538 status = "disabled"; 539 }; 540 541 ipmmu_mp: iommu@ec680000 { 542 compatible = "renesas,ipmmu-r8a7790", 543 "renesas,ipmmu-vmsa"; 544 reg = <0 0xec680000 0 0x1000>; 545 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 546 #iommu-cells = <1>; 547 status = "disabled"; 548 }; 549 550 ipmmu_mx: iommu@fe951000 { 551 compatible = "renesas,ipmmu-r8a7790", 552 "renesas,ipmmu-vmsa"; 553 reg = <0 0xfe951000 0 0x1000>; 554 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 555 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 556 #iommu-cells = <1>; 557 status = "disabled"; 558 }; 559 560 ipmmu_rt: iommu@ffc80000 { 561 compatible = "renesas,ipmmu-r8a7790", 562 "renesas,ipmmu-vmsa"; 563 reg = <0 0xffc80000 0 0x1000>; 564 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 565 #iommu-cells = <1>; 566 status = "disabled"; 567 }; 568 569 icram0: sram@e63a0000 { 570 compatible = "mmio-sram"; 571 reg = <0 0xe63a0000 0 0x12000>; 572 #address-cells = <1>; 573 #size-cells = <1>; 574 ranges = <0 0 0xe63a0000 0x12000>; 575 }; 576 577 icram1: sram@e63c0000 { 578 compatible = "mmio-sram"; 579 reg = <0 0xe63c0000 0 0x1000>; 580 #address-cells = <1>; 581 #size-cells = <1>; 582 ranges = <0 0 0xe63c0000 0x1000>; 583 584 smp-sram@0 { 585 compatible = "renesas,smp-sram"; 586 reg = <0 0x100>; 587 }; 588 }; 589 590 i2c0: i2c@e6508000 { 591 #address-cells = <1>; 592 #size-cells = <0>; 593 compatible = "renesas,i2c-r8a7790", 594 "renesas,rcar-gen2-i2c"; 595 reg = <0 0xe6508000 0 0x40>; 596 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 931>; 598 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 599 resets = <&cpg 931>; 600 i2c-scl-internal-delay-ns = <110>; 601 status = "disabled"; 602 }; 603 604 i2c1: i2c@e6518000 { 605 #address-cells = <1>; 606 #size-cells = <0>; 607 compatible = "renesas,i2c-r8a7790", 608 "renesas,rcar-gen2-i2c"; 609 reg = <0 0xe6518000 0 0x40>; 610 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&cpg CPG_MOD 930>; 612 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 613 resets = <&cpg 930>; 614 i2c-scl-internal-delay-ns = <6>; 615 status = "disabled"; 616 }; 617 618 i2c2: i2c@e6530000 { 619 #address-cells = <1>; 620 #size-cells = <0>; 621 compatible = "renesas,i2c-r8a7790", 622 "renesas,rcar-gen2-i2c"; 623 reg = <0 0xe6530000 0 0x40>; 624 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 625 clocks = <&cpg CPG_MOD 929>; 626 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 627 resets = <&cpg 929>; 628 i2c-scl-internal-delay-ns = <6>; 629 status = "disabled"; 630 }; 631 632 i2c3: i2c@e6540000 { 633 #address-cells = <1>; 634 #size-cells = <0>; 635 compatible = "renesas,i2c-r8a7790", 636 "renesas,rcar-gen2-i2c"; 637 reg = <0 0xe6540000 0 0x40>; 638 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 639 clocks = <&cpg CPG_MOD 928>; 640 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 641 resets = <&cpg 928>; 642 i2c-scl-internal-delay-ns = <110>; 643 status = "disabled"; 644 }; 645 646 iic0: i2c@e6500000 { 647 #address-cells = <1>; 648 #size-cells = <0>; 649 compatible = "renesas,iic-r8a7790", 650 "renesas,rcar-gen2-iic", 651 "renesas,rmobile-iic"; 652 reg = <0 0xe6500000 0 0x425>; 653 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 654 clocks = <&cpg CPG_MOD 318>; 655 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 656 <&dmac1 0x61>, <&dmac1 0x62>; 657 dma-names = "tx", "rx", "tx", "rx"; 658 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 659 resets = <&cpg 318>; 660 status = "disabled"; 661 }; 662 663 iic1: i2c@e6510000 { 664 #address-cells = <1>; 665 #size-cells = <0>; 666 compatible = "renesas,iic-r8a7790", 667 "renesas,rcar-gen2-iic", 668 "renesas,rmobile-iic"; 669 reg = <0 0xe6510000 0 0x425>; 670 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 671 clocks = <&cpg CPG_MOD 323>; 672 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 673 <&dmac1 0x65>, <&dmac1 0x66>; 674 dma-names = "tx", "rx", "tx", "rx"; 675 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 676 resets = <&cpg 323>; 677 status = "disabled"; 678 }; 679 680 iic2: i2c@e6520000 { 681 #address-cells = <1>; 682 #size-cells = <0>; 683 compatible = "renesas,iic-r8a7790", 684 "renesas,rcar-gen2-iic", 685 "renesas,rmobile-iic"; 686 reg = <0 0xe6520000 0 0x425>; 687 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 688 clocks = <&cpg CPG_MOD 300>; 689 dmas = <&dmac0 0x69>, <&dmac0 0x6a>, 690 <&dmac1 0x69>, <&dmac1 0x6a>; 691 dma-names = "tx", "rx", "tx", "rx"; 692 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 693 resets = <&cpg 300>; 694 status = "disabled"; 695 }; 696 697 iic3: i2c@e60b0000 { 698 #address-cells = <1>; 699 #size-cells = <0>; 700 compatible = "renesas,iic-r8a7790", 701 "renesas,rcar-gen2-iic", 702 "renesas,rmobile-iic"; 703 reg = <0 0xe60b0000 0 0x425>; 704 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 705 clocks = <&cpg CPG_MOD 926>; 706 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 707 <&dmac1 0x77>, <&dmac1 0x78>; 708 dma-names = "tx", "rx", "tx", "rx"; 709 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 710 resets = <&cpg 926>; 711 status = "disabled"; 712 }; 713 714 hsusb: usb@e6590000 { 715 compatible = "renesas,usbhs-r8a7790", 716 "renesas,rcar-gen2-usbhs"; 717 reg = <0 0xe6590000 0 0x100>; 718 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 719 clocks = <&cpg CPG_MOD 704>; 720 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 721 <&usb_dmac1 0>, <&usb_dmac1 1>; 722 dma-names = "ch0", "ch1", "ch2", "ch3"; 723 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 724 resets = <&cpg 704>; 725 renesas,buswait = <4>; 726 phys = <&usb0 1>; 727 phy-names = "usb"; 728 status = "disabled"; 729 }; 730 731 usbphy: usb-phy-controller@e6590100 { 732 compatible = "renesas,usb-phy-r8a7790", 733 "renesas,rcar-gen2-usb-phy"; 734 reg = <0 0xe6590100 0 0x100>; 735 #address-cells = <1>; 736 #size-cells = <0>; 737 clocks = <&cpg CPG_MOD 704>; 738 clock-names = "usbhs"; 739 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 740 resets = <&cpg 704>; 741 status = "disabled"; 742 743 usb0: usb-phy@0 { 744 reg = <0>; 745 #phy-cells = <1>; 746 }; 747 usb2: usb-phy@2 { 748 reg = <2>; 749 #phy-cells = <1>; 750 }; 751 }; 752 753 usb_dmac0: dma-controller@e65a0000 { 754 compatible = "renesas,r8a7790-usb-dmac", 755 "renesas,usb-dmac"; 756 reg = <0 0xe65a0000 0 0x100>; 757 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 759 interrupt-names = "ch0", "ch1"; 760 clocks = <&cpg CPG_MOD 330>; 761 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 762 resets = <&cpg 330>; 763 #dma-cells = <1>; 764 dma-channels = <2>; 765 }; 766 767 usb_dmac1: dma-controller@e65b0000 { 768 compatible = "renesas,r8a7790-usb-dmac", 769 "renesas,usb-dmac"; 770 reg = <0 0xe65b0000 0 0x100>; 771 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 773 interrupt-names = "ch0", "ch1"; 774 clocks = <&cpg CPG_MOD 331>; 775 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 776 resets = <&cpg 331>; 777 #dma-cells = <1>; 778 dma-channels = <2>; 779 }; 780 781 dmac0: dma-controller@e6700000 { 782 compatible = "renesas,dmac-r8a7790", 783 "renesas,rcar-dmac"; 784 reg = <0 0xe6700000 0 0x20000>; 785 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 801 interrupt-names = "error", 802 "ch0", "ch1", "ch2", "ch3", 803 "ch4", "ch5", "ch6", "ch7", 804 "ch8", "ch9", "ch10", "ch11", 805 "ch12", "ch13", "ch14"; 806 clocks = <&cpg CPG_MOD 219>; 807 clock-names = "fck"; 808 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 809 resets = <&cpg 219>; 810 #dma-cells = <1>; 811 dma-channels = <15>; 812 }; 813 814 dmac1: dma-controller@e6720000 { 815 compatible = "renesas,dmac-r8a7790", 816 "renesas,rcar-dmac"; 817 reg = <0 0xe6720000 0 0x20000>; 818 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 834 interrupt-names = "error", 835 "ch0", "ch1", "ch2", "ch3", 836 "ch4", "ch5", "ch6", "ch7", 837 "ch8", "ch9", "ch10", "ch11", 838 "ch12", "ch13", "ch14"; 839 clocks = <&cpg CPG_MOD 218>; 840 clock-names = "fck"; 841 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 842 resets = <&cpg 218>; 843 #dma-cells = <1>; 844 dma-channels = <15>; 845 }; 846 847 avb: ethernet@e6800000 { 848 compatible = "renesas,etheravb-r8a7790", 849 "renesas,etheravb-rcar-gen2"; 850 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 851 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 852 clocks = <&cpg CPG_MOD 812>; 853 clock-names = "fck"; 854 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 855 resets = <&cpg 812>; 856 #address-cells = <1>; 857 #size-cells = <0>; 858 status = "disabled"; 859 }; 860 861 qspi: spi@e6b10000 { 862 compatible = "renesas,qspi-r8a7790", "renesas,qspi"; 863 reg = <0 0xe6b10000 0 0x2c>; 864 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 865 clocks = <&cpg CPG_MOD 917>; 866 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 867 <&dmac1 0x17>, <&dmac1 0x18>; 868 dma-names = "tx", "rx", "tx", "rx"; 869 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 870 resets = <&cpg 917>; 871 num-cs = <1>; 872 #address-cells = <1>; 873 #size-cells = <0>; 874 status = "disabled"; 875 }; 876 877 scifa0: serial@e6c40000 { 878 compatible = "renesas,scifa-r8a7790", 879 "renesas,rcar-gen2-scifa", "renesas,scifa"; 880 reg = <0 0xe6c40000 0 64>; 881 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 882 clocks = <&cpg CPG_MOD 204>; 883 clock-names = "fck"; 884 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 885 <&dmac1 0x21>, <&dmac1 0x22>; 886 dma-names = "tx", "rx", "tx", "rx"; 887 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 888 resets = <&cpg 204>; 889 status = "disabled"; 890 }; 891 892 scifa1: serial@e6c50000 { 893 compatible = "renesas,scifa-r8a7790", 894 "renesas,rcar-gen2-scifa", "renesas,scifa"; 895 reg = <0 0xe6c50000 0 64>; 896 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 897 clocks = <&cpg CPG_MOD 203>; 898 clock-names = "fck"; 899 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 900 <&dmac1 0x25>, <&dmac1 0x26>; 901 dma-names = "tx", "rx", "tx", "rx"; 902 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 903 resets = <&cpg 203>; 904 status = "disabled"; 905 }; 906 907 scifa2: serial@e6c60000 { 908 compatible = "renesas,scifa-r8a7790", 909 "renesas,rcar-gen2-scifa", "renesas,scifa"; 910 reg = <0 0xe6c60000 0 64>; 911 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 912 clocks = <&cpg CPG_MOD 202>; 913 clock-names = "fck"; 914 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 915 <&dmac1 0x27>, <&dmac1 0x28>; 916 dma-names = "tx", "rx", "tx", "rx"; 917 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 918 resets = <&cpg 202>; 919 status = "disabled"; 920 }; 921 922 scifb0: serial@e6c20000 { 923 compatible = "renesas,scifb-r8a7790", 924 "renesas,rcar-gen2-scifb", "renesas,scifb"; 925 reg = <0 0xe6c20000 0 0x100>; 926 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 927 clocks = <&cpg CPG_MOD 206>; 928 clock-names = "fck"; 929 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 930 <&dmac1 0x3d>, <&dmac1 0x3e>; 931 dma-names = "tx", "rx", "tx", "rx"; 932 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 933 resets = <&cpg 206>; 934 status = "disabled"; 935 }; 936 937 scifb1: serial@e6c30000 { 938 compatible = "renesas,scifb-r8a7790", 939 "renesas,rcar-gen2-scifb", "renesas,scifb"; 940 reg = <0 0xe6c30000 0 0x100>; 941 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 942 clocks = <&cpg CPG_MOD 207>; 943 clock-names = "fck"; 944 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 945 <&dmac1 0x19>, <&dmac1 0x1a>; 946 dma-names = "tx", "rx", "tx", "rx"; 947 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 948 resets = <&cpg 207>; 949 status = "disabled"; 950 }; 951 952 scifb2: serial@e6ce0000 { 953 compatible = "renesas,scifb-r8a7790", 954 "renesas,rcar-gen2-scifb", "renesas,scifb"; 955 reg = <0 0xe6ce0000 0 0x100>; 956 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 957 clocks = <&cpg CPG_MOD 216>; 958 clock-names = "fck"; 959 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 960 <&dmac1 0x1d>, <&dmac1 0x1e>; 961 dma-names = "tx", "rx", "tx", "rx"; 962 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 963 resets = <&cpg 216>; 964 status = "disabled"; 965 }; 966 967 scif0: serial@e6e60000 { 968 compatible = "renesas,scif-r8a7790", 969 "renesas,rcar-gen2-scif", 970 "renesas,scif"; 971 reg = <0 0xe6e60000 0 64>; 972 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 973 clocks = <&cpg CPG_MOD 721>, 974 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 975 clock-names = "fck", "brg_int", "scif_clk"; 976 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 977 <&dmac1 0x29>, <&dmac1 0x2a>; 978 dma-names = "tx", "rx", "tx", "rx"; 979 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 980 resets = <&cpg 721>; 981 status = "disabled"; 982 }; 983 984 scif1: serial@e6e68000 { 985 compatible = "renesas,scif-r8a7790", 986 "renesas,rcar-gen2-scif", 987 "renesas,scif"; 988 reg = <0 0xe6e68000 0 64>; 989 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 990 clocks = <&cpg CPG_MOD 720>, 991 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 992 clock-names = "fck", "brg_int", "scif_clk"; 993 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 994 <&dmac1 0x2d>, <&dmac1 0x2e>; 995 dma-names = "tx", "rx", "tx", "rx"; 996 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 997 resets = <&cpg 720>; 998 status = "disabled"; 999 }; 1000 1001 scif2: serial@e6e56000 { 1002 compatible = "renesas,scif-r8a7790", 1003 "renesas,rcar-gen2-scif", 1004 "renesas,scif"; 1005 reg = <0 0xe6e56000 0 64>; 1006 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1007 clocks = <&cpg CPG_MOD 310>, 1008 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 1009 clock-names = "fck", "brg_int", "scif_clk"; 1010 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 1011 <&dmac1 0x2b>, <&dmac1 0x2c>; 1012 dma-names = "tx", "rx", "tx", "rx"; 1013 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1014 resets = <&cpg 310>; 1015 status = "disabled"; 1016 }; 1017 1018 hscif0: serial@e62c0000 { 1019 compatible = "renesas,hscif-r8a7790", 1020 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1021 reg = <0 0xe62c0000 0 96>; 1022 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 1023 clocks = <&cpg CPG_MOD 717>, 1024 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 1025 clock-names = "fck", "brg_int", "scif_clk"; 1026 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 1027 <&dmac1 0x39>, <&dmac1 0x3a>; 1028 dma-names = "tx", "rx", "tx", "rx"; 1029 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1030 resets = <&cpg 717>; 1031 status = "disabled"; 1032 }; 1033 1034 hscif1: serial@e62c8000 { 1035 compatible = "renesas,hscif-r8a7790", 1036 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1037 reg = <0 0xe62c8000 0 96>; 1038 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 1039 clocks = <&cpg CPG_MOD 716>, 1040 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 1041 clock-names = "fck", "brg_int", "scif_clk"; 1042 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 1043 <&dmac1 0x4d>, <&dmac1 0x4e>; 1044 dma-names = "tx", "rx", "tx", "rx"; 1045 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1046 resets = <&cpg 716>; 1047 status = "disabled"; 1048 }; 1049 1050 msiof0: spi@e6e20000 { 1051 compatible = "renesas,msiof-r8a7790", 1052 "renesas,rcar-gen2-msiof"; 1053 reg = <0 0xe6e20000 0 0x0064>; 1054 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1055 clocks = <&cpg CPG_MOD 0>; 1056 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1057 <&dmac1 0x51>, <&dmac1 0x52>; 1058 dma-names = "tx", "rx", "tx", "rx"; 1059 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1060 resets = <&cpg 0>; 1061 #address-cells = <1>; 1062 #size-cells = <0>; 1063 status = "disabled"; 1064 }; 1065 1066 msiof1: spi@e6e10000 { 1067 compatible = "renesas,msiof-r8a7790", 1068 "renesas,rcar-gen2-msiof"; 1069 reg = <0 0xe6e10000 0 0x0064>; 1070 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1071 clocks = <&cpg CPG_MOD 208>; 1072 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1073 <&dmac1 0x55>, <&dmac1 0x56>; 1074 dma-names = "tx", "rx", "tx", "rx"; 1075 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1076 resets = <&cpg 208>; 1077 #address-cells = <1>; 1078 #size-cells = <0>; 1079 status = "disabled"; 1080 }; 1081 1082 msiof2: spi@e6e00000 { 1083 compatible = "renesas,msiof-r8a7790", 1084 "renesas,rcar-gen2-msiof"; 1085 reg = <0 0xe6e00000 0 0x0064>; 1086 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1087 clocks = <&cpg CPG_MOD 205>; 1088 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1089 <&dmac1 0x41>, <&dmac1 0x42>; 1090 dma-names = "tx", "rx", "tx", "rx"; 1091 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1092 resets = <&cpg 205>; 1093 #address-cells = <1>; 1094 #size-cells = <0>; 1095 status = "disabled"; 1096 }; 1097 1098 msiof3: spi@e6c90000 { 1099 compatible = "renesas,msiof-r8a7790", 1100 "renesas,rcar-gen2-msiof"; 1101 reg = <0 0xe6c90000 0 0x0064>; 1102 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1103 clocks = <&cpg CPG_MOD 215>; 1104 dmas = <&dmac0 0x45>, <&dmac0 0x46>, 1105 <&dmac1 0x45>, <&dmac1 0x46>; 1106 dma-names = "tx", "rx", "tx", "rx"; 1107 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1108 resets = <&cpg 215>; 1109 #address-cells = <1>; 1110 #size-cells = <0>; 1111 status = "disabled"; 1112 }; 1113 1114 pwm0: pwm@e6e30000 { 1115 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1116 reg = <0 0xe6e30000 0 0x8>; 1117 clocks = <&cpg CPG_MOD 523>; 1118 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1119 resets = <&cpg 523>; 1120 #pwm-cells = <2>; 1121 status = "disabled"; 1122 }; 1123 1124 pwm1: pwm@e6e31000 { 1125 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e31000 0 0x8>; 1127 clocks = <&cpg CPG_MOD 523>; 1128 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1129 resets = <&cpg 523>; 1130 #pwm-cells = <2>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm2: pwm@e6e32000 { 1135 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e32000 0 0x8>; 1137 clocks = <&cpg CPG_MOD 523>; 1138 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1139 resets = <&cpg 523>; 1140 #pwm-cells = <2>; 1141 status = "disabled"; 1142 }; 1143 1144 pwm3: pwm@e6e33000 { 1145 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1146 reg = <0 0xe6e33000 0 0x8>; 1147 clocks = <&cpg CPG_MOD 523>; 1148 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1149 resets = <&cpg 523>; 1150 #pwm-cells = <2>; 1151 status = "disabled"; 1152 }; 1153 1154 pwm4: pwm@e6e34000 { 1155 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1156 reg = <0 0xe6e34000 0 0x8>; 1157 clocks = <&cpg CPG_MOD 523>; 1158 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1159 resets = <&cpg 523>; 1160 #pwm-cells = <2>; 1161 status = "disabled"; 1162 }; 1163 1164 pwm5: pwm@e6e35000 { 1165 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1166 reg = <0 0xe6e35000 0 0x8>; 1167 clocks = <&cpg CPG_MOD 523>; 1168 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1169 resets = <&cpg 523>; 1170 #pwm-cells = <2>; 1171 status = "disabled"; 1172 }; 1173 1174 pwm6: pwm@e6e36000 { 1175 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1176 reg = <0 0xe6e36000 0 0x8>; 1177 clocks = <&cpg CPG_MOD 523>; 1178 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1179 resets = <&cpg 523>; 1180 #pwm-cells = <2>; 1181 status = "disabled"; 1182 }; 1183 1184 can0: can@e6e80000 { 1185 compatible = "renesas,can-r8a7790", 1186 "renesas,rcar-gen2-can"; 1187 reg = <0 0xe6e80000 0 0x1000>; 1188 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1189 clocks = <&cpg CPG_MOD 916>, 1190 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; 1191 clock-names = "clkp1", "clkp2", "can_clk"; 1192 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1193 resets = <&cpg 916>; 1194 status = "disabled"; 1195 }; 1196 1197 can1: can@e6e88000 { 1198 compatible = "renesas,can-r8a7790", 1199 "renesas,rcar-gen2-can"; 1200 reg = <0 0xe6e88000 0 0x1000>; 1201 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1202 clocks = <&cpg CPG_MOD 915>, 1203 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; 1204 clock-names = "clkp1", "clkp2", "can_clk"; 1205 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1206 resets = <&cpg 915>; 1207 status = "disabled"; 1208 }; 1209 1210 vin0: video@e6ef0000 { 1211 compatible = "renesas,vin-r8a7790", 1212 "renesas,rcar-gen2-vin"; 1213 reg = <0 0xe6ef0000 0 0x1000>; 1214 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1215 clocks = <&cpg CPG_MOD 811>; 1216 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1217 resets = <&cpg 811>; 1218 status = "disabled"; 1219 }; 1220 1221 vin1: video@e6ef1000 { 1222 compatible = "renesas,vin-r8a7790", 1223 "renesas,rcar-gen2-vin"; 1224 reg = <0 0xe6ef1000 0 0x1000>; 1225 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 810>; 1227 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1228 resets = <&cpg 810>; 1229 status = "disabled"; 1230 }; 1231 1232 vin2: video@e6ef2000 { 1233 compatible = "renesas,vin-r8a7790", 1234 "renesas,rcar-gen2-vin"; 1235 reg = <0 0xe6ef2000 0 0x1000>; 1236 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1237 clocks = <&cpg CPG_MOD 809>; 1238 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1239 resets = <&cpg 809>; 1240 status = "disabled"; 1241 }; 1242 1243 vin3: video@e6ef3000 { 1244 compatible = "renesas,vin-r8a7790", 1245 "renesas,rcar-gen2-vin"; 1246 reg = <0 0xe6ef3000 0 0x1000>; 1247 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1248 clocks = <&cpg CPG_MOD 808>; 1249 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1250 resets = <&cpg 808>; 1251 status = "disabled"; 1252 }; 1253 1254 rcar_sound: sound@ec500000 { 1255 /* 1256 * #sound-dai-cells is required if simple-card 1257 * 1258 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1259 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1260 */ 1261 compatible = "renesas,rcar_sound-r8a7790", 1262 "renesas,rcar_sound-gen2"; 1263 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1264 <0 0xec5a0000 0 0x100>, /* ADG */ 1265 <0 0xec540000 0 0x1000>, /* SSIU */ 1266 <0 0xec541000 0 0x280>, /* SSI */ 1267 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1268 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1269 1270 clocks = <&cpg CPG_MOD 1005>, 1271 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1272 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1273 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1274 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1275 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1276 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1277 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1278 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1279 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1280 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1281 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1282 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1283 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1284 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1285 <&cpg CPG_CORE R8A7790_CLK_M2>; 1286 clock-names = "ssi-all", 1287 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1288 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1289 "ssi.1", "ssi.0", 1290 "src.9", "src.8", "src.7", "src.6", 1291 "src.5", "src.4", "src.3", "src.2", 1292 "src.1", "src.0", 1293 "ctu.0", "ctu.1", 1294 "mix.0", "mix.1", 1295 "dvc.0", "dvc.1", 1296 "clk_a", "clk_b", "clk_c", "clk_i"; 1297 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1298 resets = <&cpg 1005>, 1299 <&cpg 1006>, <&cpg 1007>, 1300 <&cpg 1008>, <&cpg 1009>, 1301 <&cpg 1010>, <&cpg 1011>, 1302 <&cpg 1012>, <&cpg 1013>, 1303 <&cpg 1014>, <&cpg 1015>; 1304 reset-names = "ssi-all", 1305 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1306 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1307 "ssi.1", "ssi.0"; 1308 1309 status = "disabled"; 1310 1311 rcar_sound,dvc { 1312 dvc0: dvc-0 { 1313 dmas = <&audma1 0xbc>; 1314 dma-names = "tx"; 1315 }; 1316 dvc1: dvc-1 { 1317 dmas = <&audma1 0xbe>; 1318 dma-names = "tx"; 1319 }; 1320 }; 1321 1322 rcar_sound,mix { 1323 mix0: mix-0 { }; 1324 mix1: mix-1 { }; 1325 }; 1326 1327 rcar_sound,ctu { 1328 ctu00: ctu-0 { }; 1329 ctu01: ctu-1 { }; 1330 ctu02: ctu-2 { }; 1331 ctu03: ctu-3 { }; 1332 ctu10: ctu-4 { }; 1333 ctu11: ctu-5 { }; 1334 ctu12: ctu-6 { }; 1335 ctu13: ctu-7 { }; 1336 }; 1337 1338 rcar_sound,src { 1339 src0: src-0 { 1340 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1341 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1342 dma-names = "rx", "tx"; 1343 }; 1344 src1: src-1 { 1345 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1346 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1347 dma-names = "rx", "tx"; 1348 }; 1349 src2: src-2 { 1350 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1351 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1352 dma-names = "rx", "tx"; 1353 }; 1354 src3: src-3 { 1355 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1356 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1357 dma-names = "rx", "tx"; 1358 }; 1359 src4: src-4 { 1360 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1361 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1362 dma-names = "rx", "tx"; 1363 }; 1364 src5: src-5 { 1365 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1366 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1367 dma-names = "rx", "tx"; 1368 }; 1369 src6: src-6 { 1370 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1371 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1372 dma-names = "rx", "tx"; 1373 }; 1374 src7: src-7 { 1375 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1376 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1377 dma-names = "rx", "tx"; 1378 }; 1379 src8: src-8 { 1380 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1381 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1382 dma-names = "rx", "tx"; 1383 }; 1384 src9: src-9 { 1385 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1386 dmas = <&audma0 0x97>, <&audma1 0xba>; 1387 dma-names = "rx", "tx"; 1388 }; 1389 }; 1390 1391 rcar_sound,ssi { 1392 ssi0: ssi-0 { 1393 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1394 dmas = <&audma0 0x01>, <&audma1 0x02>, 1395 <&audma0 0x15>, <&audma1 0x16>; 1396 dma-names = "rx", "tx", "rxu", "txu"; 1397 }; 1398 ssi1: ssi-1 { 1399 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1400 dmas = <&audma0 0x03>, <&audma1 0x04>, 1401 <&audma0 0x49>, <&audma1 0x4a>; 1402 dma-names = "rx", "tx", "rxu", "txu"; 1403 }; 1404 ssi2: ssi-2 { 1405 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1406 dmas = <&audma0 0x05>, <&audma1 0x06>, 1407 <&audma0 0x63>, <&audma1 0x64>; 1408 dma-names = "rx", "tx", "rxu", "txu"; 1409 }; 1410 ssi3: ssi-3 { 1411 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1412 dmas = <&audma0 0x07>, <&audma1 0x08>, 1413 <&audma0 0x6f>, <&audma1 0x70>; 1414 dma-names = "rx", "tx", "rxu", "txu"; 1415 }; 1416 ssi4: ssi-4 { 1417 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1418 dmas = <&audma0 0x09>, <&audma1 0x0a>, 1419 <&audma0 0x71>, <&audma1 0x72>; 1420 dma-names = "rx", "tx", "rxu", "txu"; 1421 }; 1422 ssi5: ssi-5 { 1423 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1424 dmas = <&audma0 0x0b>, <&audma1 0x0c>, 1425 <&audma0 0x73>, <&audma1 0x74>; 1426 dma-names = "rx", "tx", "rxu", "txu"; 1427 }; 1428 ssi6: ssi-6 { 1429 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1430 dmas = <&audma0 0x0d>, <&audma1 0x0e>, 1431 <&audma0 0x75>, <&audma1 0x76>; 1432 dma-names = "rx", "tx", "rxu", "txu"; 1433 }; 1434 ssi7: ssi-7 { 1435 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1436 dmas = <&audma0 0x0f>, <&audma1 0x10>, 1437 <&audma0 0x79>, <&audma1 0x7a>; 1438 dma-names = "rx", "tx", "rxu", "txu"; 1439 }; 1440 ssi8: ssi-8 { 1441 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1442 dmas = <&audma0 0x11>, <&audma1 0x12>, 1443 <&audma0 0x7b>, <&audma1 0x7c>; 1444 dma-names = "rx", "tx", "rxu", "txu"; 1445 }; 1446 ssi9: ssi-9 { 1447 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1448 dmas = <&audma0 0x13>, <&audma1 0x14>, 1449 <&audma0 0x7d>, <&audma1 0x7e>; 1450 dma-names = "rx", "tx", "rxu", "txu"; 1451 }; 1452 }; 1453 }; 1454 1455 audma0: dma-controller@ec700000 { 1456 compatible = "renesas,dmac-r8a7790", 1457 "renesas,rcar-dmac"; 1458 reg = <0 0xec700000 0 0x10000>; 1459 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1460 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1461 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1462 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1463 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1464 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1465 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1466 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1467 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1468 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1469 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1470 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1471 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1472 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1473 interrupt-names = "error", 1474 "ch0", "ch1", "ch2", "ch3", 1475 "ch4", "ch5", "ch6", "ch7", 1476 "ch8", "ch9", "ch10", "ch11", 1477 "ch12"; 1478 clocks = <&cpg CPG_MOD 502>; 1479 clock-names = "fck"; 1480 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1481 resets = <&cpg 502>; 1482 #dma-cells = <1>; 1483 dma-channels = <13>; 1484 }; 1485 1486 audma1: dma-controller@ec720000 { 1487 compatible = "renesas,dmac-r8a7790", 1488 "renesas,rcar-dmac"; 1489 reg = <0 0xec720000 0 0x10000>; 1490 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1491 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1492 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1493 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1494 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1495 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1496 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1497 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1498 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1499 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1500 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1501 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1502 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1503 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1504 interrupt-names = "error", 1505 "ch0", "ch1", "ch2", "ch3", 1506 "ch4", "ch5", "ch6", "ch7", 1507 "ch8", "ch9", "ch10", "ch11", 1508 "ch12"; 1509 clocks = <&cpg CPG_MOD 501>; 1510 clock-names = "fck"; 1511 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1512 resets = <&cpg 501>; 1513 #dma-cells = <1>; 1514 dma-channels = <13>; 1515 }; 1516 1517 xhci: usb@ee000000 { 1518 compatible = "renesas,xhci-r8a7790", 1519 "renesas,rcar-gen2-xhci"; 1520 reg = <0 0xee000000 0 0xc00>; 1521 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1522 clocks = <&cpg CPG_MOD 328>; 1523 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1524 resets = <&cpg 328>; 1525 phys = <&usb2 1>; 1526 phy-names = "usb"; 1527 status = "disabled"; 1528 }; 1529 1530 pci0: pci@ee090000 { 1531 compatible = "renesas,pci-r8a7790", 1532 "renesas,pci-rcar-gen2"; 1533 device_type = "pci"; 1534 reg = <0 0xee090000 0 0xc00>, 1535 <0 0xee080000 0 0x1100>; 1536 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1537 clocks = <&cpg CPG_MOD 703>; 1538 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1539 resets = <&cpg 703>; 1540 status = "disabled"; 1541 1542 bus-range = <0 0>; 1543 #address-cells = <3>; 1544 #size-cells = <2>; 1545 #interrupt-cells = <1>; 1546 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1547 interrupt-map-mask = <0xf800 0 0 0x7>; 1548 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1549 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1550 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1551 1552 usb@1,0 { 1553 reg = <0x800 0 0 0 0>; 1554 phys = <&usb0 0>; 1555 phy-names = "usb"; 1556 }; 1557 1558 usb@2,0 { 1559 reg = <0x1000 0 0 0 0>; 1560 phys = <&usb0 0>; 1561 phy-names = "usb"; 1562 }; 1563 }; 1564 1565 pci1: pci@ee0b0000 { 1566 compatible = "renesas,pci-r8a7790", 1567 "renesas,pci-rcar-gen2"; 1568 device_type = "pci"; 1569 reg = <0 0xee0b0000 0 0xc00>, 1570 <0 0xee0a0000 0 0x1100>; 1571 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1572 clocks = <&cpg CPG_MOD 703>; 1573 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1574 resets = <&cpg 703>; 1575 status = "disabled"; 1576 1577 bus-range = <1 1>; 1578 #address-cells = <3>; 1579 #size-cells = <2>; 1580 #interrupt-cells = <1>; 1581 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; 1582 interrupt-map-mask = <0xf800 0 0 0x7>; 1583 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1584 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1585 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1586 }; 1587 1588 pci2: pci@ee0d0000 { 1589 compatible = "renesas,pci-r8a7790", 1590 "renesas,pci-rcar-gen2"; 1591 device_type = "pci"; 1592 clocks = <&cpg CPG_MOD 703>; 1593 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1594 resets = <&cpg 703>; 1595 reg = <0 0xee0d0000 0 0xc00>, 1596 <0 0xee0c0000 0 0x1100>; 1597 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1598 status = "disabled"; 1599 1600 bus-range = <2 2>; 1601 #address-cells = <3>; 1602 #size-cells = <2>; 1603 #interrupt-cells = <1>; 1604 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1605 interrupt-map-mask = <0xf800 0 0 0x7>; 1606 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1607 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1608 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1609 1610 usb@1,0 { 1611 reg = <0x20800 0 0 0 0>; 1612 phys = <&usb2 0>; 1613 phy-names = "usb"; 1614 }; 1615 1616 usb@2,0 { 1617 reg = <0x21000 0 0 0 0>; 1618 phys = <&usb2 0>; 1619 phy-names = "usb"; 1620 }; 1621 }; 1622 1623 sdhi0: mmc@ee100000 { 1624 compatible = "renesas,sdhi-r8a7790", 1625 "renesas,rcar-gen2-sdhi"; 1626 reg = <0 0xee100000 0 0x328>; 1627 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1628 clocks = <&cpg CPG_MOD 314>; 1629 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1630 <&dmac1 0xcd>, <&dmac1 0xce>; 1631 dma-names = "tx", "rx", "tx", "rx"; 1632 max-frequency = <195000000>; 1633 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1634 resets = <&cpg 314>; 1635 status = "disabled"; 1636 }; 1637 1638 sdhi1: mmc@ee120000 { 1639 compatible = "renesas,sdhi-r8a7790", 1640 "renesas,rcar-gen2-sdhi"; 1641 reg = <0 0xee120000 0 0x328>; 1642 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1643 clocks = <&cpg CPG_MOD 313>; 1644 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, 1645 <&dmac1 0xc9>, <&dmac1 0xca>; 1646 dma-names = "tx", "rx", "tx", "rx"; 1647 max-frequency = <195000000>; 1648 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1649 resets = <&cpg 313>; 1650 status = "disabled"; 1651 }; 1652 1653 sdhi2: mmc@ee140000 { 1654 compatible = "renesas,sdhi-r8a7790", 1655 "renesas,rcar-gen2-sdhi"; 1656 reg = <0 0xee140000 0 0x100>; 1657 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1658 clocks = <&cpg CPG_MOD 312>; 1659 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1660 <&dmac1 0xc1>, <&dmac1 0xc2>; 1661 dma-names = "tx", "rx", "tx", "rx"; 1662 max-frequency = <97500000>; 1663 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1664 resets = <&cpg 312>; 1665 status = "disabled"; 1666 }; 1667 1668 sdhi3: mmc@ee160000 { 1669 compatible = "renesas,sdhi-r8a7790", 1670 "renesas,rcar-gen2-sdhi"; 1671 reg = <0 0xee160000 0 0x100>; 1672 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1673 clocks = <&cpg CPG_MOD 311>; 1674 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1675 <&dmac1 0xd3>, <&dmac1 0xd4>; 1676 dma-names = "tx", "rx", "tx", "rx"; 1677 max-frequency = <97500000>; 1678 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1679 resets = <&cpg 311>; 1680 status = "disabled"; 1681 }; 1682 1683 mmcif0: mmc@ee200000 { 1684 compatible = "renesas,mmcif-r8a7790", 1685 "renesas,sh-mmcif"; 1686 reg = <0 0xee200000 0 0x80>; 1687 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1688 clocks = <&cpg CPG_MOD 315>; 1689 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1690 <&dmac1 0xd1>, <&dmac1 0xd2>; 1691 dma-names = "tx", "rx", "tx", "rx"; 1692 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1693 resets = <&cpg 315>; 1694 status = "disabled"; 1695 max-frequency = <97500000>; 1696 }; 1697 1698 mmcif1: mmc@ee220000 { 1699 compatible = "renesas,mmcif-r8a7790", 1700 "renesas,sh-mmcif"; 1701 reg = <0 0xee220000 0 0x80>; 1702 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 1703 clocks = <&cpg CPG_MOD 305>; 1704 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, 1705 <&dmac1 0xe1>, <&dmac1 0xe2>; 1706 dma-names = "tx", "rx", "tx", "rx"; 1707 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1708 resets = <&cpg 305>; 1709 status = "disabled"; 1710 max-frequency = <97500000>; 1711 }; 1712 1713 sata0: sata@ee300000 { 1714 compatible = "renesas,sata-r8a7790", 1715 "renesas,rcar-gen2-sata"; 1716 reg = <0 0xee300000 0 0x200000>; 1717 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1718 clocks = <&cpg CPG_MOD 815>; 1719 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1720 resets = <&cpg 815>; 1721 status = "disabled"; 1722 }; 1723 1724 sata1: sata@ee500000 { 1725 compatible = "renesas,sata-r8a7790", 1726 "renesas,rcar-gen2-sata"; 1727 reg = <0 0xee500000 0 0x200000>; 1728 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1729 clocks = <&cpg CPG_MOD 814>; 1730 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1731 resets = <&cpg 814>; 1732 status = "disabled"; 1733 }; 1734 1735 ether: ethernet@ee700000 { 1736 compatible = "renesas,ether-r8a7790", 1737 "renesas,rcar-gen2-ether"; 1738 reg = <0 0xee700000 0 0x400>; 1739 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1740 clocks = <&cpg CPG_MOD 813>; 1741 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1742 resets = <&cpg 813>; 1743 phy-mode = "rmii"; 1744 #address-cells = <1>; 1745 #size-cells = <0>; 1746 status = "disabled"; 1747 }; 1748 1749 gic: interrupt-controller@f1001000 { 1750 compatible = "arm,gic-400"; 1751 #interrupt-cells = <3>; 1752 #address-cells = <0>; 1753 interrupt-controller; 1754 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1755 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1756 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 1757 clocks = <&cpg CPG_MOD 408>; 1758 clock-names = "clk"; 1759 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1760 resets = <&cpg 408>; 1761 }; 1762 1763 pciec: pcie@fe000000 { 1764 compatible = "renesas,pcie-r8a7790", 1765 "renesas,pcie-rcar-gen2"; 1766 reg = <0 0xfe000000 0 0x80000>; 1767 #address-cells = <3>; 1768 #size-cells = <2>; 1769 bus-range = <0x00 0xff>; 1770 device_type = "pci"; 1771 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1772 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1773 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1774 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1775 /* Map all possible DDR as inbound ranges */ 1776 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1777 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; 1778 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1779 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1780 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1781 #interrupt-cells = <1>; 1782 interrupt-map-mask = <0 0 0 0>; 1783 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1784 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1785 clock-names = "pcie", "pcie_bus"; 1786 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1787 resets = <&cpg 319>; 1788 status = "disabled"; 1789 }; 1790 1791 vsp@fe920000 { 1792 compatible = "renesas,vsp1"; 1793 reg = <0 0xfe920000 0 0x8000>; 1794 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1795 clocks = <&cpg CPG_MOD 130>; 1796 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1797 resets = <&cpg 130>; 1798 }; 1799 1800 vsp@fe928000 { 1801 compatible = "renesas,vsp1"; 1802 reg = <0 0xfe928000 0 0x8000>; 1803 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1804 clocks = <&cpg CPG_MOD 131>; 1805 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1806 resets = <&cpg 131>; 1807 }; 1808 1809 vsp@fe930000 { 1810 compatible = "renesas,vsp1"; 1811 reg = <0 0xfe930000 0 0x8000>; 1812 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1813 clocks = <&cpg CPG_MOD 128>; 1814 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1815 resets = <&cpg 128>; 1816 }; 1817 1818 vsp@fe938000 { 1819 compatible = "renesas,vsp1"; 1820 reg = <0 0xfe938000 0 0x8000>; 1821 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1822 clocks = <&cpg CPG_MOD 127>; 1823 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1824 resets = <&cpg 127>; 1825 }; 1826 1827 fdp1@fe940000 { 1828 compatible = "renesas,fdp1"; 1829 reg = <0 0xfe940000 0 0x2400>; 1830 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1831 clocks = <&cpg CPG_MOD 119>; 1832 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1833 resets = <&cpg 119>; 1834 }; 1835 1836 fdp1@fe944000 { 1837 compatible = "renesas,fdp1"; 1838 reg = <0 0xfe944000 0 0x2400>; 1839 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1840 clocks = <&cpg CPG_MOD 118>; 1841 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1842 resets = <&cpg 118>; 1843 }; 1844 1845 fdp1@fe948000 { 1846 compatible = "renesas,fdp1"; 1847 reg = <0 0xfe948000 0 0x2400>; 1848 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; 1849 clocks = <&cpg CPG_MOD 117>; 1850 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1851 resets = <&cpg 117>; 1852 }; 1853 1854 jpu: jpeg-codec@fe980000 { 1855 compatible = "renesas,jpu-r8a7790", 1856 "renesas,rcar-gen2-jpu"; 1857 reg = <0 0xfe980000 0 0x10300>; 1858 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 1859 clocks = <&cpg CPG_MOD 106>; 1860 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1861 resets = <&cpg 106>; 1862 }; 1863 1864 du: display@feb00000 { 1865 compatible = "renesas,du-r8a7790"; 1866 reg = <0 0xfeb00000 0 0x70000>; 1867 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1868 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1869 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 1870 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 1871 <&cpg CPG_MOD 722>; 1872 clock-names = "du.0", "du.1", "du.2"; 1873 resets = <&cpg 724>; 1874 reset-names = "du.0"; 1875 status = "disabled"; 1876 1877 ports { 1878 #address-cells = <1>; 1879 #size-cells = <0>; 1880 1881 port@0 { 1882 reg = <0>; 1883 du_out_rgb: endpoint { 1884 }; 1885 }; 1886 port@1 { 1887 reg = <1>; 1888 du_out_lvds0: endpoint { 1889 remote-endpoint = <&lvds0_in>; 1890 }; 1891 }; 1892 port@2 { 1893 reg = <2>; 1894 du_out_lvds1: endpoint { 1895 remote-endpoint = <&lvds1_in>; 1896 }; 1897 }; 1898 }; 1899 }; 1900 1901 lvds0: lvds@feb90000 { 1902 compatible = "renesas,r8a7790-lvds"; 1903 reg = <0 0xfeb90000 0 0x1c>; 1904 clocks = <&cpg CPG_MOD 726>; 1905 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1906 resets = <&cpg 726>; 1907 status = "disabled"; 1908 1909 ports { 1910 #address-cells = <1>; 1911 #size-cells = <0>; 1912 1913 port@0 { 1914 reg = <0>; 1915 lvds0_in: endpoint { 1916 remote-endpoint = <&du_out_lvds0>; 1917 }; 1918 }; 1919 port@1 { 1920 reg = <1>; 1921 lvds0_out: endpoint { 1922 }; 1923 }; 1924 }; 1925 }; 1926 1927 lvds1: lvds@feb94000 { 1928 compatible = "renesas,r8a7790-lvds"; 1929 reg = <0 0xfeb94000 0 0x1c>; 1930 clocks = <&cpg CPG_MOD 725>; 1931 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1932 resets = <&cpg 725>; 1933 status = "disabled"; 1934 1935 ports { 1936 #address-cells = <1>; 1937 #size-cells = <0>; 1938 1939 port@0 { 1940 reg = <0>; 1941 lvds1_in: endpoint { 1942 remote-endpoint = <&du_out_lvds1>; 1943 }; 1944 }; 1945 port@1 { 1946 reg = <1>; 1947 lvds1_out: endpoint { 1948 }; 1949 }; 1950 }; 1951 }; 1952 1953 prr: chipid@ff000044 { 1954 compatible = "renesas,prr"; 1955 reg = <0 0xff000044 0 4>; 1956 bootph-all; 1957 }; 1958 1959 cmt0: timer@ffca0000 { 1960 compatible = "renesas,r8a7790-cmt0", 1961 "renesas,rcar-gen2-cmt0"; 1962 reg = <0 0xffca0000 0 0x1004>; 1963 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1964 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1965 clocks = <&cpg CPG_MOD 124>; 1966 clock-names = "fck"; 1967 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1968 resets = <&cpg 124>; 1969 1970 status = "disabled"; 1971 }; 1972 1973 cmt1: timer@e6130000 { 1974 compatible = "renesas,r8a7790-cmt1", 1975 "renesas,rcar-gen2-cmt1"; 1976 reg = <0 0xe6130000 0 0x1004>; 1977 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1978 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1979 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1980 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1981 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1982 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1983 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1984 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1985 clocks = <&cpg CPG_MOD 329>; 1986 clock-names = "fck"; 1987 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1988 resets = <&cpg 329>; 1989 1990 status = "disabled"; 1991 }; 1992 }; 1993 1994 thermal-zones { 1995 cpu_thermal: cpu-thermal { 1996 polling-delay-passive = <0>; 1997 polling-delay = <0>; 1998 1999 thermal-sensors = <&thermal>; 2000 2001 trips { 2002 cpu-crit { 2003 temperature = <95000>; 2004 hysteresis = <0>; 2005 type = "critical"; 2006 }; 2007 }; 2008 cooling-maps { 2009 }; 2010 }; 2011 }; 2012 2013 timer { 2014 compatible = "arm,armv7-timer"; 2015 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2016 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2017 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2018 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 2019 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2020 }; 2021 2022 /* External USB clock - can be overridden by the board */ 2023 usb_extal_clk: usb_extal { 2024 compatible = "fixed-clock"; 2025 #clock-cells = <0>; 2026 clock-frequency = <48000000>; 2027 bootph-all; 2028 }; 2029}; 2030