Searched hist:f05259a6ffa40097b5565f25c3fcf833a9d3ecf5 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/clk/ |
| H A D | clk-wm831x.c | f05259a6ffa40097b5565f25c3fcf833a9d3ecf5 Thu May 17 11:04:57 CEST 2012 Mark Brown <broonie@opensource.wolfsonmicro.com> clk: wm831x: Add initial WM831x clock driver
The WM831x and WM832x series of PMICs contain a flexible clocking
subsystem intended to provide always on and system core clocks. It
features:
- A 32.768kHz crystal oscillator which can optionally be used to pass
through an externally generated clock.
- A FLL which can be clocked from either the 32.768kHz oscillator or
the CLKIN pin.
- A CLKOUT pin which can bring out either the oscillator or the FLL
output.
- The 32.768kHz clock can also optionally be brought out on the GPIO
pins of the device.
This driver fully supports the 32.768kHz oscillator and CLKOUT. The FLL
is supported only in AUTO mode, the full flexibility of the FLL cannot
currently be used.
Due to a lack of access to systems where the core SoC has been converted
to use the generic clock API this driver has been compile tested only.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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| /linux/ |
| H A D | MAINTAINERS | diff f05259a6ffa40097b5565f25c3fcf833a9d3ecf5 Thu May 17 11:04:57 CEST 2012 Mark Brown <broonie@opensource.wolfsonmicro.com> clk: wm831x: Add initial WM831x clock driver
The WM831x and WM832x series of PMICs contain a flexible clocking
subsystem intended to provide always on and system core clocks. It
features:
- A 32.768kHz crystal oscillator which can optionally be used to pass
through an externally generated clock.
- A FLL which can be clocked from either the 32.768kHz oscillator or
the CLKIN pin.
- A CLKOUT pin which can bring out either the oscillator or the FLL
output.
- The 32.768kHz clock can also optionally be brought out on the GPIO
pins of the device.
This driver fully supports the 32.768kHz oscillator and CLKOUT. The FLL
is supported only in AUTO mode, the full flexibility of the FLL cannot
currently be used.
Due to a lack of access to systems where the core SoC has been converted
to use the generic clock API this driver has been compile tested only.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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