Searched hist:d62753a57de2547c72819cc82b76731f04563433 (Results 1 – 3 of 3) sorted by relevance
/linux/drivers/gpu/drm/xe/ |
H A D | xe_wa_oob.rules | diff d62753a57de2547c72819cc82b76731f04563433 Tue Mar 26 23:44:56 CET 2024 Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> drm/xe/gsc: Implement WA 14018094691
The WA states that we need to keep the primary GT powered up during GSC load to allow the GSC FW to access its registers. We also need to make sure that one of the registers is locked before starting the load.
v2: fix location of register def (Matt)
Bspec: 55928 Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240326224456.518548-1-daniele.ceraolospurio@intel.com
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H A D | xe_gsc.c | diff d62753a57de2547c72819cc82b76731f04563433 Tue Mar 26 23:44:56 CET 2024 Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> drm/xe/gsc: Implement WA 14018094691
The WA states that we need to keep the primary GT powered up during GSC load to allow the GSC FW to access its registers. We also need to make sure that one of the registers is locked before starting the load.
v2: fix location of register def (Matt)
Bspec: 55928 Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240326224456.518548-1-daniele.ceraolospurio@intel.com
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/linux/drivers/gpu/drm/xe/regs/ |
H A D | xe_gt_regs.h | diff d62753a57de2547c72819cc82b76731f04563433 Tue Mar 26 23:44:56 CET 2024 Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> drm/xe/gsc: Implement WA 14018094691
The WA states that we need to keep the primary GT powered up during GSC load to allow the GSC FW to access its registers. We also need to make sure that one of the registers is locked before starting the load.
v2: fix location of register def (Matt)
Bspec: 55928 Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240326224456.518548-1-daniele.ceraolospurio@intel.com
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