| /linux/drivers/pci/controller/dwc/ |
| H A D | pcie-qcom-common.h | d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | pcie-qcom-common.c | d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | Makefile | diff d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | pcie-qcom-ep.c | diff d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | Kconfig | diff d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | pcie-tegra194.c | diff d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | pcie-designware.h | diff d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
| H A D | pcie-qcom.c | diff d45736b5984954da71292d858f277bac9c70cd2e Wed Sep 11 17:26:28 CEST 2024 Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|