Searched hist:c7e4a611f35c064ed7bf3f1614647941b0228334 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_wa.c | diff c7e4a611f35c064ed7bf3f1614647941b0228334 Fri Jul 28 00:09:21 CEST 2023 Matt Roper <matthew.d.roper@intel.com> drm/xe: Add Wa_14015150844 for DG2 and Xe_LPG
The workaround database tells us to set this bit, even though the bspec
indicates the bit doesn't exist on these platforms. Since this is a
write-only register, we also can't read back its value to verify whether
it's actually working or not. For now we'll trust that the workaround
database knows what it's talking about; if not, the hardware will just
ignore the attempt to write to a non-existent bit and it shouldn't cause
any problems.
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://lore.kernel.org/r/20230727220920.2291913-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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| /linux/drivers/gpu/drm/xe/regs/ |
| H A D | xe_gt_regs.h | diff c7e4a611f35c064ed7bf3f1614647941b0228334 Fri Jul 28 00:09:21 CEST 2023 Matt Roper <matthew.d.roper@intel.com> drm/xe: Add Wa_14015150844 for DG2 and Xe_LPG
The workaround database tells us to set this bit, even though the bspec
indicates the bit doesn't exist on these platforms. Since this is a
write-only register, we also can't read back its value to verify whether
it's actually working or not. For now we'll trust that the workaround
database knows what it's talking about; if not, the hardware will just
ignore the attempt to write to a non-existent bit and it shouldn't cause
any problems.
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://lore.kernel.org/r/20230727220920.2291913-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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