Searched hist:c4298d15778bf21eb4834768f04c0dcf7975dec2 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_display_power.c | diff c4298d15778bf21eb4834768f04c0dcf7975dec2 Wed Mar 01 21:10:53 CET 2023 José Roberto de Souza <jose.souza@intel.com> drm/i915/display/mtl: Program latch to phy reset
Latch reset of phys during DC9 and when driver is unloaded to avoid
phy reset.
Specification ask us to program it closer to the step that enables
DC9 in DC_STATE_EN but doing this way allow us to sanitize the phy
latch during driver load.
BSpec: 49197
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230301201053.928709-6-radhakrishna.sripada@intel.com
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | diff c4298d15778bf21eb4834768f04c0dcf7975dec2 Wed Mar 01 21:10:53 CET 2023 José Roberto de Souza <jose.souza@intel.com> drm/i915/display/mtl: Program latch to phy reset
Latch reset of phys during DC9 and when driver is unloaded to avoid
phy reset.
Specification ask us to program it closer to the step that enables
DC9 in DC_STATE_EN but doing this way allow us to sanitize the phy
latch during driver load.
BSpec: 49197
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230301201053.928709-6-radhakrishna.sripada@intel.com
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