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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_display_power.c | diff b18e249bf6168d0cea736334187ef08a90dd8b43 Thu Feb 13 15:04:10 CET 2020 Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> drm/i915: Ensure no conflicts with BIOS when updating Dbuf
TGL BIOS seems to enable both DBuf slices ocasionally, depending
how many displays are connected, while i915 according to BSpec
was powering on S1 DBuf slice, until a modeset was done.
This was causing a brief flash during the boot as we were
disabling slice, previously used by BIOS with that.
To prevent this, now we are ensuring tht we are enabling
_at least_ one slice, but if there are more, let's not
power them off.
Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to pipes")
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200213140412.32697-2-stanislav.lisovskiy@intel.com
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