Searched hist:a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/clk/renesas/ |
| H A D | rcar-cpg-lib.h | diff a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 Wed Nov 10 20:15:50 CET 2021 Wolfram Sang <wsa+renesas@sang-engineering.com> clk: renesas: rcar-gen3: Add dummy SDnH clock
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for now. A later patch then will add the proper functionality.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
| H A D | rcar-cpg-lib.c | diff a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 Wed Nov 10 20:15:50 CET 2021 Wolfram Sang <wsa+renesas@sang-engineering.com> clk: renesas: rcar-gen3: Add dummy SDnH clock
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for now. A later patch then will add the proper functionality.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
| H A D | rcar-gen3-cpg.h | diff a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 Wed Nov 10 20:15:50 CET 2021 Wolfram Sang <wsa+renesas@sang-engineering.com> clk: renesas: rcar-gen3: Add dummy SDnH clock
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for now. A later patch then will add the proper functionality.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
| H A D | rcar-gen3-cpg.c | diff a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 Wed Nov 10 20:15:50 CET 2021 Wolfram Sang <wsa+renesas@sang-engineering.com> clk: renesas: rcar-gen3: Add dummy SDnH clock
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for now. A later patch then will add the proper functionality.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|